JPH099150A - Signal processing circuit for solid-state image pickup device - Google Patents

Abstract

PURPOSE: To attain gain adjustment hardly affected even by a noise component of a signal by calculating a gain based on an output of a 1st detection means and a 2nd detection means so as to adjust the gain thereby hardly receiving the effect due to a local false signal. CONSTITUTION: The signal processing circuit of a solid-state image pickup element is made up of plural detection means 3a, 3b to obtain a control variable from plural areas in a pattern with respect to video signals of plural channels, a gain calculation means 5a calculating a gain based on an output of the plural detection means 3a, 3b, and amplifiers 2a, 2b adjusting a gain of the signal based on the gain obtained by the gain calculation means 5a. Since plural detection areas are provided, the effect due to a local false signal is hardly received and the gain is adjusted without being almost affected by the noise component of the signal. When any signal among video signals of plural channels is a saturation signal, it is not used as a detection signal, then the gain adjustment with high accuracy is attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit of a solid-state image pickup device used in a video camera or the like.

[0002]

2. Description of the Related Art As a conventional signal processing circuit of a solid-state image pickup device, there is JP-A-3-85972. Hereinafter, a signal processing circuit of a conventional solid-state imaging device will be described with reference to the drawings. FIG. 7 is a block diagram showing the configuration of a signal processing circuit of a conventional solid-state imaging device.

In FIG. 7, 1 is an input terminal, 2 is an amplifier, 3 is a detecting means, 4 is an integrating circuit, 5 is a gain calculating means, and 6 is an output terminal. Two-channel output signals S1 and S of the solid-state image sensor input from the input terminals 1a and 1b
2 is amplified by the amplifiers 2a and 2b, respectively, and is output from the output terminals 6a and 6b as S1 'and S2', and at the same time, is input to the detecting means 3. The detecting means 3 has two integrating circuits 4a and 4b, integrates the signals output from the amplifiers 2a and 2b by one screen, and outputs Is1 and Is2. The gain calculation means 5 inputs Is1 and Is2, and the amplifiers 2a and 2 are provided so that the difference between them is equal to or less than a predetermined value.
Adjust the gain of b.

[0004]

However, in the above configuration, a false signal is generated in a local portion of the screen such as a shading component or a smear component in the output signal of the solid-state image sensor, and the inter-channel gain is reduced. There is a problem in that sufficient gain adjustment cannot be performed when there is apparent change.

Further, when the integration area is narrowed to cope with a local change, there is a problem that the signal-to-noise ratio is greatly deteriorated because of being easily affected by noise superimposed on the signal.

Further, when a saturation signal is included when integrating by the integrating circuit, there is a problem that the correlation between the signals of the two channels disappears and an accurate gain cannot be obtained.

[0007]

In order to solve such a problem, a signal processing circuit of a solid-state image pickup device of the present invention provides a plurality of control values for video signals of a plurality of channels from a plurality of areas in a screen. It is characterized by comprising a detection means and a gain calculation means for calculating the gain based on the outputs of the plurality of detection means, and an amplifier for adjusting the gain of the signal based on the gain obtained by the gain calculation means.

[0008]

By having a plurality of detection areas, it is possible to perform gain adjustment that is less likely to be affected by a local spurious signal and less susceptible to the noise component of the signal.

[0009]

【Example】

(First Embodiment) A signal processing circuit of a solid-state image pickup device according to a first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a signal processing circuit of a solid-state image pickup device according to the first embodiment of the present invention. In FIG. 1, 1 is an input terminal, 2 is an amplifier, 3a is first detecting means, 3b is second detecting means, 4 is an integrating circuit, 5 is gain calculating means, and 6 is an output terminal.

The two-channel output signals S1 and S2 of the solid-state image pickup device inputted from the input terminals 1a and 1b are inputted to the first detecting means 3a and the second detecting means 3b.
The first detecting means 3a has two integrating circuits 4a and 4b, integrates the input signals S1 and S2 for one screen, and outputs them as Is1a and Is2a.

Here, the integration circuit 4 will be described in detail. FIG. 2 is a configuration diagram showing the configuration of the integration circuit in the signal processing circuit of the solid-state imaging device according to the first embodiment of the present invention.
In FIG. 2, 7 is a comparator, 8 is a selector, 9 is a delay element, and 10 is an adder.

The output signal S1 of the solid-state image pickup device input to the input terminal 1c is input to the comparator 7 and is compared with the saturation level Ssat of the solid-state image pickup device to output a control signal.
The output signal S1 of the solid-state image sensor is input to the selector 8 and S1 is output based on the control signal output from the comparator 7.
Is smaller than the saturation level Ssat, S1 is Ssa
If it is saturated as at t, it passes through the delay element 9a and becomes 1
The output signal of the selector 8 before the cycle is selected. Selector 8
Is input to the adder 10 together with the output signal of the adder 10 one cycle before, and the integrated signal is input to the amplifier 2c, converted into a level per pixel, and output terminal 6c.
The integrated signal Is1 is output.

Here, the delay element 9 and the adder 10 form a low-pass filter, and the band can be changed depending on the number of pixels to be integrated. Further, here, a cyclic low-pass filter that returns the output of the adder to the input is configured, but by using a non-cyclic filter configuration, the detected gain and the phase of the pixel to be adjusted can be matched. Further, one cycle here may be one pixel cycle of the solid-state image sensor, but by making it every several pixels, the circuit scale of the adder can be reduced.

The second detecting means 3b includes two integrating circuits 4
Of the signals output from the amplifiers 2a and 2b having c and 4d, the peripheral pixels of the pixel currently being amplified, for example, the signals of the preceding four pixels are integrated and output as Is1b and Is2b.

The gain calculation means 5a includes Is1a and Is2.
Input a, Is1b, Is2b. Gain calculation means 5
Then, the sum of Is1a and Is1b and Is2a and Is2
The amplifier 2 is calculated by calculating the sum of b and calculating the ratio.
Adjust the gains of a and 2b.

Here, the gain calculating means 5a will be described in detail. FIG. 3 is a configuration diagram showing the configuration of the gain calculating means 5a of the signal processing circuit of the solid-state imaging device according to the first embodiment. In FIG. 3, 10 is an adder and 11 is a divider.

The integrated value I input to the input terminals 1d and 1e
s1a and Is1b are input to the adder 10a and the sum signal Is is input.
1ab is output. Similarly, the integrated values Is2a and Is2b input to the input terminals 1f and 1g are input to the adder 10b and the sum signal Is2ab is output. Adders 10a, 1
The output signals Is1ab and Is2ab of 0b are respectively input to the divider 11, and the output signal A (= Is1ab / Is2) is input.
ab) is output.

Using the gain A thus obtained by the gain calculating means 5, the input signal S1 is 1 by the amplifier 2a.
The input signal S2 is multiplied by A by the amplifier 2b, and the output signals S1 ′ and S2 ′ whose gain difference is adjusted are output terminal 6
It is output from a and 6b.

(Second Embodiment) A signal processing circuit of a solid-state image pickup device according to a second embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 is a block diagram showing the configuration of the signal processing circuit of the solid-state image pickup device according to the second embodiment of the present invention. In FIG. 4, 1 is an input terminal, 2 is an amplifier, 3a is first detecting means, 3b is second detecting means, 4 is an integrating circuit, 5 is gain calculating means, 6 is an output terminal, and 12 is a subtractor. is there.

The two-channel output signals S1 and S2 of the solid-state image pickup device inputted from the input terminals 1a and 1b are inputted to the first detecting means 3a and the second detecting means 3b through the amplifiers 2a and 2b.

In the first detecting means 3a, the input signal S
1, S2 is subtracted by the subtractor 12a, and the subtracter 12a
The output signal of is integrated by one screen by the integrating circuit 4a, and Isa
Is output as

Here, the configuration and operation of the integrating circuit 4 is the first.
The description is omitted here because it is similar to the embodiment of FIG.

In the second detecting means 3b, the input signal S
1 and S2 are subtracted by the subtractor 12b, and the subtractor 12b
The output signal of 1 is integrated by the integrating circuit 4b with the signals of the peripheral pixels of the pixel currently being amplified, for example, the previous 4 pixels, and output as Isb.

The gain calculating means 5b inputs Isa and Isb. The gain calculating means 5b calculates the sum of Isa and Isb, and the amplifier 2 is adjusted so that the difference becomes a predetermined value or less.
Adjust the gains of a and 2b.

Here, the gain calculating means 5b will be described in detail. FIG. 5 is a configuration diagram showing the configuration of the gain calculating means 5b of the signal processing circuit of the solid-state imaging device according to the second embodiment. In FIG. 5, 2 is an amplifier and 10 is an adder.

The integrated value I input to the input terminals 1h and 1i
sa and Isb are input to the adder 10c and the sum signal Isab is input.
Is output, the gain is adjusted by the amplifier 2d, and the adder 10
At d, it is added with the gain of one cycle before passing through the delay element 9c and output as a gain A.

The gain of the amplifier 2a is 1, and the gain of the amplifier 2b is A0. The average value of the input signals S1 and S2 is S1
m and S2m, if there is no local variation in the screen, both Isa and Isb are (Sm1-A0.Sm2), and the output of the adder 10c is 2. (Sm1-A0.Sm).
2). Since it is desired to set the gain A of the adjusted amplifier 2b output from the gain calculation means 5b to Sm1 / Sm2, the gain adjustment amount K in the amplifier 2d is K ·
2 · (Sm1-A0 · Sm2) + A0 = Sm1 / Sm2
Therefore, about 1/2 Sm2 is preferable.

By using the gain A obtained by the gain calculating means 5b in this way, the input signal S1 is set to 1 by the amplifier 2a.
The input signal S2 is multiplied by A by the amplifier 2b, and the output signals S1 ′ and S2 ′ whose gain difference is adjusted are output terminal 6
It is output from a and 6b.

(Third Embodiment) A signal processing circuit of a solid-state image pickup device according to a third embodiment of the present invention will be described below with reference to the drawings.

FIG. 6 is a block diagram showing the configuration of the signal processing circuit of the solid-state image pickup device according to the third embodiment of the present invention. In FIG. 6, 1 is an input terminal, 2 is an amplifier, 3a is first detecting means, 3b is second detecting means, 4 is an integrating circuit, 5 is gain calculating means, 6 is an output terminal, and 11 is a subtractor. is there. The configuration of FIG. 6 is such that the first detecting means 3a is connected to the second detecting means 3b.

The two-channel output signals S1 and S2 of the solid-state image pickup device input from the input terminals 1a and 1b are input to the second detecting means 3b via the amplifiers 2a and 2b.

In the second detecting means 3b, the input signal S
1 and S2 are subtracted by the subtractor 11b, and the subtractor 11b
The output signal of 1 is integrated by the integrating circuit 4b with the signals of the peripheral pixels of the pixel currently being amplified, for example, the previous 4 pixels, and output as Isb. Here, the configuration and the operation of the integrating circuit 4 are the same as those in the first embodiment, and therefore will be omitted here.

The first detecting means 3a receives the output of the second detecting means 3b, integrates it by one screen by the integrating circuit 4a, and outputs it as Isa. The gain calculation means 5b is I
Input sa and Isb. In the gain calculation means 5b, I
The sum of sa and Isb is calculated, and the gains of the amplifiers 2a and 2b are adjusted so that the difference becomes a predetermined value or less.

Using the gain A thus obtained by the gain calculating means 5b, the input signal S1 is 1 by the amplifier 2a.
The input signal S2 is multiplied by A by the amplifier 2b, and the output signals S1 ′ and S2 ′ whose gain difference is adjusted are output terminal 6
It is output from a and 6b.

[0037]

The effects of the present invention are the first detecting means and the second detecting means.
By calculating the gain based on the output of the detection means and adjusting the gain accordingly, it is possible to perform the gain adjustment that is less likely to be affected by the local spurious signal and is less likely to be affected by the noise component of the signal. That is.

Another effect of the present invention is that when any one of the video signals of a plurality of channels is a saturated signal, it is possible to perform highly accurate gain adjustment by not using it as a detection signal. Is.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a signal processing circuit of a solid-state imaging device according to a first embodiment.

FIG. 2 is a configuration diagram of an integration circuit in a signal processing circuit of the solid-state imaging device according to the first embodiment.

FIG. 3 is a configuration diagram of a gain calculating unit 5a of a signal processing circuit of the solid-state imaging device according to the first embodiment.

FIG. 4 is a configuration diagram of a signal processing circuit of a solid-state imaging device according to a second embodiment.

FIG. 5 is a configuration diagram of a gain calculating unit 5b of a signal processing circuit of the solid-state imaging device according to the second embodiment.

FIG. 6 is a configuration diagram of a signal processing circuit of a solid-state imaging device according to a third embodiment.

FIG. 7 is a configuration diagram of a signal processing circuit of a conventional solid-state imaging device.

[Explanation of symbols]

 1 Input Terminal 2 Amplifier 3 Detecting Means 3a First Detecting Means 3b Second Detecting Means 4 Integrating Circuit 5 Gain Calculating Means 6 Output Terminals 7 Comparators 8 Selectors 9 Delay Elements 10 Adders 11 Dividers 12 Subtractors

Front page continuation (72) Inventor Yukihiro Yazoe 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (6)

[Claims] 1. A plurality of detecting means for obtaining control values from a plurality of regions for video signals of a plurality of channels output from a solid-state image pickup device, and a gain calculating means for calculating a gain based on outputs of the plurality of detecting means. A signal processing circuit for a solid-state image pickup device, comprising: an amplifier that adjusts the gain of a signal based on the gain obtained by the gain calculating means. 2. At least one region of the plurality of regions is a region corresponding to one screen, and at least one region of the other regions is a region corresponding to a peripheral pixel of a pixel whose gain is to be adjusted. The signal processing circuit of the solid-state imaging device according to claim 1, wherein the signal processing circuit is provided. 3. The detecting means has a plurality of integrating circuits for obtaining integrated values in the detection regions of the plurality of channels,
The signal processing circuit of the solid-state imaging device according to claim 1, wherein the gain calculation means calculates the gain based on a ratio of integrated values between the plurality of channels. 4. The detecting means has a difference circuit and an integrating circuit, obtains an integrated value of the difference values in the detection areas of the plurality of channels, and a gain calculating means sets the integrated value of the difference values of the plurality of channels to 0. The signal processing circuit of the solid-state imaging device according to claim 1, wherein the gain is calculated so as to: 5. The detection means has a saturation signal detection means and a selection means, and when any one of the video signals of the plurality of channels is a saturation signal, it is not selected as a detection signal, and The signal processing circuit of the solid-state imaging device according to claim 1, wherein the detection signal is detected from a signal in which none of the video signals of the plurality of channels is saturated. 6. The detecting means has an integrating means, and at least one of the detecting means inputs an output signal of another detecting means, performs integration processing and outputs a control signal. The signal processing circuit of the solid-state imaging device according to claim 1.