JPH098463A - Multilayer printed-wiring board, manufacture thereof and semiconductor device using multilayer printed-wiring board - Google Patents

Abstract

PURPOSE: To provide a multilayer printed-wiring board coping with a miniaturization and a reduction in thickness, a method of manufacturing the board and a semiconductor device using the multilayer printed-wiring board. CONSTITUTION: A multilayer printed-wiring board has a plurality of insulating layers 1 and a recess 2 made to penetrate at least one layer or more of these layers 1 and the board is provided with a first insulating layer 1a having a through hole 12 constituting the recess 2, a plurality of solidshaped conductive path layers 5 which apply potentials different from each other to an internal layer surface 4a of the layer 1a, an input terminal 6 on the surface on the opposite side to the surface 4a, a metal-plated path 7 on the inner wall of the hole 12 and an isolation path 9 from the layer 1a made to expose by shaving off a metal-plated layer. A method of manufacturing the board consists of a process for applying a metal plating to the inner wall of the hole 12 formed in a first circuit board, a process for forming the solid-shaped conductive path layers, which have the potentials different from each other on the same surface of the first circuit board, a process, wherein one part of the metal-plated layer is shaved off and the path 7 is formed, a process for forming the input terminal and a process, wherein a second circuit board is superposed on the solid-shaved layers 5 via a prepreg and is thermoformed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board used in electronic equipment, a method for manufacturing the same, and a semiconductor device using the multilayer printed wiring board.

[0002]

2. Description of the Related Art A semiconductor device in which a semiconductor chip or the like is mounted on a multilayer printed wiring board is known. In the above-mentioned printed wiring board, a signal circuit and a solid conductive path layer such as a power supply circuit and a ground circuit are formed in each layer around the semiconductor chip, and these input terminals and the semiconductor chip are connected by wires. Used. With the recent miniaturization and thinning, in the circuit formation of a multilayer printed wiring board, a multilayer printed wiring board having a large number of signal circuits with a small number of layers and a solid conductive path layer, and a semiconductor device are required. Has been.

[0003]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned facts, and an object of the present invention is to provide a multilayer printed wiring board corresponding to downsizing and thinning, a manufacturing method thereof, and a multilayer printing. It is to provide a semiconductor device using a wiring board.

[0004]

A multilayer printed wiring board according to claim 1 of the present invention comprises a plurality of insulating layers 1 and a recess 2 for mounting a semiconductor chip, which penetrates at least one insulating layer 1 or more. A first insulating layer (1a) having a through hole (12) forming the depression (2), which is a multilayer printed wiring board having the same.
And formed on the inner layer surface 4a of the first insulating layer 1a,
A plurality of solid conductive path layers 5 that reach the end edge 13 of the through hole 12 and to which different potentials are applied, and different potentials formed on the surface 4b of the first insulating layer 1a opposite to the inner layer surface 4a. A plurality of input terminals 6 to which is applied, and the first insulating layer 1a.
To the inner wall 3 of the through-hole 12 of the above, the metal-plated path 7 connecting the above-mentioned solid conductive path layer 5 and the input terminal 6 respectively, and the through-hole 12 of the above-mentioned first insulating layer 1a Road layer 5
It is characterized in that it is provided with a separation path 9 which is connected to the insulation path 8 provided at the boundary of the above, and the plating is scraped off to expose the first insulation layer 1a.

A method for manufacturing a multilayer printed wiring board according to a second aspect of the present invention is a multilayer printed wiring having a recess 2 for mounting a semiconductor chip and a solid conductive path layer 5 having different potentials around the recess 2. The plate is produced by the following steps. The step is a step of plating the inner wall 3 of the through hole 12 for mounting a semiconductor chip formed in the first circuit board 11a with metal, the same surface of the first circuit board 11a, and the through hole. The step of forming the solid conductive path layer 5 having different potentials, which reaches the edge 13 of the first electrode 12,
Of the metal plating layer formed on the inner wall 3 of the circuit board 11a, the metal plating layer in contact with the insulating path 8 provided at the boundary of the solid conductive path layer 5 is scraped off, and the solid conductive path layer 5 is formed. A step of forming a metal plating path 7 connected to the first circuit board 1 on the side opposite to the solid conductive path layer 5 of the input terminal 6 connected to the metal plating path 7 of the first circuit board 11a.
1a, and the above-mentioned first circuit board 11a
The second circuit board 11b is superposed on the solid-state conductive path layer 5 formed in the above with a prepreg 10 having a through hole 12a for mounting a semiconductor chip, and is heat-molded.

A semiconductor device according to claim 3 of the present invention is characterized in that a semiconductor chip 14 is mounted on the bottom of the recess 2 of the multilayer printed wiring board according to claim 1.

[0007]

In the multilayer printed wiring board according to claim 1 of the present invention, a plurality of solid conductive path layers 5 to which different potentials are applied are formed on the inner layer surface 4a of the first insulating layer 1a, and the first insulating layer is formed. On the inner wall 3 of the through hole 12 of the layer 1a, a metal plating path 7 that connects the solid conductive path layer 5 and the input terminal 6 to each other, and a separation path where the plating is scraped off to expose the first insulating layer 1a. Since 9 is provided, it is not necessary to provide another layer for each potential, and the number of layers can be reduced.

According to a second aspect of the present invention, there is provided a method for manufacturing a multilayer printed wiring board, wherein a boundary between the solid conductive path layers 5 of the metal plating layer formed on the inner wall 3 of the first circuit board 11a is provided. The metal plating layer 7 in contact with the provided insulating path 8 is scraped off to connect with the above-mentioned solid conductive path layer 5
Since the conductive path layers 5 having different potentials can be formed on the same surface of the first circuit board 11a, the number of layers of the multilayer printed wiring board can be reduced.

In the semiconductor device according to the third aspect of the present invention, the solid-state conductive path layer 5 having different potentials can be connected to the semiconductor chip by using the multilayer printed wiring board having the small number of layers according to the first aspect.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings.

FIG. 1 (a) is an enlarged cross-sectional view of a main part of a multilayer printed wiring board according to an embodiment of the present invention, (b).
FIG. 2 is an enlarged perspective view of an essential part of a first insulating layer forming a multilayer printed wiring board, and FIG. 2A is a first perspective view of a first insulating layer manufactured by a method for manufacturing a multilayer printed wiring board according to an embodiment of the present invention. FIG. 3B is a partially cutaway perspective view of the circuit board of FIG. 1, FIG. 3B is a sectional view of a principal part showing a step of a method for manufacturing a multilayer printed wiring board according to an embodiment of the present invention, and FIG. It is sectional drawing of the semiconductor device using the multilayer printed wiring board of (a).

The multilayer printed wiring board of the present invention is shown in FIG.
As shown in FIG. 2, a plurality of insulating layers 1 and a recess 2 for mounting a semiconductor chip, which penetrates at least one or more of the insulating layers 1.
Having. As the insulating layer 1, a substrate obtained by curing a resin of a prepreg obtained by impregnating and drying a base material with a resin is used. As the resin, an epoxy resin, a polyimide resin,
Fluoro resin, phenol resin, unsaturated polyester resin, PPO resin, etc. may be used alone, modified, or a mixture. The base material is not particularly limited,
Inorganic materials such as glass fibers are preferable because they are excellent in heat resistance and moisture resistance. Further, an organic fiber cloth base material having excellent heat resistance and a mixture thereof can also be used.

As shown in FIGS. 1 (a) and 1 (b), the first insulating layer 1a constituting the multilayer printed wiring board of the present invention comprises:
The solid-state conductive path layer 5 having the through holes 12 forming the depressions 2 and having different potentials applied thereto is provided. 5 in the figure
Reference numerals a and 5b denote conductive path layers 5 to which different potentials are applied. The solid conductive path layer 5 is used, for example, as a power supply circuit or a ground circuit. In the present invention, the plurality of solid conductive path layers 5a and 5b are formed on the same surface which is the inner layer surface 4a, and the insulating path 8 is provided at the boundary between the conductive path layers 5a and 5b. The layers 5a and 5b reach the edge 13 of the through hole 12. Further, a plurality of input terminals 6 to which different electric potentials are applied are formed on the surface 4b of the first insulating layer 1a opposite to the inner layer surface 4a. Reference numerals 6a and 6b in the figure denote input terminals 6 to which different potentials are applied.

In the present invention, the first insulating layer 1a is used.
The inner wall 3 of the through hole 12 is provided with a metal plating path 7 that connects the solid conductive path layer 5 and the input terminal 6 to each other, and a separation path 9 that connects to the insulating path 8. The metal plating path 7a connects the conductive path layer 5a and the input terminal 6a, and the metal plating path 7b connects the conductive path layer 5b and the input terminal 6b.
The metal plating path 7 is formed by applying metal plating to the inner wall 3 of the through hole 12. The layer structure of the metal plating path 7 may be one layer of metal plating or multiple layers, but a multilayer structure of a copper plating layer as an inner layer and a gold plating layer as an outer layer is suitable. The separation path 9 is formed by scraping off the metal plating applied to the inner wall 3 of the through hole 12.

In the multilayer printed wiring board of the present invention having the above-mentioned structure, since a plurality of conductive path layers 5 are provided on the same surface without providing different layers for each potential, the number of layers can be reduced, so that the semiconductor device of the semiconductor device can be manufactured. It can be made smaller and thinner.

Next, a method for manufacturing a multilayer printed wiring board according to the present invention will be described with reference to FIGS. 2 (a) and 2 (b).

The present invention relates to a through hole 1 for mounting a semiconductor chip.
The inner wall 3 of the first circuit board 11a having 2 is plated with metal. Examples of the metal plating include a plating method in which copper plating is used as an inner layer and gold plating is used as an outer layer.

According to the present invention, the solid conductive path layers 5 having different potentials are formed on the same surface of the first circuit board 11a.
The solid conductive path layer 5 is used, for example, as a power supply circuit or a ground circuit. In the figure, 5a and 5b indicate the conductive path layers 5 to which different potentials are applied. The conductive path layer 5 is formed so as to reach the end edge 13 of the through hole 12, and the insulating path 8 is formed at the boundary of the conductive path layer 5. The conductive path layer 5 is formed, for example, by etching a metal foil provided on the circuit board 11a. Furthermore, the first
A plurality of input terminals 6 are formed on the surface of the circuit board 11a opposite to the solid conductive path layer 5. The input terminals 6a and 6b
Indicate input terminals 6 to which different potentials are applied, and are connected to a mounted semiconductor chip or the like. The input terminal 6 is, for example,
It is formed by etching the metal foil provided on the circuit board 11a.

In the present invention, the first circuit board 11 described above is used.
Of the metal plating layer formed on the inner wall 3a of a, the metal plating layer in contact with the insulating path 8 provided at the boundary of the solid conductive path layer 5 is scraped off to expose the first insulating layer 1a. A metal plating path 7 that connects the solid conductive path layer 5 and the input terminal 6 to each other is formed on the inner wall 3. The metal plating path 7a is formed so as to connect the conductive path layer 5a and the input terminal 6a, and the metal plating path 7b is formed so as to connect the conductive path layer 5b and the input terminal 6b. When scraping off the metal plating layer, it is preferable to scrape off the surface layer of the insulating layer 1a in order to ensure the exposure of the first insulating layer 1a. The metal plating layer may be scraped off by, for example, cutting with a router or punching with a mold. The manufacturing order of the steps for manufacturing the first circuit board 11a is not particularly limited.

Next, as shown in FIG. 2A, a prepreg 10 having a through hole 12a for mounting a semiconductor chip is formed in the solid conductive path layer 5 formed on the first circuit board 11a.
When the second circuit board 11b is overlaid and heat-molded via, the multilayer printed wiring board having the solid conductive path layer 5 as an inner layer circuit is produced.

Since the method for manufacturing a multilayer printed wiring board of the present invention is manufactured by the above steps, it is not necessary to form another layer for each potential, and a plurality of conductive path layers 5 are formed on the same surface. The number of layers can be reduced. Therefore, it is possible to obtain a multi-layered printed wiring board that realizes the miniaturization and thinning of the semiconductor device.

The multilayer printed wiring board and the method for manufacturing the same are not limited to the above embodiments. Although the first circuit board 11a serving as the first insulating layer 1a is used as the outer layer material, it may be used as the inner layer material. (Not shown) In the multilayer printed wiring board, a semiconductor chip 14 is mounted on the bottom of the recess 2 as shown in FIG.
Then, the input terminal 6 is wire-bonded with the wire 15 to be used as a semiconductor device. The semiconductor device is
Pin grid array (PGA type) using pins, quadra flat package (QFP) using lead frame
Type), tape automated bonding (TAB
Type), a leadless chip carrier (LCC type) having external connection terminals on the end face of the multilayer printed wiring board, and a ball grid array (BGA type) having solder balls.

Since the semiconductor device of the present invention uses the above-mentioned multilayer printed wiring board, it can be made compact and thin.

[0024]

The multilayer printed wiring board according to claim 1 of the present invention has the number of layers because it has a plurality of conductive path layers 5 on the same surface without providing another layer for each potential. Since the number can be reduced, the semiconductor device can be downsized and thinned.

Since the method for manufacturing a multilayer printed wiring board according to claim 2 of the present invention is manufactured by the above steps, it is not necessary to form another layer for each potential, and a plurality of conductive path layers are formed on the same surface. Since 5 is formed, the number of layers can be reduced. Therefore, it is possible to obtain a multi-layered printed wiring board that realizes the miniaturization and thinning of the semiconductor device.

Since the semiconductor device according to claim 3 of the present invention uses the multilayer printed wiring board according to claim 1 having a small number of layers, it is possible to realize miniaturization and thinning.

[Brief description of drawings]

FIG. 1A is an enlarged cross-sectional view of an essential part of a multilayer printed wiring board according to an embodiment of the present invention, and FIG. 1B is an essential part of a first insulating layer constituting the multilayer printed wiring board. FIG. 3 is an enlarged sectional perspective view of FIG.

FIG. 2 (a) is a partially cutaway sectional perspective view of a first circuit board manufactured by a method for manufacturing a multilayer printed wiring board according to an embodiment of the present invention, and FIG. FIG. 6 is a main-portion cross-sectional view showing a step in a method for manufacturing a multilayer printed wiring board according to an example.

3 is a cross-sectional view of a semiconductor device using the multilayer printed wiring board of FIG. 1 (a).

[Explanation of symbols]

 1, 1a Insulation layer 2 Depression 3 Inner wall 4a Inner layer surface 4b Surface 5, 5a, 5b Conductive path layer 6, 6a, 6b Input terminal 7, 7a, 7b Metal plating path 8 Insulation path 9 Separation path 10 Prepreg 11a First circuit Board 11b second circuit board 12, 12a through hole 13 edge 14 semiconductor chip

Claims (3)

[Claims] 1. A multilayer printed wiring board having a plurality of insulating layers (1) and a recess (2) for mounting a semiconductor chip, which penetrates at least one layer of the insulating layer (1). 2) a first insulating layer (1a) having a through hole (12), an edge of the through hole (12) formed on the inner layer surface (4a) of the first insulating layer (1a) (13) a plurality of solid conductive path layers (5) to which different potentials are applied, formed on the surface (4b) of the first insulating layer (1a) opposite to the inner layer surface (4a), A plurality of input terminals (6) to which different potentials are applied, the first insulating layer (1
a) a metal plating path (7) connecting the solid conductive path layer (5) and the input terminal (6) to the inner wall (3) of the through hole (12), and the first insulating layer. The through hole (12) of (1a) is connected to the insulating path (8) provided at the boundary of the solid conductive path layer (5), the plating is scraped off, and the first
A multi-layer printed wiring board, comprising: a separation path (9) exposing the insulating layer (1a). 2. A multilayer printed wiring board having a recess (2) for mounting a semiconductor chip and a solid conductive path layer (5) having different potentials around the recess (2) is manufactured by the following steps. A method for manufacturing a printed wiring board, comprising: The step is a step of plating the inner wall (3) of the through hole (12) for mounting a semiconductor chip formed in the first circuit board (11a) with metal, and the same step of the first circuit board (11a). Surface, forming a solid conductive path layer (5) of different potential reaching the edge (13) of the through hole (12), the inner wall (3) of the first circuit board (11a). ), The metal plating layer in contact with the insulating path (8) provided at the boundary of the solid conductive path layer (5) is scraped off, and the solid conductive path layer (5) is formed. A step of forming a metal plated path (7) connected to the metal plate, and an input terminal (6) connected to the metal plated path (7) of the first circuit board (11a), and a solid conductive path layer (5). Forming on the first circuit board (11a) on the opposite side, and forming on the first circuit board (11a) Solid-like conductive path layer (5)
Then, the second circuit board (11b) is superposed on the prepreg (10) having the through hole (12a) for mounting the semiconductor chip, and is heat-molded. 3. A semiconductor device having a semiconductor chip (14) mounted on the bottom of a recess (2) of the multilayer printed wiring board according to claim 1.