JPH0982900A - Optical semiconductor memory device, its information wiring method and reading out method, and optical semiconductor logic circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor memory device which can read out and write by optical signals, has a long holding duration for memorizing information and has a large capacity, and methods for information writing and reading out, and to provide an optical semiconductor logic circuit device using the optical semiconductor memory device. SOLUTION: A device is constituted of a collector layer 14 made from a first conductive semiconductor, a base layer 16 joined with the collector layer 14 and made from a second conductive semiconductor, an emitter layer 18 made from the first conductive semiconductor and joined with the base layer 16, and a quantum dot 26 formed in this base layer 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor memory device, and more particularly to a large-capacity optical semiconductor memory device capable of writing and reading stored information by an optical signal, an information writing method and an information reading method, and an optical semiconductor logic. Regarding circuit devices.

[0002]

2. Description of the Related Art Various researches have been conducted on optical semiconductor devices because the speed of signal processing and parallel processing of signals are easier than that of electronic devices that respond to or output electric signals. ing. Against this background, various storage devices using optical semiconductor devices have been proposed, but at present they have not been put to practical use. This is because even if the memory cell is constructed by the optical semiconductor device, the peripheral logic circuits and switching circuits have to be constructed by electronic devices. Therefore, the characteristics of the optical semiconductor device and the electronic device must be fully utilized. The reason for this is that it was not possible, and there was no clear device concept of the optical semiconductor memory device.

The inventors of the present application have proposed an optical semiconductor memory device for writing / reading with an optical signal by utilizing a change in current-voltage characteristics when a semiconductor having a pn junction is irradiated with light, as disclosed in Japanese Patent Application No. 7-65493. Proposed in the calligraphy. Japanese Patent Application No. 7-
The conventional optical semiconductor memory device described in Japanese Patent No. 65493 is
It is composed of a circuit in which a tunnel diode having a negative resistance characteristic and a load element are connected in series, and it is used as a memory device by utilizing a change in a bistable state of the circuit.

The optical semiconductor memory device described in Japanese Patent Application No. 7-65493 has a low voltage side stable point at the intersection of the IV characteristic curve a of the tunnel diode and the load line c, as shown in FIG. A bistable state having S ₁ and a high voltage side stable point S ₂ is shown. That is, the stable point can be controlled to the low voltage side stable point S ₁ or the high voltage side stable point S ₂ by changing the applied voltage.

When the tunnel diode is irradiated with light having an energy larger than the energy gap of the semiconductor material, electrons in the valence band are excited in the conduction band to form electron-hole pairs. At this time, the electrons are in the n-type layer,
Since holes are accumulated in the p-type layer, the current of the pn junction is reduced as a whole as compared with the case where light is not irradiated (dotted line b). As a result, the stable point is moved to the high voltage side, and only the high voltage side stable point S ₂ can be obtained.

As described above, it is possible to construct an optical semiconductor memory device in which the stored information can be rewritten by the applied voltage and the stored information can be reset by irradiating light. In addition, the inventors of the present application filed Japanese Patent Application No. 7-65.
Japanese Patent No. 493 also discloses an optical semiconductor memory device using a bipolar transistor type element.

An optical semiconductor memory device using a bipolar transistor type element is formed by a pnp junction or an npn junction, and all n layers and p layers are doped with impurities more than the effective state density. Hereinafter, description will be made using an npn junction element shown in FIG. The high-impurity-concentration npn junction is formed by connecting a tunnel diode having a negative resistance characteristic composed of an n-type region and a p-type region on the left side and a tunnel diode composed of a p-type region and an n-type region on the right side in series. Corresponding (FIG. 28 (a)). Here, since the tunnel diode on the right side is used by lowering the resistance by reverse bias, the current-voltage characteristic is almost equal to the characteristic of the tunnel diode on the left side as shown by the curve a in FIG. 28 (b).

When this structure is irradiated with weak light and a negative voltage is applied to the left n-type region and a positive voltage is applied to the right n-type region, holes generated by this weak light irradiation generate p-type regions. And the potential of the floating p-type region is lowered. Therefore, the conductor in the left n-type region faces the forbidden band of the p-type region, and it becomes difficult for electrons to move from the left n-type region to the p-type region by tunneling, and the peak current and valley current Also decreases.

As a result, the current-voltage characteristic is shown in FIG.
The curve b is shown in (b), and the stable point is the monostable state of only the high voltage side stable point S ₂ . On the other hand, by irradiating this structure with strong light, a negative voltage is applied to the left n-type region,
When a positive voltage is applied to the right n-type region, a large amount of holes generated by this strong light irradiation are accumulated in the p-type region, and the level of the floating p-type region is significantly lowered. Therefore, the number of electrons that move from the n-type region on the left side over the conduction band of the p-type region to the n-type region on the right side increases, and the current increases overall. Further, although the peak current also increases, the valley current further increases, so the negative resistance becomes weaker.

As a result, the current-voltage characteristic is shown in FIG.
It changes as shown by the curve c in (b), and the stable point becomes the monostable state of only the high voltage side stable point S ₁ . In addition, in the case of irradiating light with an intensity intermediate between the above weak light and strong light,
It exhibits almost the same characteristics as when it is not irradiated with light. By utilizing such characteristics, the bistable state can be changed only by the irradiation intensity of light. In other words, if the bistable state is formed without light irradiation, the peak current of the npn junction decreases when weak light is irradiated, so that the stable point moves to the high voltage side stable point S ₂ and becomes strong. When light is irradiated, the current increases and the stable point moves to the low voltage side stable point S ₁ .

Therefore, since the stable point can be moved by changing the irradiation intensity of light, the stored information can be changed only by the optical signal without using the electric signal. Further, since the irradiation intensity of light has an addition effect, it is possible to change the stable point by optical signals from two directions (for example, the X direction and the Y direction). Furthermore, by irradiating light with an intermediate intensity, it is possible to detect the change in the channel current due to light without changing the bistable state, so that the stored information can be read out without changing the stored information.

By the way, the quantum effect device is drawing attention as a new element suitable for miniaturization, and various studies have been made. In particular, high integration is expected for storage devices using quantum dots. The inventors of the present application have found that the transition between the ground levels of quantum dots has an extremely sharp optical absorption spectrum, and that it is possible to write and read information by light by causing strong absorption saturation due to optical absorption. It was found that the absorption wavelength of each quantum dot changes if the shape and size of the dot are changed, and information can be stored by wavelength multiplexing, and a wavelength multiplexing memory using quantum dots is proposed.

In a wavelength division multiplexing memory using quantum dots, for example, as shown in FIG. 29, a barrier layer 48 made of an AlGaAl layer is formed with a quantum dot 46 made of a GaAs layer sandwiched between the quantum dots 46 and an AlAs layer. A well layer 50 composed of layers is formed. When such a wavelength multiplexing memory is irradiated with light, electron-hole pairs are generated only when light having a wavelength corresponding to the separation energy between the ground levels of the quantum dots formed of the GaAs layer is irradiated.

Since electrons have a high tunnel probability,
The electrons thus generated tunnel through the barrier layer and transit to the X band of the AlAs layer having a low energy. On the other hand, since holes do not easily tunnel through the barrier layer, only holes are left in the quantum dots. In the state where holes are left in the quantum dots as described above, even if light having the same wavelength is further irradiated, strong absorption saturation occurs due to the existence of holes, and therefore light absorption hardly occurs.

Therefore, by utilizing this phenomenon,
Information can be written and read by light. Further, by changing the size of the quantum dot, that is, the separation energy E _S between the ground levels, information corresponding to a certain wavelength can be stored in an extremely small area.

[0016]

However, the conventional wavelength division multiplexing memory has a problem that the holding time of the stored information is as short as about 1 ns because the holding time of the stored information is determined by non-radiative recombination. Also, when electrons are moved to other wells by tunneling, the electrons return to the wells due to thermal excitation.
There is a problem that only a holding time of about s can be obtained.

Further, in order to detect absorption saturation by light,
Since a light receiving element for detecting light emission is required, there is a problem that the device becomes large in size. In addition, Japanese Patent Application No. 7-6
The optical semiconductor memory device described in Japanese Patent No. 5493 has a problem that it is difficult to increase the capacity as compared with a wavelength multiplexing memory using quantum dots.

An object of the present invention is to provide an optical semiconductor memory device having a relatively simple structure, a long storage time of stored information, a large capacity, and capable of reading and writing by an optical signal, an information writing method and an information reading method. Especially. Also,
Another object of the present invention is to provide an optical semiconductor logic circuit device using the above optical semiconductor memory device.

[0019]

The above object is to join a collector layer made of a semiconductor of the first conductivity type to the collector layer, and a base layer made of a semiconductor of the second conductivity type to the base layer. An optical semiconductor memory device comprising: an emitter layer made of a first conductivity type semiconductor; and quantum dots formed in the base layer.

In the above optical semiconductor memory device,
It is desirable that a plurality of quantum dots having different sizes be formed on the base layer. Further, it is preferable that the optical semiconductor memory device further includes a load element connected to the collector layer, and a bistable state is formed in the quantum dot.

By configuring the optical semiconductor memory device as described above, it is possible to write the stored information by the difference of the irradiation intensity of light, and it is possible to read the stored information without destroying the stored information. The device can be configured. Further, in the above optical semiconductor memory device, a first semiconductor layer of the first conductivity type, which is joined to the collector layer, is further provided, and a pn junction including the collector layer and the first semiconductor layer is formed. It is desirable to electrically read the stored information by changing the flowing current according to the stable state of the quantum dots.

In the above optical semiconductor memory device,
It is preferable that a plurality of the emitter layers are formed on the base layer. By forming a plurality of emitter layers, it is possible to write stored information depending on the difference in light irradiation intensity. Also, by detecting the collector current,
The stored information can be read out electrically.

In the above optical semiconductor memory device,
A second semiconductor layer of a second conductivity type is joined to at least one of the plurality of emitter layers, and the emitter layer and the second semiconductor to which the second semiconductor layer is joined. It is desirable that the bistable state of the quantum dot is formed by the negative differential resistance characteristic of the layer and the negative differential resistance characteristic of the other emitter layer and the base layer.

By thus configuring the optical semiconductor memory device, it is possible to significantly reduce the power consumption in the holding state. Further, in the above information writing method for an optical semiconductor memory device, the stable state of the quantum dots is changed by injecting light having a wavelength corresponding to the separation energy of the quantum dots to write information to the quantum dots. It is also achieved by an information writing method of an optical semiconductor memory device characterized by writing.

Further, in the above method for writing information in an optical semiconductor memory device, the conduction band from the emitter layer to the base layer is set in the quantum dots rather than the number of electrons generated by the generation of electron-hole pairs. By irradiating with strong light in which the number of electrons that reach the collector layer is dominant, the current flowing between the emitter layer and the collector layer can be increased to change the stable state to a low voltage side. desirable.

In the above method for writing information in an optical semiconductor memory device, the conduction band from one emitter layer to the base layer is more than the number of electrons generated by the generation of electron-hole pairs in the quantum dots. By irradiating strong light in which the number of electrons that reach the other emitter layer is dominant, the current flowing through the one emitter layer and the other emitter layer is increased, and the stable state is reduced to a low voltage. It is desirable to change to the side.

Also, in the above-described method for reading information from an optical semiconductor memory device, the number of electrons due to the generation of electron-hole pairs and the collector layer from the emitter layer to the base layer are reached. It is also achieved by an information reading method of an optical semiconductor memory device, characterized in that the stored information is read by irradiating an intermediate light having a number of electrons substantially equal to each other and detecting absorption of the irradiated light.

Further, in the above-described method of reading information from an optical semiconductor memory device, the number of electrons due to generation of electron-hole pairs and the collector layer from the emitter layer to the base layer are reached. According to a method of reading information of an optical semiconductor memory device, the stored information is read by irradiating an intermediate light having a number of electrons substantially equal to each other and measuring a photocurrent flowing in the direction of the first semiconductor layer. Is also achieved.

Further, in the above-described method for reading information from the optical semiconductor memory device, the number of electrons due to generation of electron-hole pairs and the number of electrons from one emitter layer to the other conduction band of the base layer are exceeded. It is also achieved by an information reading method of an optical semiconductor memory device, characterized by irradiating an intermediate light having a number of electrons that reaches substantially the same number and reading the stored information by detecting absorption of the irradiated light. It

Further, a column address signal line group composed of a plurality of electric wirings, a row address signal line group composed of a plurality of optical wirings provided in a direction intersecting the column address signal line group, and the column address signal line. Group and the above-described optical semiconductor memory device provided at each intersection of the row address signal line group, the emitter layer is connected to the column address signal line group, and the base layer is The optical semiconductor memory device is also characterized in that the light emitted from the row address signal line group is irradiated.

A column address signal line group consisting of a plurality of electric wirings, and a row address signal line group consisting of a plurality of optical wirings arranged in a direction intersecting the column address signal line group,
A read signal line group composed of a plurality of electric wirings arranged in parallel to the column address signal line group, and each column address signal line group and each intersection of the read signal line group and the row address signal line group. The above-mentioned optical semiconductor memory device is provided, the emitter layer is connected to the column address signal line group, and the base layer is irradiated with light emitted from the row address signal line group. This is also achieved by an optical semiconductor memory device characterized in that the first semiconductor layer is connected to the read signal line group.

Also, in an optical semiconductor logic circuit device having the above-mentioned optical semiconductor memory device, the collector layer of the optical semiconductor memory device is connected to a first power supply line via a load element, and the optical semiconductor memory device is provided. One emitter layer of the device is grounded, the other emitter layer of the optical semiconductor memory device is connected to a second power supply line, and storage is performed according to the intensity of two kinds of light with which the other emitter layer is irradiated. It is also achieved by an optical semiconductor logic circuit device characterized by changing information and outputting the information.

[0033]

BEST MODE FOR CARRYING OUT THE INVENTION

[A First Embodiment] The optical semiconductor memory device according to a first embodiment of the present invention will be explained with reference to FIGS. 1 is a schematic cross-sectional view showing the structure of the optical semiconductor memory device according to the present embodiment, FIG. 2 is a view showing the energy band structure of the optical semiconductor memory device according to the present embodiment, and FIG. 3 is a diagram showing the optical semiconductor memory device according to the present embodiment. FIG. 4 is a diagram illustrating a method of reading stored information, and FIG. 4 is a conceptual diagram illustrating a method of forming quantum dots having different sizes.

The optical semiconductor memory device according to the present embodiment is
Npn bipolar transistor having quantum dots in the source layer
It is formed by a transistor. That is, semi-insulating GaAs
On the substrate 10, the thickness is 300 nm and the impurity concentration is 5 × 10 5.
¹⁸cm^-3N⁺-Collector contact made of GaAs
A layer 12 is formed, on which a thickness of 300 nm, impurity concentration
3 × 10^Fifteencm^-3N^--This is made of AlGaAs
Layer 14 is formed and has a thickness of 100 nm and is impure
Material concentration 5 × 10 ¹⁹cm^-3P⁺-Base made of GaAs
Layer 16 is formed, on which a thickness of 200 nm, impurities
Concentration 1 × 10¹⁹cm^-3Emi consisting of n-AlGaAs
Is formed on top of it, with a thickness of 150 nm.
Material concentration 5 × 10¹⁹cm^-3N⁺-Emi made of GaAs
The contact contact layer 20 is formed. Collector con
On the tact layer 12 and the emitter contact layer 20, the
A collector electrode 22 and an emitter electrode 24 are formed respectively.
Have been.

Here, the point different from the ordinary hetero bipolar transistor is that the base layer 1 made of p ⁺ -GaAs is used.
6 has a plurality of quantum dots 26 of different sizes formed therein. In the specification of the present application, the quantum dots 26 having different sizes are visually represented, so that the quantum dots 26 are represented by different sizes of circles. The hetero-bipolar transistor in which the quantum dots 26 are formed in the base layer 16 has the energy band structure shown in FIG. That is, the base layer 1 in a normal npn junction
6, quantum dots 26 having a band gap narrower than the energy band gap of the base layer 16 and a separation energy between ground levels of E _S are formed.
Note that the energy band structure shown is for one quantum dot, and in addition to this, quantum dots having different separation energies E _S are localized.

Next, the operation of the optical semiconductor memory device according to the present embodiment will be explained. When light is incident on the optical semiconductor memory device shown in FIG. 2, light absorption occurs only when light having a wavelength corresponding to the separation energy E _S between the ground levels is incident, and an electron-hole pair is generated. The electrons in the quantum dots 26 thus generated move to the more stable level of the emitter layer 18 or the collector layer 14. On the other hand, the generated holes occupy the most stable level in the quantum dot 26, and energy is required to go out of the quantum dot 26. As a result, only holes are generated in the quantum dot 26. It will be left in the inside. In this way, information can be written in the quantum dots 26 by the incidence of light. In the state where holes are left in the quantum dots 26, even if light of the same wavelength is further irradiated, absorption saturation occurs because holes already exist, and therefore light absorption hardly occurs.

Similarly, when light of different wavelengths is incident, information can be written in another quantum dot corresponding to that wavelength. In a normal hetero-bipolar transistor, when light having an energy of 1.43 eV or more, which is the energy band gap of the base layer, is irradiated, electrons in the valence band are excited into the conduction band by light absorption, and the electron-hole pair is excited. Therefore, it is not possible to form a wavelength division multiplexing memory.

When light is incident on the quantum dots 26 stored in this way and the wavelength of the incident light is scanned, the result shown in FIG.
As shown in, light absorption saturation occurs only at the wavelength corresponding to the quantum dot in which information is written. Therefore, it is possible to read out as stored information by detecting light absorption in the quantum dots. In this embodiment, since the quantum dots 26 are provided in the base layer 16 of the npn junction element, the electrons generated by light absorption and moved to the emitter layer 18 or the collector layer 14 are less likely to return to the quantum dots 26. Therefore, the holding time can be lengthened as compared with the conventional optical semiconductor memory device shown in FIG.

As described above, according to this embodiment, npn
Since the optical semiconductor memory device is formed by providing the quantum dots in the p-type layer of the junction element, the holes generated in the quantum dots are less likely to be recombined, and the storage retention time can be lengthened. In addition, the size of the quantum dots is very small, so the usual hetero-bipolar transistor structure (1
× 1 μm, thickness about 0.1 μm), about 50,000 quantum dots can be formed, and a very large storage capacity can be realized.

In the above embodiment, the quantum dots are provided in the p-type layer of the npn junction element, but it is sufficient that the electrons generated in the quantum dots do not easily return to the quantum dots due to the energy difference of the pn junction. If there is at least one pn junction, the above effect can be obtained. Also,
In this embodiment, a plurality of quantum dots having different sizes are formed in the base layer.
The InAs strained layer can be formed by growing several atomic layers on the aAs substrate (for example, JY Marchin et al.
al., "Photoluminescence of Single InAs Quantum Do
ts Obtained by Self-OrganizedGrowth on GaAs ", Phy
s. Rev. Lett., Vol.73 (1994) pp.716-719). As shown in FIG. 4, the quantum dots formed by this method have different sizes at the slightly inclined edge portions, and therefore can be applied as they are as the base layer growth method of the present invention.

Since the size and shape of the quantum dots can be freely controlled by the growth temperature, the molar ratio of In and As, etc., the wavelength of light at which absorption saturation occurs can be made different among the quantum dots. it can. A Second Embodiment The optical semiconductor memory device according to a second embodiment of the present invention will be explained with reference to FIGS. The same components as those of the optical semiconductor memory device according to the first embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 5 is an energy band diagram for explaining the principle of the optical semiconductor memory device according to the present embodiment, FIG. 6 is a graph showing current-voltage characteristics in the optical semiconductor memory device according to the present embodiment, and FIG. 7 is according to the present embodiment. FIG. 8 is a schematic cross-sectional view showing the structure of the optical semiconductor device, FIG. 8 is a graph showing current-voltage characteristics in the optical semiconductor memory device shown in FIG. 7, and FIG. 9 is a schematic view showing the structure of the optical semiconductor memory device according to the modification of the present embodiment. FIG.

The optical semiconductor memory device according to the present embodiment is characterized in that, in the optical semiconductor memory device according to the first embodiment, the impurities of the n layer and the p layer are doped to have an effective state density or more. That is, as shown in FIG. 5, in an optical semiconductor memory device including an npn junction element in which quantum dots are formed in a base layer, the Fermi level of the n-type layer is located in the conduction band and the Fermi level of the p-type layer is located. The position E _f is located in the valence band.

Next, the principle of the optical semiconductor memory device according to the present embodiment will be explained. When each semiconductor layer is doped to have an effective density of states or more, electrons in the conduction band of the emitter layer 18 are in the valence band of the base layer 16, electrons in the valence band of the base layer are in the conduction band of the collector layer 14, and band-to-band tunneling is performed. Easier to do. Particularly, the tunneling phenomenon of electrons from the emitter layer 18 to the base layer 16 is what is called an Esaki tunnel, and has a negative differential resistance characteristic (hereinafter referred to as NDR characteristic).
have.

Further, since the npn layers are all heavily doped, the conduction band of the emitter layer 18 causes the base layer 16 to move.
Subsequent to tunneling to the valence band of the base layer 16
Since an interband tunnel (Zener tunnel) occurs from the valence band of the above to the conduction band of the collector layer 14, the NDR characteristic is maintained even between the emitter and the collector. The current-voltage characteristic between the emitter and the collector has a pulse-like increase N within a certain voltage range as shown by the solid line in FIG.
It has a DR characteristic. As described above, the current-voltage characteristic becomes pulse-like, when the electrons injected from the emitter layer 18 pass through the base layer 16, the electrons must pass through the hole level in the quantum dots 26. Because.

That is, when the emitter-collector voltage V _CE is low and the injected electrons have energy less than the hole level in the quantum dot 26, the current I _C does not flow (region I). . When the voltage V _CE between the emitter and the collector increases and the injected electrons have the energy of the hole level or higher, the injected electrons are transferred to the quantum dots 26.
Although the number of holes that can pass through the base layer 16 via the hole level in the quantum dot 26 is at most two, even if the spin is taken into consideration, a current of a predetermined value or more can be obtained. Does not flow (Region II). Furthermore, the voltage between the emitter and collector V _CE
Is increased, the valence band of the emitter layer 18 faces the forbidden band of the base layer 16 and the tunnel condition is not satisfied, so that no current flows (region III), as in the case of a normal Zener diode. In this way, the NDR characteristic appears.

When this structure is irradiated with weak light having an energy larger than the energy gap of the semiconductor material, electron-hole pairs are generated, and the electrons are emitted from the emitter layer 1.
8 moves to the base layer 16 side, so that the current decreases (dotted line in FIG. 6). Holes are base layer 1 compared to electrons
Since it is difficult to get out of 6 through tunneling, one hole is finally left in the quantum dot 26.

When intense light having an energy larger than the energy gap of the semiconductor material is irradiated, holes are further generated in the valence band of the base layer 16 and the base layer 1
Since the potential of 6 becomes low, electrons can move from the emitter layer 18 over the conduction band of the base layer 16 and the collector current increases (dotted line in FIG. 6). When light having an intensity of an intermediate level between the weak light and the strong light is incident, the decrease amount and the increase amount of the current cancel each other out, and the current-voltage characteristics are almost the same as those when the light is not irradiated.

When the above npn structure is applied to the optical semiconductor memory device according to the first embodiment, by applying a voltage between the emitter and the collector, the conduction band of the emitter layer 18 changes to the valence band of the base layer 16. Since electrons can be injected toward the ground level, holes formed by hole burning can be neutralized and eliminated by the injected electrons. That is, the stored information can be erased by the injection of electrons.

Next, the optical semiconductor memory device according to the present embodiment will be explained. The present embodiment constitutes an optical semiconductor memory device by forming a bistable state by using the above-mentioned characteristics, and includes an npn-type bipolar transistor having a quantum dot in a base layer and a load connected in series thereto. It is composed of elements.

That is, on the semi-insulating GaAs substrate 10,
N-G with a thickness of 100 nm and an impurity concentration of 5 × 10 ¹⁷ cm ⁻³
A channel layer 28 made of aAs is formed on the n ⁺ -G layer having a thickness of 200 nm and an impurity concentration of 1 × 10 ¹⁹ cm ^−3.
A collector layer 14 made of aAs is formed on the p ⁺ -G having a thickness of 100 nm and an impurity concentration of 5 × 10 ¹⁹ cm ^−3.
A base layer 16 made of aAs is formed, and an n ⁺ -Ga layer having a thickness of 200 nm and an impurity concentration of 1 × 10 ¹⁹ cm ⁻³ is formed on the base layer 16.
An emitter layer 18 made of As is formed. A resistance layer 30 is further formed on the channel layer 28. An electrode 32 is formed on each of the resistance layer 30 and the emitter layer 18.
And an emitter electrode 24 are formed. p ⁺ -GaA
In the base layer 16 made of s, a plurality of quantum dots 26 having different sizes are formed.

Here, when a voltage is applied between the emitter electrode 24 and the electrode 32 of the optical semiconductor memory device shown in FIG. 7, the current-voltage characteristic becomes as shown in FIG. That is, when light is not emitted, a bistable state having a low voltage side stable point S ₁ and a high voltage side stable point S ₂ where the solid line a and the load straight line d intersect is formed. When weak light is radiated to this structure, the emitter-collector current decreases and becomes as shown by the dotted line b, and the intersection with the load line d becomes the stable state only at the high voltage side stable point S ₂ ′. This state does not change even if the light is blocked,
Maintain a stable state on the high voltage side.

When strong light is applied, the emitter-collector current increases and becomes as shown by the alternate long and short dash line c, and the intersection with the load straight line d becomes a stable state only at the low voltage side stable point S ₁ . This state does not change even if light is blocked, and maintains a stable state on the low voltage side. In this way, by irradiating weak light or strong light, information can be written at either the high voltage side stable point S ₂ or the low voltage side stable point S ₁ .

On the other hand, when light with an intensity of an intermediate level between the weak light and the strong light is made incident, the decrease amount and the increase amount of the current cancel each other and the bistable state is maintained. At this time, if the stored information is written in the high voltage side stable point S ₂ ,
Since holes are taken into the quantum dots 26 and there are no electrons, the light absorption rate at that wavelength decreases due to absorption saturation. Moreover, in this case, neutralization with holes due to electron tunnels from the conduction band of the emitter layer 18 to the valence band of the base layer 16 does not occur, and the holes disappear by irradiation with light at the time of reading. Therefore, the holes can be retained for a long time.

When the stored information is written at the stable point S ₁ on the low voltage side, holes are unlikely to be present in the quantum dots 26, and the electrons from the conduction band to the valence band of the emitter are kept. Since the holes are in the condition of being neutralized with the electrons by the tunnel, absorption saturation does not occur, and even if holes are generated at the time of reading, they are immediately neutralized, and this state can be maintained for a long time.

Therefore, light having an intermediate intensity between weak light and strong light is made incident and the absorption of the light is measured or the change in current is measured to read the stored information without destroying the stored information. You can In the present embodiment, the current-voltage characteristic shown in FIG. 8 is obtained because the wavelength of incident light is the separation energy E of the quantum dots.
_Since it corresponds only to _S , by providing a plurality of quantum dots having different sizes in the base layer, it is possible to form a wavelength multiplexing memory capable of storing different information in different wavelength regions.

That is, a predetermined quantum dot is selected from a plurality of quantum dots having different sizes depending on the wavelength of irradiation light,
Memory information can be written by the irradiation intensity of light. Further, by irradiating light of intermediate intensity, the stored information can be read without destroying the stored information. As described above, according to the present embodiment, since the quantum dot is formed in the p-type layer and the optical semiconductor memory device is configured by the pn junction element having the NDR characteristic, it is possible to write the memory information due to the difference in the light irradiation intensity. It can be carried out. Further, the stored information can be read without destroying the stored information.

Although the ohmic resistance element is provided as the load element in the above embodiment, another load element may be used. For example, a tunnel diode, an ohmic resistance element, a Schottky diode, a constant current source, a field effect transistor, or the like can be applied. Further, as shown in FIG. 9, a pn junction composed of a p-type layer 34 and an n-type layer 36 is provided as a load element immediately below the collector layer 14, and npn
A pn junction structure may be formed. In this structure, if the quantum dots 26 are formed in the base layer 16, the collector layer 1
It is possible to form a bistable state in which the potential of 4 has a stable state in two states of a high voltage state and a low voltage state.
If the load element has the NDR characteristic, the two N
A bistable state is formed by the DR characteristic. Two
The case where a bistable state is formed by two NDR characteristics will be described in detail in the fifth embodiment. [A Third Embodiment] The optical semiconductor memory device according to a third embodiment of the present invention will be explained with reference to FIGS.
The same components as those of the optical semiconductor memory device according to the first and second embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 10 is a schematic sectional view showing the structure of the optical semiconductor memory device according to the present embodiment, and FIG. 11 is a schematic sectional view showing the structure of the optical semiconductor memory device according to a modification of the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that a p-type layer is further provided on the collector layer side of the optical semiconductor memory device according to the second embodiment shown in FIG. That is, FIG.
As shown in 0, on the semi-insulating GaAs substrate 10, p
A p-type layer 34 made of -GaAs is formed and n is formed thereon.
^A collector layer 14 made of ⁺ -GaAs is formed, and a base layer 16 made of p ⁺ -GaAs is formed thereon.
An emitter layer 18 made of n ⁺ -GaAs is formed thereon. The resistance layer 30 is further formed on the p-type layer 34. An electrode 32, a collector electrode 22, and an emitter electrode 24 are formed on the resistance layer 30, the p-type layer 34, and the emitter layer 18, respectively. p ⁺ -GaAs
A plurality of quantum dots 26 having different sizes are formed in the base layer 16 made of.

Here, in the present embodiment, the p-type layer 34 is formed immediately below the collector layer 14, but as described above, the p-type layer 3 is formed.
The provision of 4 facilitates electrically reading the stored information. That is, when the collector layer 14 is irradiated with light having an intermediate intensity, the light is transmitted when the potential of the base layer 16 is low (when it is held at the high voltage side stable point S ₂ side). The p-type layer 3
A photocurrent flows toward 4. Therefore, when the current is measured from the collector electrode 22 connected to the p-type layer 34, it is found that the stored information is held at the high voltage side stable point S ₂ when the photocurrent is detected. In this way, the stored information can be read out electrically.

As described above, according to the present embodiment, since the photocurrent corresponding to the stored information can be detected by providing the p-type layer immediately below the collector layer, the stored information can be read out electrically. In the optical semiconductor memory device according to the modification of the second embodiment shown in FIG. 9, the collector layer 1
The p-type layer 38 may be provided on the cathode 4 to form the collector electrode 22 (FIG. 11). By thus providing the p-type layer 38, the stored information can be electrically read out also in the optical semiconductor memory device shown in FIG. [A Fourth Embodiment] The optical semiconductor memory device according to a fourth embodiment of the present invention will be explained with reference to FIGS.
The same components as those of the optical semiconductor memory device according to the first to third embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 12 is a schematic cross-sectional view showing the structure of the optical semiconductor memory device according to the present embodiment, FIG. 13 is a diagram showing current-voltage characteristics in the optical semiconductor memory device according to the present embodiment, and FIG. 14 is an optical semiconductor according to the present embodiment. FIG. 15 is a diagram for explaining the read principle of the memory device, and FIG. 15 is a schematic cross-sectional view showing the structure of an optical semiconductor memory device according to a modification of this embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that the optical semiconductor memory device according to the second embodiment has a so-called multi-emitter structure in which a plurality of emitter electrodes are provided.

That is, as shown in FIG. 12, semi-insulating Ga
A collector contact layer 12 made of n ⁺ -GaAs is formed on the As substrate 10, and n ⁺ -GaAs is formed thereon.
A collector layer 14 made of p ⁺ -G is formed thereon.
A base layer 16 made of aAs is formed, and n ⁺
-Emitter layer 18a and emitter layer 18 made of GaAs
b, and emitter contact layers 20a and 20b are formed thereon. On the collector contact layer 12 and the emitter contact layers 18a and 18b, a collector electrode 22, an emitter electrode 24a, and an emitter electrode 24a, respectively.
24b are formed. A plurality of quantum dots 26 having different sizes are provided in the base layer 16 made of p ⁺ -GaAs.
Are formed.

Next, the operation of the optical semiconductor memory device according to the present embodiment will be explained. In the optical semiconductor memory device shown in FIG. 12, when a negative voltage is applied to the emitter electrode 24a and a positive voltage is applied to the emitter electrode 24b, the pn junction formed by the emitter layer 18a and the base layer 16 is forward biased, and the emitter layer The pn junction formed by 18b and the base layer 16 is reverse biased. Therefore, the current-voltage characteristics between the emitter electrode 24a and the emitter electrode 24b are as shown in FIG.

That is, the pn junction composed of the emitter layer 18a and the base layer 16 exhibits a forward NDR characteristic (curve a), and the pn junction composed of the emitter layer 18b and the base layer 16 exhibits a reverse diode characteristic (curve b). , Low voltage side stable point S
A bistable state is formed having ₁ and the high voltage side stable point S ₂ . In the optical semiconductor memory device having such a bistable state, as shown in the second embodiment, the current-voltage characteristic is changed by the light irradiation, and the stored information can be written. That is, when weak light is applied, the inter-emitter current decreases (dotted line c), the stable state only at the high-voltage side stable point S ₂ is stored, and when strong light is applied, the inter-emitter current increases (dashed line d). The stable state of only the low voltage side stable point S ₁ is stored.

Further, when a light having an intensity of an intermediate level between the weak light and the strong light is incident, the bistable state is maintained.
Therefore, it is possible to read the stored information without destroying the stored information by injecting light having an intermediate intensity and measuring the light absorption or the change in the current.
In the present embodiment, reading can be facilitated by detecting the collector current.

That is, when the stored information is written at the low voltage side stable point S ₁ , as shown in FIG.
Since the voltage applied between the emitter and the base is low, the potential difference is large and almost no collector current flows. On the other hand, when the stored information is written at the high voltage side stable point S ₂ , as shown in FIG. 14B, the potential difference is small and the collector current is large because the voltage applied between the emitter and the base is high. The stored information can be read out by such a difference in collector current.

As described above, according to this embodiment, an optical semiconductor memory device can be constructed by providing a plurality of independent emitter layers. Further, the stored information can be easily read by detecting the collector current. Further, since the optical semiconductor memory device having the multi-emitter structure has a simple structure, high integration can be facilitated.

In the above embodiment, two emitter electrodes are used.
However, more emitter electrodes may be formed. Further, in the above embodiment, as shown in FIG.
The quantum dots 26 may be arranged vertically. To realize this structure, the emitter layers 18a, 18
The quantum dots 26 may be arranged in the base layer 16 between the emitter layers 18 by utilizing the stress between b. That is, since a large stress is generated in the portion between the two emitter regions, if heating is performed after shape processing,
Dots can be formed only between the emitters. [A Fifth Embodiment] The optical semiconductor memory device according to a fifth embodiment of the present invention will be explained with reference to FIGS.
The same components as those of the optical semiconductor memory device according to the first to fourth embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 16 is a schematic sectional view showing the structure of the optical semiconductor memory device according to the present embodiment, and FIG. 17 is a diagram showing the current-voltage characteristic in the optical semiconductor memory device according to the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that the p-type layer is provided between the emitter layer and the emitter electrode in the optical semiconductor memory device according to the fourth embodiment.

That is, as shown in FIG. 16, semi-insulating Ga
A collector contact layer 12 made of n ⁺ -GaAs is formed on the As substrate 10, and n ⁺ -GaAs is formed thereon.
A collector layer 14 made of p ⁺ -G is formed thereon.
A base layer 16 made of aAs is formed, and n ⁺
-Emitter layer 18a and emitter layer 18 made of GaAs
b are formed on the p-type layers 34a and 3b, respectively.
4b is formed. Collector contact layer 12, p
The collector electrode 2 is formed on each of the mold layers 34a and 34b.
2. Emitter electrodes 24a and 24b are formed. p
^{In the} base layer 16 made of ⁺ -GaAs, a plurality of quantum dots 26 having different sizes are formed.

Next, the operation of the optical semiconductor memory device according to the present embodiment will be explained. In the optical semiconductor memory device shown in FIG. 16, when a negative voltage is applied to the emitter electrode 24a and a positive voltage is applied to the emitter electrode 24b, the pn junction composed of the emitter layer 18a and the base layer 16 is forward biased, and the p-type layer 34b is formed. The pn junction formed by the emitter layer 18b and the emitter layer 18b is forward biased.

Therefore, in this structure, as shown in FIG. 17, a bistable state is formed between the two NDR characteristics of the solid line a and the dotted line b. At this time, if the bistable state is set near the valley voltage, the emitter current I _E in the holding state can be greatly reduced. Therefore, the power consumption in the holding state can be suppressed. in this way,
According to the present embodiment, in the multi-emitter structure optical semiconductor memory device, the p-type layer is formed on the emitter layer to form the bistable state between the two NDR characteristics. Power consumption can be significantly reduced.

In this embodiment, the two emitter layers 1
Although p-type layers 34a and 34b are provided on 8a and 18b, respectively, the p-type layer may be formed only on one emitter layer. For example, when a bias is applied as in the above embodiment, only the p-type layer 34b may be formed without providing the p-type layer 34a. [A Sixth Embodiment] The optical semiconductor memory device according to a sixth embodiment of the present invention will be explained with reference to FIG. The first
The same components as those of the optical semiconductor memory device according to the fifth embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 18 is a schematic sectional view showing the structure of the optical semiconductor memory device according to the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that the quantum dots 26 are formed not in the base layer 16 but in the emitter layers 18a and 18b in the optical semiconductor memory device shown in FIG. That is, as shown in FIG. 18, on a semi-insulating GaAs substrate 10, n ⁺ collector contact layer 12 made of -GaAs is formed, the collector layer 14 made of n ⁺ -GaAs is formed thereon, the A base layer 16 made of p ⁺ -GaAs is formed on the n ⁺ -GaA layer.
An emitter layer 18a and an emitter layer 18b made of s are formed on which p-type layers 34a and 34b are formed, respectively. Collector contact layer 12, p-type layer 34
A collector electrode 22 and emitter electrodes 24a and 24b are formed on a and 34b, respectively. n ⁺ -GaA
A plurality of quantum dots 26 having different sizes are formed in the emitter layers 18a and 18b made of s.

Here, p-type layer 34a-emitter layer 18a
-Base layer 16 and p-type layer 34b-Emitter layer 18b-
A pnp junction bipolar transistor structure is formed in each of the base layers 16, and both pnp junction bipolar transistors are connected in series in the base layer 16. Therefore, the emitter layer 18 can be considered in the same manner as in the case where the quantum dots 26 are formed in the base layer 16 as shown in the fifth embodiment.
If the quantum dots 26 are provided on a and 18b, the emitter layer 1
The bistable state can be changed by irradiating 8a and 18b with light. Further, when the base layer 16 is irradiated with light, the stored information can be read according to the value of the collector current at that time.

As described above, according to this embodiment, in the optical semiconductor memory device having the multi-emitter structure, since the quantum dots are formed in the emitter layer, the memory information can be written by irradiating the emitter layer with light, By irradiating the base layer with light, the stored information can be read out without changing the stored information. In the present embodiment, the emitter layer 18 and the base layer 16 may be irradiated with light having the same wavelength but different intensities. In this case, even when the number of optical wirings is one, it is possible to selectively write and read the stored information by changing the light intensity. [A Seventh Embodiment] The optical semiconductor memory device according to a seventh embodiment of the present invention will be explained with reference to FIG. The first
The same components as those of the optical semiconductor memory device according to the sixth embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 19 is a schematic sectional view showing the structure of the optical semiconductor memory device according to the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that quantum dots are formed in each layer in an npn junction element, a pnp junction element, or the like. That is, as shown in FIG. 19, a plurality of storages formed by stacking a p-type layer 34, an n-type layer 36, and a p-type layer 38 on a semi-insulating substrate 10 with a collector contact layer 12 interposed therebetween. The element 44 is formed. An emitter contact layer 20 is formed on the p-type layer 38, and a collector electrode 22 and an emitter electrode 24 are formed on the collector contact layer 12 and the emitter contact layer 22, respectively. Quantum dots (not shown) are formed in each of the p-type layer 34, the n-type layer 36, and the p-type layer 38.

This structure is characterized in that the quantum dots have different sizes and that the quantum dots are electrically separated. Therefore, the stored information of one quantum dot is not affected by the rewriting of the stored information of other quantum dots, and if the size of the quantum dot can be arbitrarily selected, the wavelength of the optical pulse corresponding to that size can be changed. A large difference can be taken between the quantum dots, and the wavelength selectivity can be improved. Writing of stored information can be performed in the same manner as in the other embodiments described above.

For example, the transition energy of the quantum dot in the left storage element 44 is E ₁ , the transition energy of the quantum dot in the middle storage element 44 is E ₂ , and the transition energy of the quantum dot in the right storage element 44 is E ₃ . Suppose there is. This structure has a certain wavelength λ (= hc / E ₂ )
If only the central quantum dot reacts, it becomes possible to write and read information. The detailed read / write method is the same as in the other embodiments described above.

As described above, according to the present embodiment, since the respective quantum dots are electrically separated and arranged, even when the stored information of one quantum dot is rewritten, the storage of other quantum dots is performed. It can be done without affecting the information. [Eighth Embodiment] The optical semiconductor memory device according to the eighth embodiment of the present invention will be explained with reference to FIGS.
The same components as those of the optical semiconductor memory device according to the first to sixth embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 20 is a schematic sectional view showing the structure of the optical semiconductor memory device according to the present embodiment, and FIG. 21 is a graph showing the relationship between the size of the quantum dots and the growth temperature of the InAs layer. The optical semiconductor memory device according to the present embodiment is characterized in that the layer having quantum dots is formed of a multilayer film. That is, n-G is formed on the semi-insulating GaAs substrate 10.
A channel layer 28 made of aAs is formed, and n is formed thereon.
^A collector layer 14 made of ⁺ -GaAs is formed, a base layer 16 made of a multilayer film is formed thereon, and an emitter layer 18 made of n ⁺ -GaAs is formed thereon. A resistance layer 30 is further formed on the channel layer 28. An electrode 32 and an emitter electrode 24 are formed on the resistance layer 30 and the emitter layer 18, respectively.
The base layer 16 formed of a multilayer film is formed by stacking thin films having a plurality of quantum dots (not shown) of different sizes.

By forming the base layer 16 in this way, the number of quantum dots in the base layer 16 can be increased, and the storage capacity can be greatly increased. Also,
The size of the quantum dots in each layer can be easily changed by changing the growth temperature or the film thickness during the growth of each layer. For example, as shown in FIG. 21, InAs
It has been found that increasing the layer growth temperature increases the size of the quantum dots, and this technique can be used to form layers with different quantum dot sizes by varying the temperature in multiple layers.

As described above, according to this embodiment, since the base layer is formed of the multilayer film including the thin film having the quantum dots, the storage capacity can be greatly increased. In the above embodiment, the base layer is formed by the laminated film made of thin films having quantum dots, but such a layer may be applied to the emitter layer. For example, it can be applied to the optical semiconductor memory device according to the sixth embodiment shown in FIG. [A Ninth Embodiment] The information reading method and the information writing method of an optical semiconductor memory device according to a ninth embodiment of the present invention will be explained with reference to FIG. The same components as those of the optical semiconductor memory device according to the first to eighth embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 22 is a graph showing the information reading method and the information writing method of the optical semiconductor memory device according to the present embodiment. Since the optical semiconductor memory device according to the first to eighth embodiments is configured by using a plurality of quantum dots having different sizes, each quantum dot is irradiated with light having a wavelength corresponding to the size of the quantum dot. Memory information can be written and read.

Therefore, as shown in the first embodiment, when the light is incident on the optical semiconductor memory device storing the information and the wavelength of the incident light is scanned, the information is recorded as shown in FIG. Absorption saturation of light occurs only in the wavelength range corresponding to the written quantum dots. Therefore, it is possible to read out as stored information by detecting the absorption of this light.

In this way, it is possible to read what kind of stored information is stored in which quantum dot by one scan. On the other hand, when the stored information is written, it is performed by irradiating the light having the wavelength corresponding to the separation energy of each quantum dot.
As shown in (b), by irradiating only the light in the wavelength region corresponding to the quantum dots to be written with weakened or strengthened light, it is possible to collectively store an arbitrary information group.

If such collective information is regarded as one set of information, one element including a plurality of quantum dots having different sizes can provide various information as well as "0" or "1" information. It can store various memory information. That is, a so-called multi-valued memory, associative memory, or the like can be easily realized. Further, if the size of the quantum dot is considered as an address, it is possible to selectively write and read only with light of a certain wavelength.
It can be used as a memory device similar to M or a non-volatile memory. An embodiment of the memory array will be described later.

As described above, according to this embodiment, a plurality of pieces of stored information can be written and read at once, so that the present invention can be applied to a multi-valued memory, an associative memory, or the like. [A Tenth Embodiment] The optical semiconductor memory device according to a tenth embodiment of the present invention will be explained with reference to FIG. In addition,
The same components as those of the optical semiconductor memory device according to the first to eighth embodiments are designated by the same reference numerals to omit or simplify the description.

FIG. 23 is a plan view showing the structure of the optical semiconductor memory device according to the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that a plurality of memory elements are arranged to form a memory array. That is, as shown in FIG. 23, the optical wiring groups hν ₁ , hν ₂ , hν ₃ , ... Are arranged in the row direction.
Are arranged, and electric wiring groups ES ₁ , ES ₂ , ES ₃ , ... Are arranged in a direction intersecting these optical wirings hν _n .
A memory cell 40 including the optical semiconductor memory device according to any one of the second to seventh embodiments is provided at the intersection of the optical wiring hν _n and the electrical wiring ES _m .

When the optical semiconductor memory device according to the second embodiment (FIG. 7) is used as the memory cell 40, for example, the optical wiring hν _n has the memory cells 4 arranged in the row direction.
It is arranged so that the base layer 16 of 0 is irradiated with light. The electric wiring ES _m is connected to the emitter electrodes 24 of the memory cells 40 arranged in the column direction. In this way, the optical wiring hν _n
By providing the memory cell 40 at the intersection of the electrical wiring and ES _m , it is possible to write and read information for each memory cell 40.

For example, when writing information in the memory cell 40 provided at the intersection of the optical wiring hν ₂ and the electric wiring ES ₃ , a high level voltage is applied to the electric wiring ES _m other than the electric wiring ES _3. , Light that is weaker or stronger than the optical wiring hν ₂ . By doing so, only the memory cell 40 provided at the intersection of the optical wiring hν ₂ and the electric wiring ES ₃ is selected, and the high voltage side stable point S ₂ or the low voltage side stable point S ₂ is selected depending on the intensity of the incident light. Information can be stored in ₁ .

When reading the stored information, the optical wiring hν
_It is sufficient to irradiate the memory cell 40 with light having a predetermined wavelength from ₂ and detect the change in the absorptance at that wavelength. This is because when the stored information is stored at the high voltage side stable point S ₂ , the absorption rate decreases due to absorption saturation, but when the stored information is stored at the low voltage stable point S ₁ , absorption saturation does not occur. .
Therefore, the stored information can be read by detecting the change in the absorption rate.

By configuring the memory array in this way, an extremely large amount of stored information can be stored in a memory cell of the same size as a normal semiconductor memory.
The storage capacity can be dramatically increased. Furthermore, since the memory cells are connected by optical wiring, like conventional memory cells,
The wiring does not limit the cell size or the chip size, nor does the integration limit. That is, if the beam of light is narrowed down to a cell size (about 1 to 4 μm), it is not necessary to provide electrical wiring to each cell, and the degree of integration can be improved.

As described above, according to the present embodiment, since the memory array is configured by using the memory cell including the npn junction element having the quantum dots, the storage capacity can be dramatically increased. Further, since the memory cells are connected by the optical wiring, the restriction on the cell size due to the wiring can be suppressed. Although the optical semiconductor memory device according to the second embodiment shown in FIG. 7 is used as a memory cell in the above-described embodiment, when the optical semiconductor memory device according to the first embodiment shown in FIG. It is possible to configure the optical wiring group of two systems without providing it. In the optical semiconductor memory device according to the first embodiment, since the storage information is retained without using the bistable state, the retention time of the storage is shortened, but the restriction due to the wiring can be completely removed. [Eleventh Embodiment] An optical semiconductor memory device according to an eleventh embodiment of the present invention will be explained with reference to FIG. In addition,
The same components as those of the optical semiconductor memory device according to the third or tenth embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 24 is a plan view showing the structure of the optical semiconductor memory device according to the present embodiment. The optical semiconductor memory device according to the present embodiment is characterized in that the stored information can be read electrically. That is, as shown in FIG. 24, the optical semiconductor memory device according to the present embodiment has the optical wiring h
Electrical wiring groups ER ₁ , ER ₂ , ER ₃ , in the direction intersecting ν _n
... is further provided. When the optical semiconductor memory device according to the third embodiment shown in FIG. 10 is used as the memory cell 40, the electrical wiring ER _n is connected to the electrode 32 of the memory cell 40 arranged in the row direction.

When the stored information of the memory cell 40 provided at the intersection of the optical wiring hν ₂ and the electrical wiring ES ₃ is read, light having a predetermined wavelength is supplied from the optical wiring hν ₂ to the memory cell 40.
Then, the collector current may be detected by the electric wiring ER ₃ . When the collector layer 14 is irradiated with light having an intermediate intensity, the collector layer 14 has high and low potentials.
This is because the photocurrent flows toward the p-type layer 34 only when it is low (when it is held on the high voltage side stable point S ₂ side). In this way, the stored information can be read out electrically.

As described above, according to this embodiment, it is possible to electrically read the stored information in the memory array using the memory cell including the npn junction element having the quantum dots. In the tenth and twelfth embodiments, the case where the optical semiconductor memory device according to the first to third embodiments is used as a memory cell has been described, but the optical semiconductor devices according to the fourth to eighth embodiments are similarly performed. It may be applied to a storage device. [A Twelfth Embodiment] The optical semiconductor logic circuit device according to a twelfth embodiment of the present invention will be explained with reference to FIGS. The same components as those of the optical semiconductor memory device according to the sixth embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 25 is a diagram showing the structure and equivalent circuit of the optical semiconductor logic circuit device according to the present embodiment, and FIG. 26 is a graph for explaining the operation of the optical semiconductor logic circuit device according to the present embodiment. The optical semiconductor logic circuit device according to the present embodiment is characterized in that the optical semiconductor memory device according to the sixth embodiment is used to configure a logic circuit.

That is, as shown in FIG. 25A, a collector contact layer 12 made of n ⁺ -GaAs is formed on a semi-insulating GaAs substrate 10, and n ⁺ -G is formed thereon.
A collector layer 14 made of aAs is formed, and p is formed on the collector layer 14.
^A base layer 16 made of ⁺ -GaAs is formed, an emitter layer 18a and an emitter layer 18b made of n ⁺ -GaAs are formed on the base layer 16, and emitter contact layers 20a and 20b are formed thereon, respectively. A p-type layer 34 is formed on the layer 20a. A collector electrode 22 and emitter electrodes 24a and 24b are formed on the collector contact layer 12, the p-type layer 34, and the emitter contact layer 20b, respectively. Emitter layer 1
A plurality of quantum dots 26 having different sizes are formed in 8a and 18b.

In such a structure, the emitter electrode 2
4a is grounded, the emitter electrode 24b is connected to the power supply line _Vcc ', and the collector electrode 22 is connected to the power supply line _Vcc via the load element 42 (FIG. 25 (b)). The emitter layer 18b is adapted to be irradiated with incident light hν ₁ (1) and hν ₁ (2) which are input signals, and the output signal should be obtained from between the collector electrode 22 and the load element 42. You can

Next, the operation of the optical semiconductor logic circuit device according to the present embodiment will be explained. In the emitter layer 18b of the optical semiconductor logic circuit device shown in FIG. 25A, light hν corresponding to the separation energy between the ground levels of the quantum dots 26 is formed.
_{If 1} (1) and hν ₁ (2) are not irradiated, weak light (0,
The output becomes 1 in 0). When one is only one irradiation with light hv ₁ (1) or hv ₁ (2), an intermediate light (0,1) or (1,0) and the state is maintained.

[0103] When light hv ₁ (1) and hv ₁ (2) are both irradiated, strong light (1,1), and the output is zero (FIG. 2
6 (a)). Therefore, the output changes only when weak light or strong light is emitted, and does not change when intermediate light is emitted, and a circuit that holds the state can be realized (FIG. 26B).

As described above, according to this embodiment, it is possible to construct an optical semiconductor logic circuit device which changes its state by irradiation of light.

[0105]

As described above, according to the present invention, a collector layer made of a semiconductor of the first conductivity type is joined to the collector layer, and a base layer made of a semiconductor of the second conductivity type is joined to the base layer. If an optical semiconductor memory device is composed of an emitter layer made of a semiconductor of the first conductivity type and a quantum dot formed in the base layer, holes generated in the quantum dot are less likely to be recombined, and the retention time of memory is improved. Can be long.

Since the size of the quantum dots is very small, a very large storage capacity can be realized. Further, in the above optical semiconductor memory device, by forming a plurality of quantum dots having different sizes, it is possible to realize a wavelength multiplexing memory capable of storing information for each quantum dot by using light of different wavelengths.

In the above optical semiconductor memory device,
If a load element is connected to the collector layer and a bistable state is formed in the quantum dots, the stored information can be written due to the difference in the irradiation intensity of light, and the stored information can be stored without destroying the stored information. It is possible to configure an optical semiconductor memory device capable of reading the data. In the above optical semiconductor memory device, a first semiconductor layer of the first conductivity type, which is joined to the collector layer, is provided, and a current flowing in a pn junction formed of the collector layer and the first semiconductor layer is applied to a quantum dot. If it changes according to the stable state of
The stored information can be read out electrically.

In the above optical semiconductor memory device,
By forming a plurality of emitter layers, it is possible to write stored information depending on the difference in light irradiation intensity. Further, the stored information can be electrically read by detecting the collector current. In the above optical semiconductor memory device, at least one emitter layer of the plurality of emitter layers is joined to a second semiconductor layer of the second conductivity type, and the second semiconductor layer is joined to the emitter layer. If the bistable state of the quantum dot is formed by the negative resistance element formed by the second semiconductor layer and the negative resistance element formed by the other emitter layer and the base layer, the holding state is consumed. The power can be significantly reduced.

Further, the above-mentioned optical semiconductor memory device can change the stable state of the quantum dot and write information in the quantum dot by making the light of the wavelength corresponding to the separation energy of the quantum dot incident. In the above method for writing information in an optical semiconductor memory device, the quantum dots reach the collector layer beyond the conduction band of the base layer rather than the number of electrons generated by the generation of electron-hole pairs. Information can be written by irradiating with strong light in which the number of electrons to be generated is dominant to increase the current flowing between the emitter layer and the collector layer and change the stable state to the low voltage side.

In the above method for writing information in the optical semiconductor memory device, the number of electrons generated by the generation of electron-hole pairs in the quantum dot exceeds the conduction band from one emitter layer to the base layer. If the stable state is changed to a low voltage side by increasing the current flowing through one emitter layer and the other emitter layer by irradiating strong light in which the number of electrons reaching the other emitter layer is dominant , Can write information.

Further, in the above-described method of writing information in an optical semiconductor memory device, if light having a wavelength range corresponding to a plurality of quantum dots having different sizes is irradiated, information can be written in a plurality of quantum dots at once. it can. In addition, the above-described optical semiconductor memory device has an intermediate light intensity in which the number of electrons due to generation of electron-hole pairs and the number of electrons reaching the collector layer from the emitter layer beyond the conduction band of the base layer are substantially equal. The stored information can be read out without destroying the stored information by irradiating with and detecting the absorption of the irradiated light.

In addition, the above-mentioned optical semiconductor memory device is an electronic device.
Irradiation with intermediate light in which the number of electrons generated by the generation of hole pairs and the number of electrons reaching the collector layer from the emitter layer through the conduction band of the base layer are substantially equal to each other, and flows in the first semiconductor layer direction. By measuring the photocurrent, it is possible to read the stored information without destroying it. In addition, the above-described optical semiconductor memory device includes the number of electrons due to generation of electron-hole pairs,
Irradiate intermediate light that makes the number of electrons reaching the other emitter layer from the one emitter layer to exceed the conduction band of the base layer, and destroys stored information by detecting absorption of the emitted light. Can be read without

By handling the data collectively in this way, an associative memory or a multi-valued memory can be constructed. Also, a column address signal line group including a plurality of electric wirings, a row address signal line group including a plurality of optical wirings provided in a direction intersecting the column address signal line group, a column address signal line group and a row address signal. And the optical semiconductor memory device described above provided at each intersection with the line group, the emitter layer,
It is connected to the column address signal line group, and in the base layer,
If it is configured so that the light emitted from the row address signal line group is irradiated, it can be used in the same manner as an ordinary memory element such as SRAM.

In addition, a column address signal line group consisting of a plurality of electric wirings, a row address signal line group consisting of a plurality of optical wirings arranged in a direction intersecting the column address signal line group, and a column address signal line group are formed. 8. An optical semiconductor according to claim 7, wherein the read signal line group formed of a plurality of electric wirings arranged in parallel is provided at each intersection of the column address signal line group and the read signal line group and the row address signal line group. A memory device, the emitter layer is connected to the column address signal line group, and the base layer is irradiated with light emitted from the row address signal line group. The layers can form a memory array in which stored information can be electrically read by connecting to the read signal line group.

In the optical semiconductor logic circuit device having the optical semiconductor memory device described above, the collector layer of the optical semiconductor memory device is connected to the first power supply line via the load element, and the emitter of the optical semiconductor memory device is connected. The layer is grounded, the other emitter layer of the optical semiconductor memory device is connected to the second power supply line, the stored information is changed according to the intensity of the two kinds of light with which the other emitter layer is irradiated, and the information is output. Then, an optical semiconductor logic circuit device can be constructed.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing the structure of an optical semiconductor memory device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an energy band structure of the optical semiconductor memory device according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating a method of reading stored information in the optical semiconductor storage device according to the first embodiment of the present invention.

FIG. 4 is a conceptual diagram showing a method of forming quantum dots having different sizes.

FIG. 5 is an energy band diagram for explaining the principle of the optical semiconductor memory device according to the second embodiment of the present invention.

FIG. 6 is a graph showing current-voltage characteristics in the optical semiconductor memory device according to the second embodiment of the present invention.

FIG. 7 is a schematic sectional view showing the structure of an optical semiconductor device according to a second embodiment of the present invention.

8 is a graph showing current-voltage characteristics in the optical semiconductor memory device shown in FIG.

FIG. 9 is a schematic cross-sectional view showing the structure of an optical semiconductor memory device according to a modification of the second embodiment of the present invention.

FIG. 10 is a schematic sectional view showing the structure of an optical semiconductor memory device according to a third embodiment of the present invention.

FIG. 11 is a schematic cross-sectional view showing the structure of an optical semiconductor memory device according to a modification of the third embodiment of the present invention.

FIG. 12 is a schematic sectional view showing the structure of an optical semiconductor memory device according to a fourth embodiment of the present invention.

FIG. 13 is a diagram showing current-voltage characteristics in the optical semiconductor memory device according to the fourth embodiment of the present invention.

FIG. 14 is a diagram illustrating a read principle of an optical semiconductor memory device according to a fourth embodiment of the present invention.

FIG. 15 is a schematic cross-sectional view showing the structure of an optical semiconductor memory device according to a modification of the fourth embodiment of the present invention.

FIG. 16 is a schematic sectional view showing the structure of an optical semiconductor memory device according to a fifth embodiment of the present invention.

FIG. 17 is a diagram showing current-voltage characteristics in the optical semiconductor memory device according to the fifth embodiment of the present invention.

FIG. 18 is a schematic sectional view showing the structure of an optical semiconductor memory device according to a sixth embodiment of the present invention.

FIG. 19 is a schematic sectional view showing the structure of an optical semiconductor memory device according to a seventh embodiment of the present invention.

FIG. 20 is a schematic sectional view showing the structure of an optical semiconductor memory device according to an eighth embodiment of the present invention.

FIG. 21 is a graph showing the relationship between quantum dot size and InAs layer growth temperature.

FIG. 22 is a graph showing an information reading method and an information writing method of the photosemiconductor memory device according to the ninth embodiment of the present invention.

FIG. 23 is a plan view showing the structure of the optical semiconductor memory device according to the tenth embodiment of the present invention.

FIG. 24 is a plan view showing the structure of an optical semiconductor memory device according to an eleventh embodiment of the present invention.

FIG. 25 is a diagram showing a structure and an equivalent circuit of an optical semiconductor logic circuit device according to a twelfth embodiment of the present invention.

FIG. 26 is a graph illustrating an operation of the optical semiconductor logic circuit device according to the twelfth embodiment of the present invention.

FIG. 27 is a graph showing current-voltage characteristics in the conventional optical semiconductor memory device.

FIG. 28 is an energy band diagram showing a structure of a conventional optical semiconductor memory device and a graph showing current-voltage characteristics.

FIG. 29 is an energy band diagram showing a structure of a conventional optical semiconductor memory device.

[Explanation of symbols]

 10 ... GaAs substrate 12 ... Collector contact layer 14 ... Collector layer 16 ... Base layer 18 ... Emitter layer 20 ... Emitter contact layer 22 ... Collector electrode 24 ... Emitter electrode 26 ... Quantum dot 28 ... Channel layer 30 ... Resistance layer 32 ... Electrode 34 ... p-type layer 36 ... n-type layer 38 ... p-type layer 40 ... memory cell 42 ... load element 44 ... storage element 46 ... quantum dot 48 ... barrier layer 50 ... well layer

Claims (15)

[Claims] 1. A collector layer made of a semiconductor of a first conductivity type, a base layer made of a semiconductor of a second conductivity type and a base layer made of a semiconductor of a second conductivity type, and a base layer made of a semiconductor of a first conductivity type. And a quantum dot formed on the base layer. 2. The optical semiconductor memory device according to claim 1, wherein a plurality of quantum dots having different sizes are formed in the base layer. 3. The optical semiconductor memory device according to claim 2, further comprising a load element connected to the collector layer, wherein a bistable state is formed in the quantum dot. apparatus. 4. The optical semiconductor memory device according to claim 3, further comprising a first conductive type first semiconductor layer joined to the collector layer, the collector layer and the first semiconductor layer. Pn consisting of
An optical semiconductor memory device, wherein stored information is electrically read by changing a current flowing through a junction according to a stable state of the quantum dots. 5. The optical semiconductor memory device according to claim 3 or 4, wherein a plurality of the emitter layers are formed in the base layer. 6. The optical semiconductor memory device according to claim 5, wherein a second semiconductor layer of the second conductivity type is joined to at least one emitter layer of the plurality of emitter layers, Bistability of the quantum dot by the negative differential resistance characteristic of the emitter layer and the second semiconductor layer to which the semiconductor layer is joined and the negative differential resistance characteristic of the other emitter layer and the base layer. An optical semiconductor memory device characterized in that a state is formed. 7. The method for writing information in an optical semiconductor memory device according to claim 3, wherein the quantum dots of the quantum dots are irradiated with light having a wavelength corresponding to the separation energy of the quantum dots. An information writing method for an optical semiconductor memory device, characterized in that a stable state is changed to write information in the quantum dots. 8. The method for writing information in an optical semiconductor memory device according to claim 3, wherein the number of electrons generated by the generation of electron-hole pairs in the quantum dots is higher than the number of electrons generated by the emitter layer in the base. By irradiating with strong light in which the number of electrons reaching the collector layer over the conduction band of the layer is dominant, the current flowing between the emitter layer and the collector layer is increased, and the stable state is changed to the low voltage side. And a method for writing information in an optical semiconductor memory device. 9. The method for writing information in an optical semiconductor memory device according to claim 5, wherein the number of electrons generated from one emitter layer is greater than the number of electrons generated by generation of electron-hole pairs in the quantum dots. By irradiating with strong light in which the number of electrons reaching the other emitter layer exceeds the conduction band of the base layer, the current flowing through the one emitter layer and the other emitter layer is increased,
An information writing method for an optical semiconductor memory device, characterized in that the stable state is changed to a low voltage side. 10. The method for reading information from an optical semiconductor memory device according to claim 3, wherein the number of electrons due to generation of electron-hole pairs and the collector beyond the conduction band of the base layer from the emitter layer. Irradiate with intermediate light that makes the number of electrons reaching the layer almost equal,
An information reading method for an optical semiconductor memory device, characterized in that stored information is read by detecting absorption of the irradiated light. 11. The method for reading information from an optical semiconductor memory device according to claim 4, wherein the number of electrons due to generation of electron-hole pairs and the collector exceeding the conduction band of the base layer from the emitter layer. Information of an optical semiconductor memory device characterized in that stored information is read by irradiating an intermediate light in which the number of electrons reaching the layer is almost equal to and measuring a photocurrent flowing in the direction of the first semiconductor layer. Read method. 12. The method for reading information from an optical semiconductor memory device according to claim 5, wherein the number of electrons generated by the generation of electron-hole pairs and the conduction band of one emitter layer exceeds the conduction band of the base layer. And irradiate with intermediate light that makes the number of electrons reaching other emitter layers almost equal,
An information reading method for an optical semiconductor memory device, characterized in that stored information is read by detecting absorption of the irradiated light. 13. A column address signal line group including a plurality of electric wirings, a row address signal line group including a plurality of optical wirings provided in a direction intersecting the column address signal line group, and the column address signal line. Group and the row address signal line group, and the optical semiconductor memory device according to any one of claims 1 to 3 provided at each intersection, wherein the emitter layer is connected to the column address signal line group. The optical semiconductor memory device is characterized in that the base layer is irradiated with light emitted from the row address signal line group. 14. A column address signal line group including a plurality of electric wirings, a row address signal line group including a plurality of optical wirings arranged in a direction intersecting with the column address signal line group, and the column address signal line. A read signal line group composed of a plurality of electric wirings arranged in parallel to the group, and provided at each intersection of the column address signal line group and the read signal line group and the row address signal line group. 4. The optical semiconductor memory device according to 4, wherein the emitter layer is connected to the column address signal line group, and the base layer is irradiated with light emitted from the row address signal line group. The optical semiconductor memory device, wherein the first semiconductor layer is connected to the read signal line group. 15. An optical semiconductor logic circuit device having the optical semiconductor memory device according to claim 6, wherein the collector layer of the optical semiconductor memory device is connected to a first power supply line via a load element, One emitter layer of the optical semiconductor memory device is grounded, and the other emitter layer of the optical semiconductor memory device is connected to a second power supply line. The intensity of two kinds of light with which the other emitter layer is irradiated is adjusted. An optical semiconductor logic circuit device characterized in that stored information is changed in accordance with the output and the information is output.