JPH0974695A - Battery circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To fulfill noise resistance when the voltage of an AC power supply is close to a discharged voltage of a battery and also to suppress a voltage drop due to a delay in switching time by cramping to a predetermined voltage value until a drop in voltage is detected and a predetermined detection delay time expires. SOLUTION: Power input from a power supply section 1 is output to a power output section 2 through a diode 8. A voltage at the power supply section 1 is applied to a plus terminal of a comparator 6; if the input voltage becomes lower than a reference voltage 5, then the output becomes 'L' after a predetermined delay time and n-channel FET7 turns on. Then, the secondary battery 3 starts to discharge and supplies power to the power output section 2. At that time, the potential of a source terminal 7b can be cramped to a predetermined value by the function of a power Zener and thus a sufficient detection delay can be taken. Therefore, a surge current is reduced by making the voltage rise slower when turning on a discharge switch, and thus the strength of a semiconductor to be used can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is capable of supplying electric power from an external AC power source and an internal rechargeable secondary battery.
In a battery circuit that switches to discharge the secondary battery and supply power when the voltage of the power supply drops, a battery circuit that can keep the fluctuation of the output voltage within a predetermined range for the operational stability of the circuit at the next stage. Regarding

[0002]

2. Description of the Related Art FIGS. 3 to 4 are views for explaining a conventional technique. FIG. 3 is a conventional battery circuit, and FIG. 4 is a diagram showing voltage and current waveforms during operation of the circuit.
(a) is the voltage of the power output section 32, (b) is a p-channel FET
The currents flowing from the source terminal 37b to the drain terminal 37a of 37 are shown. It should be noted that where the wirings intersect in a cross shape in FIG. 3, the circuit does not branch in four directions, but the wirings extending vertically and the wirings extending laterally simply intersect without electrical connection. Represents a state. The electrically connected branches are only represented by a T.

In FIG. 3, the power input section 31 is an external A
Power is supplied from the C power supply. The input power is rectified by the first diode 38 and is sent from the power output unit 32 to the external next-stage circuit.

The charger 34, which is supplied with electric power from the electric power input section 31, operates at a voltage higher than the supplied voltage of the secondary battery 3.
Charge 3 Here, the charging voltage is made higher than the supply voltage in order to make the output voltage when AC is used and the output voltage when the secondary battery 33 is used close to each other, and to guarantee stable operation of the circuit at the next stage. .

In order to make the discharge voltage of the secondary battery 33 close to the voltage during AC steady use, the charge voltage must be higher than the AC steady voltage at least at the end of charging. Here, the p-channel FET 37 is incorporated as a discharge switch that connects the secondary battery 33 to the power output unit 32 when the AC voltage drops, and is turned off at the time of charging, so that the output of the charger is the power output unit. Prevent it from going out to 32. Without this, the secondary battery 33 cannot be charged, and the efficiency of use of the circuit deteriorates.

The output of the comparator 36 takes a predetermined value when the voltage of the power input section 31 falls below the reference voltage 35. This output is the gate terminal 3 of the p-channel FET 37.
7c, the p-channel FET 37 is turned on, and the power from the secondary battery 33 is supplied to the second diode 39.
The power is supplied to the power output unit 32 via.

[0007]

However, according to the above-mentioned conventional technique, until the p-channel FET 37 is turned on and the power supply is switched to the secondary battery 33 side, the voltage drop on the AC power supply side remains as it is. It is transmitted from the output unit 32 to the next-stage device.

As shown in FIG. 4 (a), when the AC voltage that starts to fall falls below the threshold value 41, the detection delay 42
After a lapse of time corresponding to, the p-channel FET 37 is turned on and the secondary battery 33 starts discharging. After that, the voltage gradually starts to rise and recovers to the battery discharge voltage 43.

Therefore, the DC-DC converter or the like connected to the next stage of the battery circuit must be capable of stable operation in a wide voltage range that allows the potential difference 44. Conversely, if the potential difference 44 is reduced in order to use a device with a narrow voltage range,
The detection delay 42 should be shortened. However, for noise that is longer than the time width of the detection delay 42,
The p-channel FET 37 turns on and the secondary battery 33 starts to discharge. That is, in order to shorten the detection delay 42, an additional noise countermeasure is required, which causes a problem that the circuit becomes complicated.

Further, as shown in (b), p-channel FET
The current flowing through 37 is "0" because the p-channel FET 37 is off while the AC power supply is normal. When a voltage drop is detected and the p-channel FET 37 is turned on, a large current temporarily flows as the peak current 45,
Eventually, the steady current 46 is reached. Therefore, the p-channel FET 37 does not have the steady current 46 but the peak current 45.
Was required to endure.

The present invention satisfies the above noise resistance when the voltage of the AC power source and the battery discharge voltage are close to each other,
Moreover, it is an object of the present invention to provide a battery circuit that suppresses a voltage drop due to a switching time delay.

[0012]

FIG. 1 is a diagram showing a battery circuit according to the present invention. The battery circuit of the present invention has an external A
A power input unit 1 that receives power from the C power source, a power output unit 2 that outputs power to the next-stage circuit, a rechargeable secondary battery 3, and a power source that is higher than that supplied from the power input unit 1. A charger 4 that charges the secondary battery 3 with a voltage, and a comparator that receives the voltage of the power input unit 1 at the positive side terminal and compares it with a reference voltage 5 connected to the negative side terminal to detect a voltage drop of the AC power supply. 6, the first diode 8 connected in the forward direction from the power input unit 1 to the power output unit 2, and the secondary battery 3
In a battery circuit including a switch circuit that selectively outputs the discharge power of the battery according to the output of the comparator 6, and a second diode 9 that is connected in the forward direction from the output of the switch circuit to the power output unit 2. The circuit connects the drain terminal 7a to the positive side terminal of the secondary battery 3, and connects the source terminal 7b to the power output unit 2 via the second diode 9, and from the drain terminal 7a to the gate terminal 7c. The third diode 10 connected in the forward direction, the fourth diode 11 connected in the forward direction to the gate terminal 7c, and the light emitting side terminals 12a and 12b from the output terminal of the comparator 6 to the power output unit 2. Is connected in the reverse direction, the light-receiving side terminals 12c and 12d are connected in the reverse direction from the source terminal 7b to the fourth diode 11, and the comparator 6 is And Hotoborukapura 12 which is turned on when detecting the voltage drop of the source, and a.

[0013]

The power supplied from the external AC power source is sent from the power input unit 1 to the power output unit 2 via the first diode 8. At this time, if the voltage of the AC power supply is high enough,
Since the discharge switch composed of the n-channel FET 7, the photo coupler 12, and the third diode 10 to the fourth diode 11 is in the off state, the secondary battery 3 is charged by the charger 4 without being discharged.

When the AC voltage falls below the threshold value, it is detected by the detection unit composed of the reference voltage 5 and the comparator 6, but the discharge switch does not switch immediately. The voltage continues to drop and is clamped to this value when it reaches a predetermined voltage. The predetermined voltage value is determined by the characteristics of the gate threshold voltage of the n-channel FET 7 and the forward voltage drop of the third diode 10 and the battery discharge voltage of the secondary battery 3.

When a voltage drop is detected and a predetermined detection delay time has passed, the n-channel FET 7 is turned on and the secondary battery 3 starts discharging. The voltage held at the clamped value rises to the discharge voltage of the secondary battery 3.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In FIG. 1, power input from a power supply unit 1 passes through a first diode 8 and is output to a power output unit 2. At this time, when the voltage drop detector detects a drop in the power supply voltage, the discharge switch circuit is switched accordingly, and the secondary battery 3 connected to the power output unit 2 starts discharging.

The voltage drop detecting section is composed of a reference voltage 5 and a comparator 6, the voltage of the power input section 1 is applied to the positive terminal of the comparator 6, and the reference voltage 5 is connected to the negative terminal side. Here, the output of the comparator 6 is maintained at “H” while the input voltage is higher than the reference voltage 5. On the other hand, when the input voltage falls below the reference voltage 5, the output becomes “L” after a predetermined delay time. This delay time is for confirming that the voltage drop is not instantaneous due to noise.

The switch circuit comprises an n-channel FET 7, a photobol coupler 12, a third diode 10 and a fourth diode 11. According to the “L” output from the comparator 6, the photobol coupler is connected to the light emitting side terminal 12c.
And a voltage is generated between 12d and n-channel FET
Turn on 7. When the n-channel FET 7 turns on,
A current flows between the source terminal 7b and the drain terminal 7a and flows into the power output unit 2 via the second diode 9. That is, the secondary battery 3 starts discharging and supplies power to the power output unit 2.

Here, the photobol coupler is an element which generates a voltage between the terminals 12c and 12d on the light receiving side by the light emission of the diode between the terminals 12a and 12b on the light emitting side. This voltage allows the n-channel FE
The potential of the gate terminal 7c of T7 can be made higher than that of the source terminal 7b. Further, the n-channel FET 7 is turned on when the potential of the gate terminal 7c is higher than the predetermined threshold value with respect to the source terminal 7b.

An n-channel FET having a small on-resistance can be used by using the photo coupler. n
The channel FET has a structure in which the on-resistance can be lowered as compared with the p-channel FET when using the same cell area, that is, the same chip size. With the same on-resistance, a smaller chip size can be used.

This switch circuit has two functions.
The drain terminal 7a and the source terminal 7b of the channel FET 7
Has a function equivalent to that of a circuit in which a power Zener and a switch are connected in parallel between and. The function of the power zener is composed of the n-channel FET 7 and the third diode 10, and the function of the switch is composed of the n-channel FET 7, the photobol coupler 12 and the fourth diode 11.

With the function of the power Zener, the potential of the source terminal 7b can be clamped to a predetermined value. When the voltage of the gate terminal 7c exceeds a predetermined threshold value V _TH with respect to the voltage of the source terminal 7b, the n-channel FET 7 is turned on. The potential of the drain terminal 7a to the source terminal 7b becomes higher by an amount obtained by adding the voltage V _F and V _TH that is determined by the characteristics of the third diode 10, a current toward the drain terminal 7a to the source terminal 7b Flowing. That is, to operate the circuit in the same way that there's containing the (V _F + V _TH) of the Zener diode.

Here, the drain terminal 7a of the n-channel FET 7 has the same potential as the positive terminal of the secondary battery 3, and the source terminal 7b has the same potential as the power output section 2. this is,
Reduces the potential of the power output section 2, the difference between the battery discharge voltage of the secondary battery 3 is greater than (V _F + V _TH), means that the current flows from the secondary battery 3 to the power output unit 2 However, it is clamped so that the voltage does not drop below that value.

On the other hand, the switch function causes the power of the secondary battery 3 to be supplied to the power output unit 2. When the photobol coupler 12 is turned on by the output from the comparator 6, the gate terminal 7c is held at a potential higher than the source terminal 7b by V _TH . This situation does not change even if the potential of the power output unit 2 exceeds the clamped value, the n-channel FET 7 continues to turn on, and the potential of the power output unit 2 rises to the battery discharge voltage 23 of the secondary battery 3. To do.

As described above, since the power Zener and the switch are constructed by using the same FET, an n-channel FET having a low ON resistance can be used.

FIG. 2 is a diagram showing voltage / current waveforms of the circuit of the present invention. (A) shows the voltage of the power output section 2, and (b) shows the drain terminal 7a to the source terminal 7b of the n-channel FET 7.
It shows the current flowing to.

As shown in FIG. 4 (a), when the AC voltage that starts to fall falls below the threshold 21, the detection delay 22
After a lapse of time, the n-channel FET 7 is turned on and the secondary battery 3 starts discharging. After that, the voltage gradually starts to rise and recovers to the battery discharge voltage 23. However, even if the voltage is about to drop during the detection delay 22, the potential difference 24 from the battery discharge voltage 23 is (V _F +
V _TH ).

As shown in (b), the current flowing through the n-channel FET 7 is the current flowing through the n-channel FET 7 while the AC power supply is normal.
Is "0" because is off. When the voltage is lowered potential difference 24 between the battery discharge voltage 23 is going to spread over (V _F + V _TH), the current 25 flows. Eventually, the n-channel FET 7 is completely turned on, and finally reaches the steady current 26.

[0029]

As described above, in the present invention,
Since the supply voltage to the power output unit can be clamped to a predetermined value, a sufficient detection delay can be taken. Therefore, a microprogram or the like can be interposed for detection or switching. Further, since the detection delay time has a margin, the voltage rise can be moderated when the discharge switch is turned on, the surge current can be reduced, and the withstand capacity of the semiconductor used can be reduced.

In the present invention, an n-channel FET can be used as the FET used as the discharge switch. here,
Since an n-channel FET having a smaller on-resistance can be used than a p-channel FET, it is possible to suppress the voltage drop in the case of the same size, and a smaller size in the case of the same voltage drop. Can be used. Therefore, according to the present invention, the cost and space can be suppressed as compared with the conventional technique in which only the p-channel type can be used.

[Brief description of drawings]

FIG. 1 is a diagram showing a battery circuit of the present invention.

FIG. 2 is a waveform diagram of the circuit of the present invention.

FIG. 3 shows a prior art battery circuit.

FIG. 4 is a waveform diagram of a prior art circuit.

[Explanation of symbols]

 1 Power Input Section 2 Power Output Section 3 Secondary Battery 4 Charger 5 Reference Voltage 6 Comparator 7 n-Channel FET 8 First Diode 9 Second Diode 10 Third Diode 11 Fourth Diode 12 Photobol Coupler

Claims (1)

[Claims] 1. A power input unit (1) which receives power from an external AC power supply, a power output unit (2) which outputs power to an external next-stage circuit, and an internal charging unit. A possible secondary battery (3), which is connected between the power input part (1) and the positive terminal of the secondary battery (3) and is higher than the power supplied from the power input part (1). A charger (4) for charging the secondary battery (3) with a voltage, and a voltage of the power input unit (1) at one input terminal,
Compare with the reference voltage (5) connected to the other input terminal,
Comparator (6) for detecting a voltage drop of the AC power supply
A first diode (8) connected in a forward direction from the power input unit (1) to the power output unit (2); and a discharge power of the secondary battery (3), a comparator (6)
A switch circuit that selectively outputs the output of the switch circuit, and a second diode (9) that is connected in the forward direction from the output of the switch circuit to the power output unit (2). The switch circuit has a drain terminal (7) at the positive terminal of the secondary battery (3).
a) and an n-channel FET (7) connecting a source terminal (7b) to the power output part (2) via a second diode (9), and a drain terminal (n) of the n-channel FET (7). A third diode (10) connected in the forward direction from 7a) to the gate terminal (7c), and a fourth diode connected in the forward direction to the gate terminal (7c) of the n-channel FET (7). (11), the light emitting side terminals (12a, 12b) are connected in the reverse direction from the output terminal of the comparator (6) to the power output section (2), and the source terminal of the n-channel FET (7) ( 7b) is connected to the fourth diode (11) to the terminals (12c, 12d) on the light receiving side, and the photobol coupler (12) is turned on when the comparator (6) detects a voltage drop of the AC power supply. When Battery circuit, characterized in that they are composed of.