JPH0964853A - Error processing system for parallel signal on the occurrence of fault in transmission line - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the reliability of a transmitter by generating a control signal when a fault is detected and using selectors operated selectively at a sending end and a receiving end of a faulty transmission line so as to reserve a parallel transmission line with an equal delay time to that of the faulty transmission line to output the signal. SOLUTION: An input signal to a succeeding transmission line CH(i+1) connecting to other side input terminal Ii is given to a transmission line CH(i+1) connecting to an output terminal by an L level of a selection signal S generated when a control section 2 detects normality of transmission line with its outputs of receiving end selectors 5-1 - 5-n. A 2 to 1 selector 5-i of a path changeover section 4 at a receiver side is operated by an L level of the signal S generated when a fault of a transmission line is detected, based on the outputs of the selectors 5-1 θ 5-n of the control section 2. Thus, a signal received from a transmission line CHi connecting to one side In of two input terminals and given to the transmission line Chi as an output signal normally is switched so that an output signal CH(i+1) from a succeeding transmission line CH(i+1) connecting to the other side Ii of the 2 input terminal is made to be an output signal of the transmission line CHi.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a processing method for an error when a failure occurs in a transmission path of a parallel signal having a fixed number of bits n, such as between boats in a computer or a transmission processing device or between devices. In recent years, in information processing equipment such as computers,
Since the processing speed and processing capacity have improved with the increase in the speed of the processor, parallel signals are often handled, but in the transmission of the parallel signals, there is a technique that is further improved as a countermeasure against a failure in the transmission path. Recently, even in parallel transmission of optical signals capable of high-speed and large-capacity transmission, an error processing method at the time of failure of the parallel optical lines has been attracting attention.

[0002]

2. Description of the Related Art In the past, parallel data transmission inside a computer or a transmission processing device has been mostly a conventional transmission line and no spare transmission line. If there is a failure even in a transmission path of at least 1 bit, there is a problem that an n-bit signal having a meaning summarized in n-bits will be adversely affected as error data. Even in parallel transmission of optical signals, deterioration of the light emitting element on the transmitting side or the light receiving element on the receiving side of the optical line for each bit may adversely affect the n-bit parallel data transmitted by the n parallel optical lines. It is possible to receive it. Therefore, in the conventional technology (for example, H04-346279 in the publication), as shown in FIG. 12, a new redundant data is added to the input data in the case where the input / output data are both n parallel electric signals. Number of terminals with input n and output (n + m) with m bits added nx (n +
m) electric signal matrix switch 1A is provided, and the output n-bit data is provided with redundancy means for the optical signal matrix switch 3A having (n + m) xn input / output terminals. Then, an electro-optical conversion circuit having the number of signal terminals whose input and output are both parallel (n + m) between these two matrix switches 1A and 3A.
By providing 2A, it is possible to guarantee the parallel transmission of n-bit signals of parallel n electrical signals by coping with the failure of up to m optical signal paths among (n + m) optical signal paths in parallel. Was going on.

[0003]

However, in the above-mentioned conventional technique, the matrix switch 1A of (n + m) electric signals of (nx (n + m)) and (n + m) are provided as redundancy means for parallel transmission of n-bit signals. xn optical signal matrix switch 3A
However, there are problems that the control circuits 4A are complicated, that the characteristics of the optical signal matrix switch itself are not uniform, and that the overall circuit scale is large.
Furthermore, in the conventional redundancy means using the above matrix switch, the signal path of the output (n + m) of nx (n + m) and the input (n + m) of (n + m) xn is changed. In this case, depending on the signal path selected by the switch, for example, when the first bit of the input data does not become the first bit of the output data, the path length before and after the selection changes, so n parallel transmission is performed. The output data may be out of phase in a certain bit of the n-bit data to be output, and the output data may be in a so-called skew state. Therefore, the parallel transmission distance of the n-bit signal is limited to a certain length or less. There was a problem that I had to do. An object of the present invention is to output n-parallel data as an output even when some of the n parallel transmission paths used are disturbed during parallel transmission of n-bit n-bit data in parallel. , To obtain n-bit data of the correct phase, which is not the error state of out-of-phase between bits, which is called skew, by using the optical signal matrix switch as before even if the n parallel transmission lines are optical transmission lines. Another object of the present invention is to provide a processing method at the time of a failure of a parallel signal transmission path that can be realized by a simple circuit configuration of only electric signals without using an electric signal matrix switch whose control is complicated.

[0004]

The basic configuration of the present invention for achieving this object is to transmit a plurality of n signal sequences through the same plurality n of parallel transmission paths as shown in the principle diagram of FIG. , A plurality of n regular transmission channels CH1 to CHn, and a spare transmission channel CH (n + 1) whose transmission end is directly connected to the nth CHn input signal of the regular transmission channel. , A transmission line in a normal state when a failure occurs by facing the transmission end and the reception end of the plurality of n transmission lines
2-to-1 selectors 3-1 to 3- (n-1), 5-1 to 5-n that switch CHi to the next transmission channel CH (i + 1) in order, and the first CH1 of the regular transmission channel And the backup transmission line CH (n + 1) include both selectors and delay lines L1 and L2 for equalizing the total delay time with other transmission lines. When the output of 5-n is monitored and it is detected that any one of the regular multiple n channels CH1 to CHn has failed, for example CH2, a control signal is generated and the failure is generated. 3-2,5-2 Selector on the sending end and receiving end of transmission path CH2
All the subsequent selectors 3-2 to 3- (n-1) and 5-2 to 5-n are caused to perform the selection operation described above, and n parallel transmission lines having the same delay time are always provided even when the failure occurs. It is configured to secure and output without skew.

In the present invention, one spare transmission line CH (n + 1)
Are provided in parallel with a plurality n of normal transmission paths CH1 to CHn, and the transmission end of the spare transmission path CH (n + 1) is the end of the normal transmission path of the nth CHn transmission path. Directly connected to the input signal.
In addition, the two-to-one selectors 3-1 to 3- (n-1) provided at the sending end of each of the plurality n of transmission lines and the two-to-one selectors 5-1 to 5-n provided at the receiving end. Face each other. The delay lines L1 and L2 provided on each of the first transmission channel CH1 and the backup transmission channel CH (n + 1) correspond to the delay time of one of the 2: 1 selectors. , Other transmission channel CH including each selector
2 to CHn are equal to the total delay time. Therefore, the outputs of the selectors 5-1 to 5-n at the receiving end are monitored and any one of, for example, CHs CH1 to CHn of the normal plural n transmission lines CH1 to CHn is monitored.
When it detects that a failure has occurred in the transmission line of No. 2, the selectors of the transmission line CH2 in which the failure has occurred and the selectors 3-2,5-2 and all selectors 3-2 to 3- (n -1), Generate a control signal that causes 5-2 to 5-n to perform the selection operation. That is, if i = 2,3─ (n-1), the normal transmission path CHi is switched to the next transmission path CH (i + 1) in order, and the failed transmission path CH2 is excluded (n-1 ) Regular transmission channels CH1, CH3 to CHn and one spare transmission channel CH (n +
According to 1), n-bit data is transmitted and output in parallel. However, since the total delay time of each transmission line CH1 to CH (n + 1) is exactly equal to each other as described above, before switching the transmission line. The delay time of the transmission path of the subsequent n-bit signal is equal, and as a result, a so-called skew state does not occur in the output n-bit data,
The purpose is achieved by obtaining n-bit data of the correct phase.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS While keeping the principle diagram of the present invention in FIG. 1, the structure of an embodiment corresponding to claim 1 of the present invention is shown.
Its basic operation has already been described in detail. 2 is shown in FIG.
FIG. 2 is a configuration diagram of an embodiment in which the concept of the present invention in FIG. 1 is incorporated into the conventional optical parallel transmission system of FIG. 1, and two shaded portions in FIG. 2 pairs of sending end
1 Selector 3-1 to 3- (n-1) and delay line L1 and L2 on the transmission side, and the receiver 2 to 1 selector 5-1
Corresponds to the path switching unit on the receiving side consisting of ~ 5-n.

The configuration of the embodiment corresponding to claim 1 of the present invention shown in FIG. 1 has n regular transmission lines CH1 to CHn in parallel for transmitting an n-bit parallel signal individually for each bit. It consists of a backup channel CH (n + 1) of a book. In FIG. 1, reference numeral 1 is a path switching unit on the transmission side, which is a pair of transmission terminals CH1 to CHn.
1 Consists of selectors 3-1 to 3- (n-1) and delay lines L1 and L2. Reference numeral 4 denotes a path switching unit on the receiving side, which is used for transmission channels CH1 ...
It consists of 2-to-1 selectors 5-1 to 5-n at the receiving end of CH (n + 1).
Reference numeral 2 denotes a switching signal generating unit (control unit), which is a 2-to-1 selector 3-1 to 3- (n-1) of the transmission-side path switching unit 1 and a 2-to-1 selector 5 of the reception-side path switching unit 4. The control unit generates a switching signal for controlling the selection operation of -1 to 5-n. FIG.
Is a 2-to-1 selector 3-i (where i
= 1,2─, n-1) and the truth table. The 2-to-1 selector 3-i on the transmission side in FIG. 3 has an H level of the selection signal S generated when the control unit 2 detects a failure of a certain transmission line from the outputs of the receiving end selectors 5-1 to 5-n. One of the two input terminals
Normally, the input signal to the transmission line CHi connected to _H is switched and the next transmission line CH (i +) connected to one output terminal O is switched.
1) Connect to. Then, the control unit 2 is the receiving end selector 5
-1 to 5-n output to the next transmission line CH (i + 1) connected to the other input terminal I _L by L of the selection signal S generated when the normality of the transmission line is detected. Input signal as it is,
It is connected to the next transmission line CH (i + 1) connected to the output terminal O. The 2-to-1 selector 5-i (where i = 1,2─, n) of the path switching unit 4 on the receiving side has the same configuration, but the control unit 2 described above is used.
Is normally connected to one of the two input terminals I _H due to the state L of the selection signal S that occurs when a fault in a certain transmission line is detected by the outputs of the receiving end selectors 5-1 to 5-n. From the next transmission line CH (i + 1) connected to the other input terminal I _L of the two input terminals, and the output signal CH (i + 1) The switching operation is performed so that it becomes the output signal of the channel CHi.

A plurality of switching signal generators (control units) 2 are provided.
The transmission status of the normal transmission channels CH1 to CHn of n is constantly monitored by the output of the 2-to-1 selector 5-i (where i = 1,2─, n) on the receiving side, and Two-to-one selector 3-i (where i = 1,2─, n-1) and receiver-side two-to-one selector 5-i (where i =
Select signal L / H that controls the operation of (1,2─, n), but if the n-bit signal is correctly transmitted on the transmission lines CH1 to CHn at the beginning, a 2: 1 selector 3 on the transmission side -13-
Send the selection signal L of state L to all terminals S of (n-1),
The selection signal H of the state H is sent to all the terminals S of the 2-to-1 selectors 5-1 to 5-n on the receiving side. Next, transmission lines CH1 to CHn
If it is detected by the output of the 2-to-1 selector 5-i at the receiving end that one of the transmission lines CHi has become untransmittable due to line breakage, etc., the switching signal generator (control unit) 2 But,
The situation is read, and all selectors 3-i to 3- from the 2-to-1 selector 3-i on the sending end that faces the selector 5-i on the receiving end.
The selection signal H of the state H is sent to the terminal S of (n-1). In the selector 3-i to 3- (n-1) at the sending end, one of the two input terminals I _H
As shown in FIG. 4, the transmission signal CHi to the transmission line CHi input to the input terminal I _H is sequentially connected to the next transmission line CH (i + 1) connected to the output terminal O, as shown in FIG. Transmission channel CH
Even if i cannot be transmitted due to disconnection or the like, (n-1) regular transmission channels CH1 to CH (i-1), CH (i + 1) to CHn and one backup transmission channel CH ( The parallel transmission of n-bit signals is possible without any trouble on the n total of (n + 1) transmission paths. Reference numeral 4 in FIG. 1 (a portion surrounded by a dotted line frame) is a path switching unit on the receiving side, which is a 2-to-1 selector 5-i having the same function as the 2-to-1 selector 3-i on the transmitting side in FIG. (However, i = 1,2─, n). The selector 5-i on the receiving side has one of its two input terminals I _H connected to the output of the transmission line CH i and the other input terminal I _L connected to the output of the next transmission line CH (i + 1). ing. First, when n-bit signals are correctly transmitted in parallel on a plurality of n regular transmission paths CH1 to CHn, the switching signal generation unit (control unit) 2
Is all terminals S of selector 5-i (where i = 1,2─, n)
Then, the selection signal H of the state H is sent to. Next, when it is detected by the output of the 2-to-1 selector 5-i at the receiving end that any one of the plural n normal transmission lines CH1 to CHn, for example, the transmission line CHi, cannot be transmitted due to line disconnection, etc. The switching signal generator (control unit) 2 reads the situation and sends the selection signal L of the state L to the terminals S of all selectors 5-i to 5-n after the selector 5-i at the receiving end. send. In each selector 5-i to 5-n of the receiving end,
Since one of the two input terminals I _L is selected, the output signal CH (i + 1) from the transmission line CH (i + 1) input to the input terminal I _L is output as shown in FIG. The output signal CH (n + 1) from the spare transmission line CH (n + 1) connected to the terminal O becomes the output signal of the previous transmission line CHi. Output signal. That is, even if the transmission path CHi becomes incapable of transmission due to disconnection or the like, the regular transmission paths CH1 to CH (i-1), CH (i
+1) to CHn and the spare transmission path CH (n + 1) for a total of n transmission paths, enabling parallel transmission of n-bit signals and obtaining n-bit output signals CH1 to CHn without any trouble. . In addition, in the transmission line of the first CH1 having one selector 5-1 only at the receiving end among the plural n normal transmission lines CH1 to CHn in FIG. A delay line L1 that gives a delay time is provided, and one spare transmission line CH (n + 1) that also has one selector 5-n only at the receiving end,
Similarly, a delay line L2 for giving a delay time for one selector is provided, and each transmission path CH2 has two selectors, one for each of the transmission end and the reception end of the other transmission path.
~ CHn and the total delay time are equal. Therefore, even if the transmission path is switched to another transmission path when a failure occurs in one transmission path, the delay time of the transmission path including the delay of each selector is equal to a plurality of n regular transmission paths CH1 to CHn and one spare transmission path. Road CH
Since (n + 1) is completely equal to each other, the input n-bit signal does not become a so-called skew state on the output side of the parallel n transmission lines. FIG. 6 shows that the above-mentioned plural n regular transmission paths CH1 ...
The first with only one selector 5-1 in the receiving end B in CHn
The transmission line CH1 has a delay line for one selector.
L1 is provided, and similarly, one spare transmission line CH (n + 1) having one selector 5-n only at the receiving end B is provided with a delay line L2 for one selector. I was told,
This shows that the total delay time is made equal to each transmission line CH2 to CHn having two selectors, one for each of the transmission end A and the reception end B of the other transmission lines.

According to the configuration of FIG. 1 of the embodiment of claim 1 of the present invention, only one 2: 1 selector is provided at each of the transmission end and the reception end of the transmission line, and n regular transmission lines are provided. It has a single spare transmission line. However, a 2-to-1 selector with the same configuration is provided at the sending end and the receiving end of the transmission line for each m stages to make n regular transmission lines. On the other hand, it is possible to consider a configuration including m spare transmission lines. FIG. 7 is a constitutional view corresponding to claim 2 of the present invention in which m spare transmission lines are provided for the n regular transmission lines.

In FIG. 7, 1'denotes a path switching unit on the transmission side.
, 2'is the switching signal generator (control unit), and 4'is
This is a path switching unit on the receiving side. 1'in FIG. 7 is the same as in FIG.
It consists of a 2-to-1 selector with the same function as 1
The eye consists of 2-to-1 selectors 3- (1,1) to 3- (1, n-1),
The second stage consists of 2-to-1 selectors 3- (2,2) to 3- (2, n).
The following m-th stage is a 2-to-1 selector 3- (m, m) to 3- (m, m
+ n-1). Generally a 2: 1 selector on the transmitting side 3-
(k, i) (where i = 1,2, ─, m + n-1) is
Meanwhile I_HIs connected to the input signal CHi and the other input terminal I
_LAre connected to the next input signal CH (i + 1). 2'off
The switching signal generation unit (control unit) uses multiple n input signals CH1.
~ CHn transmission path CH1 to CH (n + m)
2 to 1 selector of 5- (m, m) to 5- (m, m + n)
It has a function of monitoring with n output signals, and initially has multiple n inputs.
The signals CH1 to CHn are correctly transmitted on the transmission lines CH1 to CHn.
If it is, all ends of the 2-to-1 selector 3- (k, i) of the sending end
The selection signal L of the state L is sent to the child S. Transmission line CH1 ~
Transmission line CHi in CHn becomes untransmittable due to disconnection, etc.
2 ', the switching signal generator (control unit)
Read the status of and select the opposite end selector 3- (1, i)
All selectors 3- (1, i) to 3- (1, n-1) in descending state S
Send the selection signal H of. Switching of each selector at this time
The operation is the same as that of the selector 3-i shown in FIG. Continued
Transmission channel CHj (where j = i, i + 1, ─, n + 1) cannot be transmitted.
2 ', the switching signal generator (control unit)
Read that the transmission path CHj cannot be transmitted, and
Judge that ≤ j and select 3- (2, j) on the sending side
Sends selection signal H of state H to all terminals S of 3- (2, n)
I do. As a result, the route switching unit 1 on the transmission side
Avoid transmission line i and transmission line j on the transmission line
The remaining n transmission lines, including the transmission line
Enables column transmission. Then, the transmission path CHh (however, h = 1,
2 ─, i-1) also becomes unable to transmit, the 2'switching signal
The transmission path CHh cannot be transmitted in the signal generation section (control section).
Read, and determine that h ≤ i,
State H for all terminals S of selectors 3- (1, h) to 3- (1, i-1)
Of the selector 3- (2, i) to 3- (2, n).
The selection signal H of the state H is sent to all the terminals S. to this
Therefore, transmission is performed on the transmission path after the path switching unit 1 on the transmission side.
Avoid transmission line h and transmission line i, and leave the rest including the backup transmission line.
Enables parallel transmission of n-bit signals by n transmission lines of
I do. Generally, there are already n transmission lines i_1,i₂─i_N(However, N =
 1,2─m-1, i₁<i₂<─ <i_N) Is not transmittable,
 i_{N + 1}2'switching signal is generated
When the unit (control unit) reads it, i_{N + 1}> i_NIf,
Transmitter selector 3- (N + 1, i_{N + 1}) ~ 3- (N + 1, n + N)
The selection signal H of the state H is sent to the terminal S, and i_{N + 1}<i_Nso
If so, the 2'switching signal generator (control unit)_K
<i_{N + 1}<i _{k + 1}To find K, N + 1 to K + 1, K + 1 to N
To K + 2 to N + 1, and then select K + 1 to N + 1
Selector 3- (x, y) (where x = K + 1, ─N + 1, y =
 i _x,─, x + n-1) for all terminals S of state H selection signal H
Is sent. Fig. 8 shows the case of 2 to 1 on the transmitting side in the above general case.
Selector 3- (k, i) (however i = 1,2, ─, m + n-1) switching
The processing procedure is shown. 4'in FIG. 7 is path switching on the receiving side
And has the same function as selector 3-i in FIG. 3 2
It consists of a pair 1 selector 5-i, and the first stage (as shown in the figure
In the order from the output side, it is called the 1st stage, 2nd stage-m stage.)
Is composed of 5- (1,1) to 5- (1, n), and the second stage is a 2-to-1 cell.
Lectors 5- (2,2) to 5- (2, n + 1).
Consists of 2-to-1 selectors 5- (m, m) to 5- (m, m + n).
 2-to-1 selector 5- (k, i) (where i = 1,2 ─, m + n) is 2
One of the input terminals I_HIs connected to the output of transmission line CHi.
The other input terminal I_LTo the output of the next channel CH (i + 1)
It is connected. First, n signals CH1 to CHn are transmitted to the transmission line C.
If H1 to CHn are correctly transmitted, the 2 '
The replacement signal generator (control unit) is used to select all selectors on the receiving side 4 '.
The selection signal H of the state H is sent to the terminal S of the actuator. Channel CH
Any channel CHi from 1 to CHn cannot be transmitted due to disconnection, etc.
2 ', the switching signal generator (control unit)
Read the status of and select the receiving side 4'selectors 5- (1, i) to 5-
The selection signal L of the state L is sent to all the terminals S of (1, n).
Already on the transmitting side 1 ′, signals CH1 to CHn are transmitted on channels CH (i + 1) to
Since it is transmitted by CH (n + 1), the route on the receiving side is switched.
In section 4 ', the transmissions from channels CH (i + 1) to CH (n + 1) are transmitted.
The transmission signal is switched to the output signals of transmission channels CH1 to CHn.
And outputs n parallel signals. At this time the receiving side 4 '
The path switching operation is the same as described above. Then the transmission channel CH
When j (however, j = i + 1, ─, n + 1) cannot be transmitted, 2
 ′ Switching signal generator (control unit)
 Is not transmitted, and i + 1 ≤ j
The sender 1 ′ selectors 3- (2, j) to 3- (2, n
The selection signal L of the state L is sent to all the terminals S of (+1). Already
Before the path switching unit 5'on the receiving side,
Avoid the transmission path CHj and input to n parallel transmission paths for transmission
Therefore, n parallel signals CH1 to CHn are output as output signals.
Is output. Generally, there are already n transmission lines i_1,i₂─i_N
(However, N = 1,2─m-1, i₁<i₂<─ <i_N) Cannot be transmitted
And then i_{N + 1}Is not transmitted, it is switched to 2 '
When read by the signal generator (control unit),_{N + 1}> i_Nso
If there is, selector 5- (N + 1, i on the receiving side_{N + 1}) ~ 5- (N + 1, n + N +
Send the selection signal L of state L to all terminals S of 1),
i_{N + 1}<i_NIf so, the 2'switching signal generator (control
Part) is i_K<i_{N + 1}<i_{k + 1}To find K, and N + 1 is K + 1
, K + 1 to N are read as K + 2 to N + 1, and then K + 1
Selector 5- (x, y) (where x = K +
1, ─N + 1, y = i_x,─, x + n) of all terminals S of state L
Send the selection signal L. Also, in FIG. 7, the same as in FIG.
By installing delay lines L1 and L2 in
The delay time of the transmission path is equal to each other including the delay of each selector.
Therefore, by changing the signal path when a certain transmission line fails
Suppresses the so-called skew state of n parallel data
Rukoto can. Delay on the transmission side and reception side of the transmission path
The lengths set for lines L1 and L2 are
As shown in FIG. 9, on the receiving side 4 ', as shown in FIG.
The delay time of all transmission lines including the transmission line is 2: 1
 Be equal to each other, including the selector delay time
Determined.

The state L / H of the selection signal input to the terminal S of each selector on the transmitting side 1'and the receiving side 4'is changed to the state H / H.
Invert to L, reverse the I _H and I _L of the two input terminals, provide the transmission line CH1 with the L2 delay line, and provide the backup transmission line CH (n + 1) with the L1 delay line. It goes without saying that the present invention can also be realized by.

FIG. 11 is a block diagram of an embodiment corresponding to claim 3 of the present invention, in which the transmission side path switching unit 6 inputs to a plurality n of regular transmission paths CH1 to CHn. Signal C
It consists of an n-to-1 selector 9 that branches H1 to CHn as inputs and outputs one transmission path CH (n + 1), and a plurality of n 2-to-1 selectors in the path switching unit on the receiving side of 7 5-1 to 5-n
However, one of the n-to-1 selectors 9 on the transmitting side 6 is transmitted to a total of n input terminals I _H that select one of the two input terminals I _{L and} I _H when a certain transmission line CHi fails. It is configured to receive the output of the channel CH (n + 1). 8 switching signal generators (control units) are provided for multiple n regular transmission channels CH1 to CH1.
It has a function to monitor the transmission status of CHn.
~ If CHn is correctly transmitting multiple n signals, all terminals S of the selectors 5-1 to 5-n on the receiving side 7 are in state L
It sends the selection signal L of, selects the input terminal I _L , and outputs n parallel signals CH1 to CHn as output signals. At this time, the n-to-1 selector 9 may be in any state. Next, if any of the n normal transmission paths CH1 to CHn between the transmission side 6 and the reception side 7 becomes incapable of transmission due to a failure such as disconnection, a switching signal of 8 is generated. Section (control section) reads the reception failure status of the transmission path CHi,
A control signal for instructing the terminal S of the n-to-1 selector 9 on the transmission side 6 to output the signal CHi in the n inputs to the output backup transmission line CH (n + 1) is generated, and the reception side 7 selectors 5-
The signal CHi that is transmitted through the spare transmission path CH (n + 1) by selecting the input terminal I _H of the two input terminals for the terminal S of i
Is configured to be output as a substitute for the signal CHi that is disconnected due to the failure of the regular transmission path CHi. At this time, if the delay time of the backup transmission line CH (n + 1) including the delay time of the n-to-1 selector 9 is made equal to the delay time of the regular transmission lines CH1 to CHn, the transmission line CHi There is no hindrance because it is possible to prevent a so-called skew state that occurs in a plurality n of parallel data due to the change of the route of the signal CHi at the time of failure.

[0013]

As described above, according to the present invention, the conventional control method is complicated as a countermeasure when a failure occurs in any of several n transmission lines in parallel. As an alternative to the matrix switch, it is possible to provide a redundant means that is simple in configuration and control, and can perform parallel transmission without causing a so-called skew condition for multiple n parallel data. It is possible to reduce the cost of the parallel transmission device in which the optical line is included and to extend the applicable transmission path, and it is possible to obtain the effect of greatly contributing to the improvement of the reliability of the parallel transmission device as a whole.

[Brief description of drawings]

FIG. 1 is a principle diagram showing a basic configuration of an error processing method when a parallel signal transmission line failure according to the present invention.

FIG. 2 is a configuration diagram of an optical parallel transmission control system as an embodiment of the present invention.

FIG. 3 is a two-to-one transmission side for explaining the operation of the present invention.
Diagram showing selector structure and its truth value

FIG. 4 is an operation explanatory diagram of a path switching unit on the transmission side at the time of failure of any one of the regular transmission paths for explaining the operation of the present invention.

FIG. 5 is an operation explanatory diagram of a path switching unit on the receiving side when any one of the regular transmission paths has a fault for explaining the operation of the present invention.

FIG. 6 is a delay line for explaining the operation of the present invention.
Connection diagram of L1 and L2

FIG. 7 is a diagram showing a circuit configuration of an embodiment corresponding to claim 2 of the present invention.

FIG. 8 is an operation flow chart of a transmitting side selector according to the second embodiment of the present invention.

FIG. 9 is an insertion diagram of a delay line on the transmission side according to the second embodiment of the present invention.

FIG. 10 is an insertion diagram of a delay line on the receiving side according to the second embodiment of the present invention.

FIG. 11 is a diagram showing a circuit configuration of an embodiment corresponding to claim 3 of the present invention.

FIG. 12 is a block diagram of an optical parallel transmission control method for explaining a conventional technique.

[Explanation of symbols]

1, 6 are path switching units on the transmission side, 2, 8 are switching signal generation units (control units), and 3-1 to 3- (n-1) are 2 to 1 on the transmission side.
Selectors 4 and 7 are path switching units on the receiving side, 5-1 to 5-
n is a 2-to-1 selector on the receiving side, CH1 to CHn are n input data or output data in parallel, and n parallel transmission channels, and CH (n + 1) is a backup transmission channel. is there.

Claims (3)

[Claims] 1. When a plurality n of signal sequences are transmitted through the same plurality n of parallel transmission lines, the plurality n of regular transmission lines CH1
~ CHn and its sending end is the nth CHn of the regular transmission line
One spare transmission line CH (n + 1) directly connected to the input signal of
And the transmission end and the reception end of the plurality of transmission lines are opposed to each other, and when there is a failure, the transmission line CHi in the normal state is sequentially switched to the next transmission line CH (i + 1). -(n-1), 5-1 ~ 5-n
And the first CH1 of the regular transmission line and the backup transmission line
The delay lines L1 and L2 that include the delay time of each selector in both CH (n + 1) and equalize the total delay time with other transmission lines are provided, and the selectors 5-1 to 5-n of each receiving end are The output is monitored and any one of the regular multiple n transmission channels CH1 to CHn is selected.
For example, when a failure is detected in CH2, a control signal is generated and the failure occurs in the transmission path CH2 selectors 3-2 and 5-2 and all selectors after selector 3- 2 to 3- (n-
1), 5-2 to 5-n, the selection operation is performed, and even when the failure occurs, n parallel transmission lines having the same delay time are always secured and output, and a parallel signal. Error handling method when a transmission line failure occurs. 2. One spare transmission line CH (n + 1) for the plurality n of regular transmission lines CH1 to CHn in claim 1.
Is more than 1, and there are m backup channels CH (n + 1) to CH (n +
m), the transmission end and the reception end of the multiple transmission paths are opposed to each other, and in the event of a failure, the normal transmission path CHi is switched to the next transmission path CH (i + 1) in order. 1 Selector 3-1 to 3
-(n-1), 5-1 to 5-n are cascaded for m stages, and the delay lines L1 and L2 provided in each transmission line are also connected to other transmission lines including each delay time of the m stage selector. An error processing method at the time of a transmission line failure of a parallel signal, which is provided so that the delay times are equal. 3. A plurality of normal transmission lines CH1 to CHn instead of the 2 to 1 selectors 3-1 to 3- (n-1) provided at the transmission ends of the plurality of parallel transmission lines according to claim 1. An n-to-1 selector 9 that outputs the signal to each spare transmission line CH (n + 1) by using the signal branched from each input as input is provided, and the spare transmission line CH (n + 1 ) Output is provided at the receiving end of the plurality of parallel transmission lines, and one of the normal transmission lines CH1 to CHn is selected from the two input terminals of the two-to-one selectors 5-1 to 5-n.
Error processing method for parallel channel transmission path failure, characterized in that input is made to all of the one input terminal I _H selected at Hi failure.