JPH0964774A - Received signal attenuation controller - Google Patents

Received signal attenuation controller

Info

Publication number
JPH0964774A
JPH0964774A JP7215548A JP21554895A JPH0964774A JP H0964774 A JPH0964774 A JP H0964774A JP 7215548 A JP7215548 A JP 7215548A JP 21554895 A JP21554895 A JP 21554895A JP H0964774 A JPH0964774 A JP H0964774A
Authority
JP
Japan
Prior art keywords
electric field
field strength
attenuation
received signal
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7215548A
Other languages
Japanese (ja)
Other versions
JP2778546B2 (en
Inventor
Hidetoshi Okamura
秀敏 岡村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7215548A priority Critical patent/JP2778546B2/en
Priority to GB9617691A priority patent/GB2305034B/en
Priority to KR1019960035348A priority patent/KR970013830A/en
Publication of JPH0964774A publication Critical patent/JPH0964774A/en
Application granted granted Critical
Publication of JP2778546B2 publication Critical patent/JP2778546B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/12Measuring electrostatic fields or voltage-potential
    • G01R29/14Measuring field distribution

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Superheterodyne Receivers (AREA)
  • Noise Elimination (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a received signal attenuation controller capable of reducing the attenuation of a received signal so as to prevent the attenuation due to thermal noise when the signal level of the received signal is small. SOLUTION: A reception field intensity detection circuit 4 detects the signal level of an amplified received signal, that is, a field intensity value. When the detected field intensity value is threshold or below, a control circuit 5 outputs voltage value of zero to an attenuation circuit 2. When the value is the threshold or above the field intensity value detected in a reception field intensity detection circuit 4 is outputted to the attenuation circuit 2 as it is. Then attenuation circuit 2 changes attenuation in accordance with the output voltage value from the control circuit 5 to attenuate the received signal.

Description

【発明の詳細な説明】Detailed Description of the Invention

【発明の属する技術分野】本発明は減衰制御装置に関
し、特に無線通信機における受信信号を減衰する減衰制
御装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an attenuation control device, and more particularly to an attenuation control device that attenuates a received signal in a wireless communication device.

【0001】[0001]

【従来の技術】一般に無線機では受信信号を増幅して復
調器へ供給するために増幅回路が用いられている。しか
し、信号レベルの高い、すなわち電界強度の強い信号が
受信されると、増幅回路を構成するトランジスタの非線
形性により飽和して、トランジスタの動作点が移動す
る。トランジスタの動作点が移動すると、受信信号に含
まれる希望波に対する増幅回路の利得が減少し、希望波
の受信感度が劣化する。
2. Description of the Related Art Generally, in a wireless device, an amplifier circuit is used to amplify a received signal and supply it to a demodulator. However, when a signal having a high signal level, that is, a signal having a high electric field strength is received, it is saturated due to the non-linearity of the transistor included in the amplifier circuit, and the operating point of the transistor moves. When the operating point of the transistor moves, the gain of the amplification circuit for the desired wave included in the received signal decreases, and the receiving sensitivity of the desired wave deteriorates.

【0002】そこで、希望波の受信感度の劣化を防止す
るために、受信信号を減衰する減衰回路が増幅回路の前
段に備えられている。減衰回路は、受信信号を減衰させ
ることにより、電界強度を弱め、増幅回路の利得が減少
することを防止する。
Therefore, in order to prevent the reception sensitivity of the desired wave from deteriorating, an attenuator circuit for attenuating the received signal is provided in the preceding stage of the amplifier circuit. The attenuator circuit attenuates the received signal, thereby weakening the electric field strength and preventing the gain of the amplifier circuit from decreasing.

【0003】図9は、上述した減衰回路を有する従来の
無線機を示す機能ブロック図である。
FIG. 9 is a functional block diagram showing a conventional radio device having the above-mentioned attenuation circuit.

【0004】図9において、無線機は、アンテナ1、減
衰回路2、増幅回路3、受信電界強度検出回路4および
復調回路6を備える。
In FIG. 9, the radio device includes an antenna 1, an attenuation circuit 2, an amplification circuit 3, a reception electric field strength detection circuit 4 and a demodulation circuit 6.

【0005】減衰回路2は、アンテナ1で受信された受
信信号を減衰する。減衰回路2における減衰量は、受信
電界強度検出回路4からの出力電圧値によって決定され
る。増幅回路3は、減衰回路2からの減衰された受信信
号を増幅して、増幅された受信信号を受信電界強度検出
回路4および復調回路6に出力する。受信電界強度検出
回路4は、受信信号の電界強度値、すなわち増幅回路3
からの受信信号の振幅を検出して、振幅に応じた直流電
圧を減衰回路2に出力する。
The attenuation circuit 2 attenuates the reception signal received by the antenna 1. The amount of attenuation in the attenuation circuit 2 is determined by the output voltage value from the reception electric field strength detection circuit 4. The amplification circuit 3 amplifies the attenuated reception signal from the attenuation circuit 2 and outputs the amplified reception signal to the reception electric field strength detection circuit 4 and the demodulation circuit 6. The received electric field strength detection circuit 4 detects the electric field strength value of the received signal, that is, the amplifier circuit 3.
The amplitude of the received signal from is detected and a DC voltage corresponding to the amplitude is output to the attenuation circuit 2.

【0006】図10は、増幅回路3への入力電圧値に対
する受信電界強度検出回路4からの出力電圧値の理想的
な関係を示す特性図である。
FIG. 10 is a characteristic diagram showing an ideal relationship between the input voltage value to the amplifier circuit 3 and the output voltage value from the received electric field strength detection circuit 4.

【0007】図10に示すように、増幅回路3への入力
電圧値、すなわち受信信号の電界強度値と受信電界強度
検出回路4からの出力電圧値とは、正比例の関係を有
し、受信信号の電界強度値が強いときには、受信電界強
度検出検出回路4からの出力電圧値が大きくなる。
As shown in FIG. 10, the input voltage value to the amplifier circuit 3, that is, the electric field strength value of the received signal and the output voltage value from the received electric field strength detection circuit 4 have a direct proportional relationship. When the electric field strength value of is strong, the output voltage value from the reception electric field strength detection / detection circuit 4 becomes large.

【0008】減衰回路2の減衰量は、受信電界強度検出
回路4からの出力電圧値に応じて設定されるため、受信
信号の電界強度値が強くなり、受信電界強度検出回路4
からの出力電圧値が大きくなると、減衰回路2での減衰
量が増大する。この減衰量の増加により、電界強度値の
強い受信信号の電界は弱められ、増幅回路3での利得の
減少が防止される。
Since the attenuation amount of the attenuation circuit 2 is set according to the output voltage value from the reception electric field strength detection circuit 4, the electric field strength value of the reception signal becomes strong and the reception electric field strength detection circuit 4
When the value of the output voltage from is increased, the amount of attenuation in the attenuation circuit 2 is increased. Due to this increase in the amount of attenuation, the electric field of the received signal having a strong electric field strength value is weakened, and a decrease in the gain in the amplifier circuit 3 is prevented.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、上述し
た従来の無線機では、増幅回路への入力電圧値に対する
検出回路からの出力電圧値の関係が実際には図10に示
したような特性にはならずに、図11の特性図に示すよ
うに、増幅回路への入力電圧値が零からAのときには、
受信電界強度検出回路からの出力電圧値はBのまま一定
であり、零になることはない。
However, in the above-mentioned conventional radio equipment, the relationship between the input voltage value to the amplifier circuit and the output voltage value from the detection circuit is actually the characteristic as shown in FIG. Of course, as shown in the characteristic diagram of FIG. 11, when the input voltage value to the amplifier circuit is from 0 to A,
The output voltage value from the received electric field strength detection circuit remains constant at B and does not become zero.

【0010】これは、受信信号の電界強度がたとえ小さ
くなっても、熱雑音による雑音が増幅回路を介して受信
電界強度検出回路に入力され、受信電界強度検出回路が
この雑音の電界強度値(振幅)を直流電圧に変換して減
衰回路の出力することに起因する。そして、このときの
受信電界強度検出回路からの直流電圧値によって減衰回
路の減衰量が設定されるので、受信信号の電界強度値が
小さくても、減衰回路での減衰量はその電界強度値に対
して大きく設定されてしまい、受信信号の電界強度値が
必要以上に弱められてしまう。したがって、受信感度が
劣化してしまうという問題が生じる。
Even if the electric field strength of the received signal becomes small, noise due to thermal noise is input to the received electric field strength detection circuit through the amplifier circuit, and the received electric field strength detection circuit causes the electric field strength value of this noise ( (Amplitude) is converted to a DC voltage and output from the attenuation circuit. Since the attenuation amount of the attenuation circuit is set by the DC voltage value from the reception electric field strength detection circuit at this time, even if the electric field strength value of the reception signal is small, the attenuation amount in the attenuation circuit is equal to the electric field strength value. On the other hand, a large value is set, and the electric field strength value of the received signal is weakened more than necessary. Therefore, there arises a problem that the reception sensitivity is deteriorated.

【0011】本発明の目的は、上述した課題を解決し、
受信信号の信号レベルに対する最低動作感度を向上させ
る受信信号減衰制御装置を提供することにある。
The object of the present invention is to solve the above-mentioned problems,
It is an object of the present invention to provide a received signal attenuation control device that improves the minimum operation sensitivity with respect to the signal level of a received signal.

【0012】[0012]

【課題を解決するための手段】上述した目的を達成する
ために、本発明による受信信号減衰制御装置は、受信信
号の電界強度値を検出し、検出された電界強度値を示す
電界強度信号を出力する電界強度検出手段と、電界強度
信号の示す電界強度値の大きさによって設定され減衰量
に基づいて受信信号を減衰する減衰手段と、電界強度信
号の示す電界強度値が予め定められた値以下のときに設
定された減衰量より小さな減衰量を与えるよう減衰手段
を制御する制御手段と、を備える。
In order to achieve the above-mentioned object, a received signal attenuation control device according to the present invention detects an electric field strength value of a received signal and outputs an electric field strength signal indicating the detected electric field strength value. An electric field strength detecting means for outputting, an attenuating means for attenuating the received signal based on the amount of attenuation set by the magnitude of the electric field strength value indicated by the electric field strength signal, and a predetermined value for the electric field strength value indicated by the electric field strength signal Control means for controlling the attenuating means so as to give a smaller attenuation amount than the set attenuation amount at the following time.

【0013】また、設定された減衰量より小さな減衰量
をほぼ零にしても良く、制御手段に、電界強度値が予め
定められた値より大きなときにはハイレベルの信号を出
力し、電解強度値が前記予め定められた値以下のときに
は、ローレベルの信号を出力するシュミットトリガ回路
と、ハイレベルの信号を入力するとオン動作し、ローレ
ベルの信号を入力するとオフ動作するスイッチと、一端
がスイッチに接続され、他端が接地された抵抗とを備え
ても良い。
Further, the attenuation amount smaller than the set attenuation amount may be set to almost zero, and when the electric field strength value is larger than a predetermined value, a high level signal is output to the control means, and the electrolytic strength value is When the value is equal to or less than the predetermined value, a Schmitt trigger circuit that outputs a low-level signal, a switch that operates on when a high-level signal is input, and an off operation when a low-level signal is input, and one end is a switch. A resistor connected to the other end and grounded at the other end may be provided.

【0014】そして、この制御手段は、電界強度値が予
め定められた値以下のとき、電界強度信号を減衰手段へ
供給し、電界強度値が前記予め定められた値より大きい
ときとき、予め定められた信号を減衰手段へ供給する。
The control means supplies the electric field strength signal to the attenuating means when the electric field strength value is less than or equal to a predetermined value, and when the electric field strength value is greater than the predetermined value, the predetermined means is set. The resulting signal is supplied to the attenuating means.

【0015】本発明では、上述した構成の採用により、
制御手段によって電界検出信号の示す電界強度値が予め
定められた値以下のときに電界強度値零を示す電界強度
信号が出力されるため、受信信号の電界強度値が小さい
ときには、減衰手段での減衰量が小さくなり、受信信号
の電界強度値が必要以上に弱められてしまということが
ない。したがって、受信信号レベル、すなわち受信信号
の電界強度値に対する最低動作感度を向上することがで
きる。
In the present invention, by adopting the above-mentioned configuration,
When the electric field strength value indicated by the electric field detection signal is equal to or lower than a predetermined value by the control means, the electric field strength signal showing the electric field strength value of zero is output. The amount of attenuation is reduced, and the electric field strength value of the received signal is not weakened more than necessary. Therefore, the minimum operation sensitivity with respect to the received signal level, that is, the electric field strength value of the received signal can be improved.

【0016】[0016]

【発明の実施の形態】次に本発明について図面を参照し
て詳細に説明する。
DETAILED DESCRIPTION OF THE INVENTION The present invention will now be described in detail with reference to the drawings.

【0017】図1は、本発明の一実施例の受信信号減衰
制御装置の機能ブロック図である。
FIG. 1 is a functional block diagram of a received signal attenuation controller according to an embodiment of the present invention.

【0018】図1において、本発明は、アンテナ1、増
幅回路3、受信電界強度検出回路4、制御回路5および
復調回路6を備える。
In FIG. 1, the present invention comprises an antenna 1, an amplifier circuit 3, a received electric field strength detection circuit 4, a control circuit 5 and a demodulation circuit 6.

【0019】アンテナ1を介して受信されたて受信信号
は減衰回路2で減衰されて、増幅回路3に出力される。
減衰回路2の減衰量は受信電界強度検出回路4からの出
力電圧値に応じて設定される。
The received signal received via the antenna 1 is attenuated by the attenuation circuit 2 and output to the amplification circuit 3.
The attenuation amount of the attenuation circuit 2 is set according to the output voltage value from the reception electric field strength detection circuit 4.

【0020】減衰回路2で減衰された受信信号は、増幅
回路3で増幅され、受信電界強度検出回路4および復調
回路6に出力される。増幅された受信信号の電界強度
値、すなわち増幅回路3からの受信信号の振幅は、受信
電界強度検出回路4で直流電圧に変換され、この直流電
圧値が制御回路5に出力される。
The reception signal attenuated by the attenuation circuit 2 is amplified by the amplification circuit 3 and output to the reception electric field strength detection circuit 4 and the demodulation circuit 6. The electric field strength value of the amplified received signal, that is, the amplitude of the received signal from the amplifier circuit 3 is converted into a DC voltage by the received electric field strength detection circuit 4, and this DC voltage value is output to the control circuit 5.

【0021】制御回路5にはしきい値VTHが設定されて
おり、受信電界強度検出回路4からの電圧値がしきい値
VTH以下のときには減衰回路2への出力電圧値零が出力
され、しきい値VTH以上のときには、受信電界強度検出
回路4からの電圧値がそのまま出力される。
A threshold value VTH is set in the control circuit 5, and when the voltage value from the reception electric field strength detection circuit 4 is less than or equal to the threshold value VTH, the output voltage value zero to the attenuation circuit 2 is output. When the threshold value is VTH or more, the voltage value from the reception electric field strength detection circuit 4 is output as it is.

【0022】図2は、図1に示した減衰回路の回路図で
ある。
FIG. 2 is a circuit diagram of the attenuation circuit shown in FIG.

【0023】図2において、減衰回路2は、定電源端子
に陽極が接続されるダイオード21と、ダイオード21
の陰極にその陽極が接続されるダイオード22と、この
ダイオード21の陰極に一端が接続される抵抗23と、
を備える。また減衰回路2は、抵抗23の他端にコレク
タ端子が接続され、ベース端子は抵抗25の一端に接続
され、エミッタ端子が接地されているトランジスタ24
と、他端が受信電界強度検出回路4に接続される抵抗2
5と、を備える。
In FIG. 2, the attenuation circuit 2 includes a diode 21 whose anode is connected to a constant power supply terminal and a diode 21.
A diode 22 whose anode is connected to the cathode of, and a resistor 23 whose one end is connected to the cathode of this diode 21,
Is provided. In the attenuation circuit 2, a transistor 24 having a collector terminal connected to the other end of the resistor 23, a base terminal connected to one end of the resistor 25, and an emitter terminal grounded.
And a resistor 2 having the other end connected to the received electric field strength detection circuit 4.
5 is provided.

【0024】この減衰回路2において、受信電界強度検
出回路4からの直流電圧値の大きさに比例して、トラン
ジスタ24のインピーダンスが変化し、ダイオード21
および22に流れる電流値が変化する。この電流値の変
化によりダイオード21および22のインピーダンスが
変化するため、減衰回路2のインピーダンスが変化す
る。
In this attenuation circuit 2, the impedance of the transistor 24 changes in proportion to the magnitude of the DC voltage value from the reception electric field strength detection circuit 4, and the diode 21
And the value of the current flowing through 22 changes. Since the impedances of the diodes 21 and 22 change due to the change of the current value, the impedance of the attenuation circuit 2 changes.

【0025】したがって、受信信号の電界強度値が大き
くなると、減衰回路2のインピーダンスが大きくなり、
受信信号の電界強度値が小さくなると、減衰回路2のイ
ンピーダンスが小さくなるので、増幅回路3への入力電
圧となる受信信号の電界強度値が大きいときには、減衰
回路4での減衰量が大きくなり、受信信号の電界強度値
が弱められる。
Therefore, as the electric field strength value of the received signal increases, the impedance of the attenuation circuit 2 increases,
When the electric field strength value of the received signal becomes small, the impedance of the attenuation circuit 2 becomes small. Therefore, when the electric field strength value of the received signal which is the input voltage to the amplifier circuit 3 becomes large, the attenuation amount in the attenuation circuit 4 becomes large, The electric field strength value of the received signal is weakened.

【0026】図3は、図1に示した制御回路5の回路図
である。
FIG. 3 is a circuit diagram of the control circuit 5 shown in FIG.

【0027】図3において、制御回路5は、減衰回路2
と受信電界強度検出回路4に直列に接続されたスイッチ
51と、受信電界強度検出回路4からの直流電圧値によ
ってスイッチ51をオン/オフ制御するシュミットトリ
ガ回路52と、減衰回路2とスイッチ51間に一端に接
続され、他端が接地される抵抗53と、を備える。
In FIG. 3, the control circuit 5 includes an attenuation circuit 2
And a switch 51 connected in series to the received electric field strength detection circuit 4, a Schmitt trigger circuit 52 for controlling ON / OFF of the switch 51 according to a DC voltage value from the received electric field strength detection circuit 4, an attenuator circuit 2 and a switch 51. And a resistor 53 connected to one end and grounded at the other end.

【0028】シュミットトリガ回路52は、図4の特性
図に示すように、入力電圧、すなわち、受信電界強度検
出回路4からの電圧値が零からしきい値VTHのときに
は、ローレベルの電圧値VLを出力し、入力電圧がしき
い値VTHより大きいときには、ハイレベルの電圧値VH
を出力する。しきい値VTHは例えば、図12に示した電
圧Bに設定される。
As shown in the characteristic diagram of FIG. 4, the Schmitt trigger circuit 52 has a low-level voltage value VL when the input voltage, that is, the voltage value from the reception electric field strength detection circuit 4 is from zero to the threshold value VTH. Is output and the input voltage is higher than the threshold value VTH, the high-level voltage value VH
Is output. The threshold value VTH is set to the voltage B shown in FIG. 12, for example.

【0029】次に、制御回路5の動作について、図5の
制御回路5における入力電圧と出力電圧との関係を示す
特性図を用いて説明する。
Next, the operation of the control circuit 5 will be described with reference to the characteristic diagram showing the relationship between the input voltage and the output voltage in the control circuit 5 of FIG.

【0030】受信電界強度検出回路4からの入力電圧は
スイッチ51とシュミットトリガ回路52とに供給され
る。、シュミットトリガ回路52は、図4に示したよう
に、入力電圧がしきい値VTH以下のときに、ローレベル
の電圧値VLを出力し、VTHより高いときには、ハイレ
ベルの電圧値VHを出力する。
The input voltage from the received electric field strength detection circuit 4 is supplied to the switch 51 and the Schmitt trigger circuit 52. As shown in FIG. 4, the Schmitt trigger circuit 52 outputs a low level voltage value VL when the input voltage is equal to or lower than the threshold value VTH, and outputs a high level voltage value VH when the input voltage is higher than VTH. To do.

【0031】そして、シュミットトリガ回路52の出力
がVHのときは、スイッチ51がオンになり、VLのとき
は、オフになる。したがって、シュミットトリガ回路5
2への入力電圧値がVTHより高いときには、スイッチ5
1がオンになり、入力電圧値がそのまま減衰回路2に出
力される。このときの入力電圧値は、図5に示すよう
に、制御回路5への入力電圧値と等しい電圧値になる。
Then, when the output of the Schmitt trigger circuit 52 is VH, the switch 51 is turned on, and when it is VL, it is turned off. Therefore, the Schmitt trigger circuit 5
When the input voltage value to 2 is higher than VTH, switch 5
1 is turned on, and the input voltage value is directly output to the attenuation circuit 2. The input voltage value at this time becomes a voltage value equal to the input voltage value to the control circuit 5, as shown in FIG.

【0032】一方、受信電界強度検出回路4からの電圧
値がVTH以下のときには、スイッチ51がオフになり、
減衰回路2と接地とが抵抗53を介して接地されるた
め、図5に示すように減衰回路2に出力される電圧値が
零となる。
On the other hand, when the voltage value from the received electric field strength detection circuit 4 is VTH or less, the switch 51 is turned off,
Since the attenuation circuit 2 and the ground are grounded via the resistor 53, the voltage value output to the attenuation circuit 2 becomes zero as shown in FIG.

【0033】図6は、減衰回路2へのアンテナ1からの
入力電圧に対する減衰量を示す特性図である。
FIG. 6 is a characteristic diagram showing the amount of attenuation with respect to the input voltage from the antenna 1 to the attenuation circuit 2.

【0034】図6において、減衰回路2へのアンテナ1
からの入力電圧が小さいとき、すなわち電圧値D以下の
ときには、その減衰量は零に近い値となり、減衰回路2
へのアンテナ1からの入力電圧がDより大きくなると、
その減衰量は急激に大きくなる。入力電圧値Dは、熱雑
音の影響を受けない電圧レベルである。
In FIG. 6, the antenna 1 to the attenuation circuit 2
When the input voltage from is small, that is, when the voltage value is D or less, the attenuation amount becomes a value close to zero, and the attenuation circuit 2
When the input voltage from the antenna 1 to the
The amount of attenuation increases rapidly. The input voltage value D is a voltage level that is not affected by thermal noise.

【0035】次に、本発明の他の実施例を図7および図
8を用いて説明する。なお、図7は、シュミットトリガ
回路52の入力電圧に対する出力電圧の関係を示す特性
図であり、図8は、制御回路5の入力電圧に対する出力
電圧の関係を示す特性図である。
Next, another embodiment of the present invention will be described with reference to FIGS. 7 and 8. 7 is a characteristic diagram showing the relationship between the input voltage of the Schmitt trigger circuit 52 and the output voltage, and FIG. 8 is a characteristic diagram showing the relationship of the output voltage with respect to the input voltage of the control circuit 5.

【0036】本実施例では、入力電圧が大きくなってい
く過程にあるときには、そのしきい値をVTHHとし、入
力電圧が小さくなっていく過程にあるときには、そのし
きい値をVTHLとする。
In the present embodiment, the threshold value is set to VTHH when the input voltage is increasing, and the threshold value is set to VTHL when the input voltage is decreasing.

【0037】このときの制御回路9の入出力特性は図9
に示すようになり、入力電圧が大きくなっていく過程に
あるときには、その入力電圧がしきい値VTHH以下のと
きには、出力電圧値を零とし、しきい値VTHHより大き
いときには、出力電圧値を入力電圧値と等しくなるよう
にする。
The input / output characteristics of the control circuit 9 at this time are shown in FIG.
When the input voltage is in the process of increasing, the output voltage value is set to zero when the input voltage is equal to or lower than the threshold value VTHH, and the output voltage value is input when the input voltage is higher than the threshold value VTHH. Make it equal to the voltage value.

【0038】一方、入力電圧が小さくなっていく過程に
あるときには、その入力電圧がしきい値VTHL以上のと
きには、出力電圧値を入力電圧値と等しくなるように
し、しきい値VTHL以下のときには、出力電圧値を零と
する。
On the other hand, when the input voltage is in the process of decreasing, the output voltage value is made equal to the input voltage value when the input voltage is above the threshold value VTHL, and when the input voltage value is below the threshold value VTHL, The output voltage value is set to zero.

【0039】この実施例においては、制御回路の入出力
特性にヒステリシス特性をもたせているため、制御回路
5への入力電圧がしきい値付近にあるとき、その出力電
圧が零からいきなり入力電圧値に等しい値になるという
急激な出力電圧値の変化を抑えることができ、受信電界
強度検出回路および制御回路5からなるループ回路の特
性を安定化させることができる。
In this embodiment, since the input / output characteristic of the control circuit has a hysteresis characteristic, when the input voltage to the control circuit 5 is near the threshold value, the output voltage suddenly changes from zero to the input voltage value. It is possible to suppress a sudden change in the output voltage value that becomes a value equal to, and to stabilize the characteristics of the loop circuit including the reception electric field intensity detection circuit and the control circuit 5.

【0040】[0040]

【発明の効果】以上説明したように、本発明による受信
信号減衰制御装置では、受信信号の信号レベル、すなわ
ち電界強度値が予め定められた値、例えば熱雑音の影響
を受ける値以下のときには、減衰回路の減衰量を制御す
る電圧値を零とするように構成したため、受信信号レベ
ルが小さいときに、熱雑音等による受信信号を減衰し過
ぎるという問題を解決することができ、受信機の最低動
作感度を向上することができる。
As described above, in the received signal attenuation control device according to the present invention, when the signal level of the received signal, that is, the electric field strength value is equal to or less than a predetermined value, for example, a value affected by thermal noise, Since the voltage value that controls the attenuation amount of the attenuator circuit is set to zero, it is possible to solve the problem of excessively attenuating the received signal due to thermal noise etc. when the received signal level is low, and the receiver's minimum The operation sensitivity can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す無線機の受信信号減衰
制御装置の機構ブロック図。
FIG. 1 is a mechanism block diagram of a reception signal attenuation control device for a wireless device according to an embodiment of the present invention.

【図2】図1に示した減衰回路の回路図。FIG. 2 is a circuit diagram of the attenuation circuit shown in FIG.

【図3】図1に示した制御回路のブロック図。FIG. 3 is a block diagram of the control circuit shown in FIG.

【図4】図2に示したシュミットトリガ回路の入出力特
性を示す特性図。
FIG. 4 is a characteristic diagram showing input / output characteristics of the Schmitt trigger circuit shown in FIG.

【図5】図1に示した制御回路の入出力特性を示す特性
図。
5 is a characteristic diagram showing input / output characteristics of the control circuit shown in FIG.

【図6】図1に示した減衰回路へのアンテナ1からの入
力電圧値に対する減衰量の関係を示す特性図。
6 is a characteristic diagram showing the relationship between the amount of attenuation and the input voltage value from the antenna 1 to the attenuation circuit shown in FIG.

【図7】本発明の他の実施例におけるシュミットトリガ
回路の入出力特性を示す特性図。
FIG. 7 is a characteristic diagram showing input / output characteristics of a Schmitt trigger circuit according to another embodiment of the present invention.

【図8】本発明の他の実施例における制御回路の入出力
特性を示す特性図。
FIG. 8 is a characteristic diagram showing input / output characteristics of a control circuit according to another embodiment of the present invention.

【図9】従来の受信信号減衰制御装置の一例を示す機構
ブロック図。
FIG. 9 is a mechanism block diagram showing an example of a conventional received signal attenuation control device.

【図10】従来の増幅回路への入力電圧値に対する受信
電界強度検出回路からの出力電圧値の理想的な関係を示
す特性図。
FIG. 10 is a characteristic diagram showing an ideal relationship between an input voltage value to a conventional amplifier circuit and an output voltage value from a received electric field strength detection circuit.

【図11】従来の増幅回路への入力電圧値に対する受信
電界強度検出回路からの出力電圧値の実際の関係を示す
特性図。
FIG. 11 is a characteristic diagram showing the actual relationship between the input voltage value to the conventional amplifier circuit and the output voltage value from the received electric field strength detection circuit.

【符号の説明】 1 ・・・ アンテナ 2 ・・・ 減衰回路 3 ・・・ 増幅回路 4 ・・・ 受信電界強度検出回路 5 ・・・ 制御回路 6 ・・・ 復調回路[Explanation of Codes] 1 ... Antenna 2 ... Attenuation circuit 3 ... Amplification circuit 4 ... Reception electric field strength detection circuit 5 ... Control circuit 6 ... Demodulation circuit

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 受信信号の電界強度値を検出し、検出さ
れた電界強度値を示す電界強度信号を出力する電界強度
検出手段と、 前記電界強度信号の示す電界強度値の大きさによって設
定され減衰量に基づいて前記受信信号を減衰する減衰手
段と、 前記電界強度信号の示す電界強度値が予め定められた値
以下のときに前記設定された減衰量より小さな減衰量を
与えるよう前記減衰手段を制御する制御手段と、を備え
ることを特徴とする受信信号減衰制御装置。
1. An electric field strength detecting means for detecting an electric field strength value of a received signal and outputting an electric field strength signal indicating the detected electric field strength value, and an electric field strength value set by the magnitude of the electric field strength value indicated by the electric field strength signal. An attenuating means for attenuating the received signal based on an attenuating amount, and an attenuating means for giving an attenuation amount smaller than the set attenuation amount when an electric field intensity value indicated by the electric field intensity signal is equal to or less than a predetermined value. And a control means for controlling the received signal attenuation control device.
【請求項2】 前記設定された減衰量より小さな減衰量
がほぼ零であることを特徴とする請求項1記載の受信信
号減衰制御装置。
2. The received signal attenuation controller according to claim 1, wherein an attenuation amount smaller than the set attenuation amount is substantially zero.
【請求項3】 前記制御手段が、 前記電界強度値が前記予め定められた値より大きなとき
にはハイレベルの信号を出力し、前記電解強度値が前記
予め定められた値以下のときには、ローレベルの信号を
出力するシュミットトリガ回路と、 前記ハイレベルの信号を入力するとオン動作し、前記ロ
ーレベルの信号を入力するとオフ動作するスイッチと、 一端が前記スイッチに接続され、他端が接地された抵抗
と、を備え、 前記電界強度値が前記予め定められた値以下のとき、前
記電界強度信号を前記減衰手段へ供給し、前記電界強度
値が前記予め定められた値より大きいとき、予め定めら
れた信号を前記減衰手段へ供給することを特徴とする請
求項2記載の無線機の受信信号減衰制御装置。
3. The control means outputs a high level signal when the electric field strength value is larger than the predetermined value, and outputs a low level signal when the electrolytic strength value is equal to or lower than the predetermined value. A Schmitt trigger circuit that outputs a signal, a switch that is turned on when the high level signal is input, and turned off when the low level signal is input, and a resistor whose one end is connected to the switch and the other end is grounded. And, when the electric field strength value is equal to or less than the predetermined value, the electric field strength signal is supplied to the attenuating means, and when the electric field strength value is larger than the predetermined value, a predetermined value is set. 3. The received signal attenuation control device for a radio device according to claim 2, wherein the received signal is supplied to said attenuation means.
【請求項4】 前記シュミットトリガ回路の入出力特性
がヒステリシスを有することを特徴とする請求項3記載
の無線機の受信信号減衰制御装置。
4. The received signal attenuation control apparatus for a radio device according to claim 3, wherein the input / output characteristic of the Schmitt trigger circuit has a hysteresis.
【請求項5】 前記減衰手段が、 電源に陰極が接続される第1のダイオードと、 前記第1のダイオードの陽極に陰極が接続される第2の
ダイオードと、 前記第2のダイオードの陽極に一端が接続される第1の
抵抗と、 コレクタ端子が前記抵抗の他端に接続され、エミッタ端
子が接地されたトランジスタと、 前記トランジスタのベースに一端が接続されることによ
り前記電界強度信号を前記トランジスタのベースに供給
する第2の抵抗と、を備えることを特徴とする請求項1
記載の無線機の受信信号減衰制御装置。
5. The attenuator includes a first diode whose cathode is connected to a power source, a second diode whose cathode is connected to an anode of the first diode, and an anode of the second diode. A first resistor having one end connected to it, a transistor having a collector terminal connected to the other end of the resistor and an emitter terminal grounded; A second resistor supplied to the base of the transistor.
A received signal attenuation control device for a wireless device as described.
【請求項6】 前記電界強度検出手段が、受信信号の振
幅を直流変換することにより前記電界強度信号を出力す
ることを特徴とする請求項1記載の受信信号減衰制御装
置。
6. The received signal attenuation control device according to claim 1, wherein the electric field strength detection means outputs the electric field strength signal by converting the amplitude of the received signal into a direct current.
JP7215548A 1995-08-24 1995-08-24 Received signal attenuation control device Expired - Lifetime JP2778546B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP7215548A JP2778546B2 (en) 1995-08-24 1995-08-24 Received signal attenuation control device
GB9617691A GB2305034B (en) 1995-08-24 1996-08-23 Apparatus for attenuating a received signal
KR1019960035348A KR970013830A (en) 1995-08-24 1996-08-24 DEVICE FOR CONTROLLING ATTENUATION OF A RECEIVED SIGNAL < RTI ID = 0.0 >

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7215548A JP2778546B2 (en) 1995-08-24 1995-08-24 Received signal attenuation control device

Publications (2)

Publication Number Publication Date
JPH0964774A true JPH0964774A (en) 1997-03-07
JP2778546B2 JP2778546B2 (en) 1998-07-23

Family

ID=16674261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7215548A Expired - Lifetime JP2778546B2 (en) 1995-08-24 1995-08-24 Received signal attenuation control device

Country Status (3)

Country Link
JP (1) JP2778546B2 (en)
KR (1) KR970013830A (en)
GB (1) GB2305034B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690011U (en) * 1979-12-14 1981-07-18

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1280349B (en) * 1966-02-18 1968-10-17 Telefunken Patent Receiver with automatic regulation to an approximately constant output voltage
JPS6027234A (en) * 1983-07-22 1985-02-12 Nec Corp Receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690011U (en) * 1979-12-14 1981-07-18

Also Published As

Publication number Publication date
KR970013830A (en) 1997-03-29
JP2778546B2 (en) 1998-07-23
GB9617691D0 (en) 1996-10-02
GB2305034B (en) 2000-10-25
GB2305034A (en) 1997-03-26

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