JPH0961503A - Apparatus for calibrating timing of test signal of semiconductor-testing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a skew error of pins due to a temperature change inside an apparatus by obtaining a predetermined temperature correction coefficient and providing a memory means for storing the predetermined temperature correction coefficient and a control means for calibrating the timing of each pin. SOLUTION: The temperature inside a semiconductor test device is made to change. At this time, a minute change Δfsys of a frequency of a system loop and a minute change Δfdut of a frequency of a timing calibration loop for each pin are measured. Temperature correction coefficient K of each pin is obtained according to K=Δfdut /Δfsys , and obtained coefficient values are stores in a memory 40. The frequency of the system loop of the pin 1 as a reference pin and the frequency of the timing calibration loop are measured and set as references. The calibration value of each pin and the amount of a temperature difference correction when each pin is calibrated are obtained according to respective specific formulae. The changing amount of environmental temperature when each pin is calibrated can be corrected at the point of time for reference pin measurement with the temperature difference correction amount. Accordingly, a timing is adjusted with a factor of a skew error of pins being offset.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor test apparatus for correcting a phase shift generated between pins of a test signal due to a temperature change when sequentially calibrating phase values of a test signal output to a plurality of pins. The present invention relates to a test signal timing calibration device.

[0002]

2. Description of the Related Art As shown in FIG. 8, a timing calibration device has a timing generator 1 (TG; Timing G).
enerator) and waveform shaper 2 (FC: Format Cotrol)
Pattern Generator 50 (PG: Pattern Generator)
And a variable delay device 3, a driver 4 and a multiplexer 5.

The timing generator 1 is a reference timing signal generator for a test cycle and a test signal. The waveform shaper 2 receives the pattern data from the pattern generator 50 and shapes it into a desired test pattern waveform with the reference timing signal generated by the timing generator 1.
The variable delay unit 3 is a fine adjustment delay element that corrects the deviation of the propagation delay that occurs from the waveform shaper 2 to the driver output terminal, and the skew between the pins at the output end of each driver 4 (
skew) is adjusted to zero.

In a semiconductor test apparatus, there are a plurality of test signal channels corresponding to a plurality of pin terminals of a device under test, and calibration is performed so that the phases of test signals output from a plurality of pins match with the same timing setting. (Calibration) is being performed. For this reason, the temperature inside the semiconductor test equipment is measured and detected, and the calibration is automatically carried out when the temperature changes beyond a specified value.

This internal temperature measurement uses the change in the propagation delay of the gate in the timing generator 1 as a temperature sensor. That is, the switch 22 in the timing generator 1 is switched to the S side to form a system loop, the loop frequency fsys due to the system loop oscillation is counted by the counter 32, and the change amount from the value at the previous calibration is calculated as the temperature change amount. Ask as.

Next, in adjusting the skew between the pins, the switch 22 in the timing generator 1 is switched to the T side,
The output signal of each pin is sequentially selected by the multiplexer 5 to form an oscillation loop, the loop frequency fdut is counted by the counter 32, and the difference from the reference is calculated by the calculation circuit 34,
This difference is converted into an analog voltage by the D / A converter 36, and the corresponding variable delay device 3 is adjusted to calibrate so as to eliminate the skew of each pin.

However, in response to the increase in the number of pins of the device under test, the pin output of the semiconductor test equipment reaches several hundreds to more than one thousand. Therefore, as in the example of temperature change during calibration shown in FIG. 5, the temperature in the semiconductor test apparatus changes little by little while the pins are sequentially calibrated. As a result, when the pins are calibrated, they are calibrated in different temperature states. In this case, a difference in propagation delay (Tpd) occurs between the pin calibrated first and the pin calibrated later, as shown in the deviation from the reference phase due to the temperature change during calibration shown in FIG. FIG. 7 is a diagram showing a skew error between pins due to this.

Since the timing generator 1, the waveform shaper 2, the variable delay device 3, and the driver 4 which constitute the semiconductor test device have different device temperatures at the time of calibration from pin 1 to pin n, respectively. The pin-to-pin skew cannot be calibrated correctly. Therefore, a skew error due to a temperature difference during the calibration period occurs even immediately after the calibration of the phases of all the pins is completed.

[0009]

As described above, in the case where the temperature changes while the phase of each pin is adjusted, each pin is adjusted at a different temperature. A phase error occurs between them, which is a practical inconvenience. Therefore, an object of the present invention is to provide a calibration device that detects a temperature change in the device during timing calibration and does not generate a skew error between pins for each calibration pin.

[0010]

In order to solve the above-mentioned problems, in the structure of the present invention, the temperature correction coefficient K shown in the equation 1 for each of a plurality of test signals is obtained in advance, and a storage means for storing and storing this data is provided. A temperature change detecting means for detecting temperature change during calibration is provided, for example, temperature change detecting means based on the system loop frequency fsys is provided, and the temperature change in the apparatus is detected by the temperature change detecting means each time the pin calibration is performed, and the storage means ( The temperature correction coefficient K of the corresponding pin is received from the memory 40), the correction amount of the temperature change is calculated and corrected, and this is given to the timing delay adjusting means (variable delay unit 3) to calibrate the timing of each pin. The control means is a constituent means. As a result, in the timing calibration of a plurality of test signals supplied to the device, it is possible to realize a calibration apparatus in which an error of pin skew does not occur due to a temperature change in the apparatus during the timing calibration.

As described above, according to the present invention, the system loop for detecting the change in the internal temperature of the semiconductor test apparatus and the loop for the system timing calibration have the phase of the timing calibration loop for the minute temperature change caused by the system loop. When the temperature correction coefficient is obtained from the minute change and the calibration for adjusting to the reference value of the phase of each pin is performed, the phase delay is used as a component for subtracting the phase delay corresponding to the temperature change.

The storage means or memory 40 may be a non-volatile memory or an external storage medium having a storage capacity for the temperature correction coefficient K of each pin. As the temperature change detecting means, the loop oscillation frequency fsy utilizing the temperature dependence of the propagation delay of the gate in the timing generator 1 is used.
There is a temperature change detecting means by s, or a temperature change detecting means by a thermistor, a thermocouple, and a temperature sensor IC. As the control means, first, a certain pin is used as a reference pin, the value obtained by the temperature change detection means at the time of measuring the reference timing is used as the value of the reference temperature point, and then the timing calibration of each pin is performed at each timing. The temperature change detection means obtains the temperature value for each measurement, the difference between the reference temperature point value is calculated, and the correction value obtained by multiplying the difference value by the temperature correction coefficient K of the corresponding pin from the storage means, that is, the memory 40, Variable delay device 3 of the corresponding pin so that the value is subtracted from the timing measurement value of each pin
There is a means to control. The timing delay adjusting means is a variable delay element (for example, variable delay device 3) provided in the path from the waveform shaper 2 to each pin output terminal, and the D / A
Some of them can adjust the delay with an analog voltage by 36, and some can adjust the delay by setting digital data.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION In the present invention, as shown in the block diagram of the timing calibration apparatus of FIG. 1, a memory 40 for storing a temperature correction coefficient is added to the conventional configuration, and an arithmetic circuit 34 corresponding thereto is formed. . For the calibration of the present invention, the temperature correction coefficient K for each pin is obtained in advance by the timing calibration loop and stored in the memory 40. That is, the internal temperature of the semiconductor test apparatus is changed, and the minute change Δfsys in the system loop frequency fsys and the minute change Δfdut in the timing calibration loop frequency fdut of each pin are measured. From this, the temperature correction coefficient K of each pin is obtained by the following equation, and this coefficient value is stored in the memory 40. Temperature correction coefficient K = Δfdut / Δfsys ... Equation 1 This temperature correction coefficient K is almost linear in the normal temperature range as shown in the characteristic example of change in propagation delay of the system loop in FIG. Since it is a slope, this temperature correction coefficient K
Can be regarded as a constant value.

Next, a procedure for performing calibration will be described. As shown in FIG. 3, the first calibration pin 1 is used as a reference pin. As the value of the reference temperature point, the system loop frequency value fsysref of this reference pin is measured and used as the value of the reference temperature point.
Loop frequency value f for timing calibration of pin 1 at this time
The dutref is measured and used as the reference. Let fsysn be the loop frequency measurement value at each pin calibration time, fdutn be the timing calibration loop frequency measurement value for each pin, and ΔTn be the temperature difference correction amount ΔT between each pin 2 to n and the reference pin, and Kn
Is the temperature correction coefficient K of each pin stored in the memory 40 obtained by the above equation 1, the calibration value fdutn of each pin is given by fdutn = fdutref−ΔTn × Kn ... The temperature difference correction amount ΔTn at the time of calibrating each pin is given by ΔTn = fsysref−fsysn. By this temperature difference correction amount ΔTn, it is possible to correct the environmental temperature change amount between the reference pin measurement time point and each pin calibration time point, and it is possible to realize timing adjustment that cancels out the cause of skew error between each pin due to temperature change during calibration. Becomes

In the description of the above embodiment, the change in the propagation delay of the gate in the timing generator 1 is used as the temperature sensor as the environmental temperature measuring means in the apparatus, and the switch 22 is S.
The explanation was made in the case where the system loop oscillation frequency fsys is used by switching to the side, but if desired, it is replaced with another temperature sensor (thermistor, thermocouple, temperature sensor IC, etc.), and the corresponding temperature correction coefficient is received in response. It is also possible to obtain K and store it in the memory 40, and to calculate the temperature difference correction amount ΔTn at the time of calibration of each pin corresponding to this temperature sensor at the time of calibration, and it can be carried out in the same manner.

In the description of the above-mentioned embodiment, although the description has been given with the plurality of drivers 4 as an example, although not shown in the drawing, the timing is adjusted by using the same calibration means also on the comparator side which requires timing adjustment. Adjustment may be carried out.

[0017]

Since the present invention is configured as described above, it has the following effects. In semiconductor test equipment, when the number of pins of the device under test is large, it takes time to calibrate the phase of the test signal in the loop for each pin, and even if the system temperature changes during that period, Since the phase is corrected with respect to the temperature change, it is possible to eliminate the phase error due to the influence of the temperature of the output signal at the same timing as shown in FIG.

[0018]

[Brief description of drawings]

FIG. 1 is a block diagram of a timing calibration device of the present invention.

FIG. 2 is an example of a change characteristic of a propagation delay of a system loop when calibrating each pin of the present invention.

FIG. 3 is a correction phase value when calibrating each pin of the present invention.

FIG. 4 is an example of a skew error characteristic diagram with and without phase correction according to the present invention.

FIG. 5 is an example of an internal temperature rise characteristic diagram during a calibration period.

FIG. 6 is a diagram illustrating a deviation from a reference phase due to a temperature change during calibration of each conventional pin.

FIG. 7 is an example of skew error characteristics between each pin after calibration of each conventional pin.

FIG. 8 is a block diagram of a conventional timing calibration device.

[Explanation of symbols]

1 Timing generator (Timing G
enerator) 2 Waveform shaper 3 Variable delay device 4 Driver 5 Multiplexer 22 Switch 32 Counter 34 Arithmetic circuit 36 D / A converter 40 Memory 50 Pattern generator

Claims (5)

[Claims] 1. In the timing calibration of a plurality of test signals supplied to a device, a temperature correction coefficient K for each of the plurality of test signals is obtained in advance, and a storage means for storing and storing this data is provided to detect a temperature change during the calibration. Temperature change detecting means for detecting the temperature change in the device by the temperature change detecting means each time the pin is calibrated, and receiving the temperature correction coefficient K of the corresponding pin from the storing means to correct the temperature change amount. A timing calibrating apparatus for a test signal in a semiconductor test apparatus, comprising: a control means for calculating and correcting, and providing the timing delay adjusting means with the timing delay adjusting means to calibrate the timing of each pin. 2. A timing calibration device for a test signal in a semiconductor testing device, wherein the storage means according to claim 1 uses the temperature correction coefficient K of each pin as a non-volatile memory having a storage capacity or an external storage medium. 3. The temperature change detecting means according to claim 1, wherein the temperature change detecting means is a temperature change detecting means, or a thermistor, a thermocouple, and a temperature sensor IC, by a loop oscillation frequency utilizing the temperature dependence of a propagation delay of a gate in a timing generator. A test signal timing calibrating device in a semiconductor test device as a temperature change detecting means. 4. The control means according to claim 1, first, a certain pin is used as a reference pin, and the value obtained by the temperature change detecting means at the time of measuring the reference timing is used as the value of the reference temperature point. In the pin timing calibration, the temperature change detection means obtains the temperature value for each timing measurement, the difference between the reference temperature point value is calculated, and the difference value is multiplied by the temperature correction coefficient K of the corresponding pin from the storage means. The test signal timing calibrating device in the semiconductor testing device, which is a means for controlling the variable delay device 3 of the corresponding pin so that the corrected value becomes a value subtracted from the timing measurement value of each pin. 5. The timing calibrating device for a test signal in a semiconductor testing device, wherein the timing delay adjusting means according to claim 1 is a variable delay element provided in a path from the waveform shaper (2) to each pin output terminal.