JPH0945812A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To cope with the narrow pitch and multipin formation by a method wherein the third aperture part corresponding to a semiconductor element is pinched between the first insulating layer and the second insulating layer, and a conductor lead pattern layer of lead frame is formed with a plurality of conductor leads which are radially arranged surrounding the third aperture part. SOLUTION: On a conductor circuit board 15, the first insulative layer 17, with which a plurality of conductor leads 22a consisting of the adhesive layers such as a thermosetting solder resist, etc., are integrary connected, and the second insulative layer 19, consisting of a photosetting dry film. solder mask where a plurality of conductive holes 28 are formed, are provided. The third aperture part 21, corresponding to a semiconductor element 13, is pinched by the first insulative layer 17 and the second insulative layer 19. Further, the conductor lead patterns 22 of a lead frame 20 are radially arranged. As a result, the semiconductor device can cope with the tendency of narrow pitch and multifilm formation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a BGA (ball grid array) type semiconductor device, and more particularly, to a conductor lead pattern of a conductor circuit board layer to be bonded to a metal board layer, by pressing or And a lead frame having a conductor lead pattern formed by etching B
The present invention relates to the structure of a GA type semiconductor device.

[0002]

2. Description of the Related Art In recent years, semiconductor devices such as IC and LSI are
BGA (Ball Grid) is used for miniaturization of circuit elements, downsizing of semiconductor devices, and cost reduction.
It has been proposed to use a fusible solder ball arranged in a grid pattern for a plurality of external connection terminals of a semiconductor device, and to mount this on a mounting pad provided on a mounting substrate.

According to this mounting method, the semiconductor device is positioned and mounted on a plurality of mounting pads on the mounting substrate provided corresponding to each of the plurality of fusible solder balls, and then heated. By reflowing the fusible solder balls, the fusible solder balls are collectively connected to the mounting pads formed on the mounting substrate, so that the semiconductor device can be easily mounted and high density mounting can be achieved. is there.

The conductor circuit board layer used in this type of BGA type semiconductor device is a TAB tape or glass cloth epoxy provided with a copper foil layer on one or both sides of a first insulator layer such as a holimide material. A member is used, which is provided with a first opening corresponding to a semiconductor element in the central portion, and is composed of a plurality of conductor leads formed along the week side of the opening by etching processing in the copper foil layer. A conductor lead pattern, a second opening of an epoxy cover coat for covering and protecting the conductor layer lead pattern, and a plurality of solder balls joined through through holes provided in the second opening.
A structure including a potting mold resin encapsulant is a general example.

[0005]

However, in the BGA type semiconductor device according to the above-mentioned conventional example, a TAB (Tape / Tape) having a copper foil layer on at least one surface is used as a conductor circuit board joined to a metal substrate. Automed ・ B
onboard substrate or glass cloth / epoxy resin substrate, which complicates the work of forming the conductor circuit board layer, hinders production efficiency, and manufactures semiconductor devices such as requiring new equipment. There was an economic problem of increasing costs.

Therefore, the inventor has tried to provide a low-cost BGA type semiconductor device by using a conductor lead pattern of a lead frame formed by press working and / or etching.

However, when the conductor lead pattern of the lead frame is used for the conductor circuit board layer, a tie bar formed to integrally hold the conductor leads in the middle of the conductor leads of the conductor lead pattern. It was necessary to form a lead frame from which

However, when the tie bar is removed, each conductor lead of the conductor lead pattern is in a cantilevered state (free standing), and the internal residual stress caused by the working history of the lead frame is released, transported, or manually operated. There is a problem that the initial shape dimension between the conductor leads cannot be maintained due to the deformation such as the deviation between the conductor leads and the warp.

[0009]

An object of the present invention is to provide a conductor circuit using a TAB substrate or a glass cloth / epoxy resin substrate by using a conductor lead pattern of a lead frame formed by press working and / or etching. Highly reliable BGA that has the same function as the board, and can easily cope with the trend of narrow pitch and multiple pins.
Type semiconductor device at a low cost.

[0010]

The feature of the present invention that achieves the above-mentioned object is that it is a thermosetting material having the same function as a connecting tab integrally connecting conductor leads of a conventional conductor lead pattern. A lead frame 2 formed by pressing or etching by integrally connecting the plurality of conductor leads with a resin member.
0 is applied to the conductor lead pattern of the conductor circuit board layer 15 of the BGA type semiconductor device 10.

Thus, the semiconductor device according to claim 1 is
Metal substrate layer 11 having semiconductor element mounting cavity 12
And a semiconductor element 13 mounted on the semiconductor element mounting surface 12a of the cavity 12 via a conductive adhesive layer 13a.
And first and second insulator layers 17 and 1 in which first and second openings 16 and 18 corresponding to the semiconductor element 13 are formed.
9 and the conductor circuit board 15 having a conductor lead pattern layer 22 composed of a plurality of conductor leads 22a between the first and second insulator layers 17 and 19, and the cavity 12 are filled with a resin sealing material, A semiconductor device 10 comprising a resin encapsulation member (package) 24 encapsulating the semiconductor element 13 and the like by a potting mold method and a plurality of solder balls 26 serving as external connection terminals.
The conductor circuit board 15 has a first insulator layer 17 integrally connecting and supporting the conductor leads 22a made of an adhesive layer such as a thermosetting solder resist, and a plurality of conduction (well) holes 28. The second insulating layer 19 formed of the photocurable dry film solder mask and the first insulating layer 19;
A third opening portion 21 corresponding to the semiconductor element 13 and sandwiched between the insulating layer 17 and the second insulating layer 19, and a conductor lead pattern 22 of a lead frame 20 radially arranged so as to surround the third opening portion 21. It is composed of.

The semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein the plurality of conductor leads 22a are provided with external connection terminal lands 22b at one end thereof and wire bonding at the other end thereof. The pad 22c is provided.

A semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first and second aspects, wherein the second insulating layer 19 exposes the external connection terminal land 22b to a conduction (well) hole 28. And has a second opening 18 that forms an exposed region of the wire bonding pad 22c.

Further, a semiconductor device according to a fourth aspect is the semiconductor device according to the first aspect, wherein a heat resistant adhesive layer 29 is interposed between the metal substrate 11 and the conductor circuit substrate 15. It is said that.

Furthermore, a semiconductor device according to a fifth aspect is the semiconductor device according to the fourth aspect, wherein the heat resistant adhesive 29 is composed of a thermosetting prepreg layer.

[0016]

In the semiconductor device constructed as described above, the first insulator layer 17 formed on the conductor lead pattern 22 has the same function as the connection function of the tie bar formed between the conventional conductor leads 22a. Since the conductor leads 22a of the conductor lead pattern 22 are integrally connected and held, the occurrence of positional deviation between the conductor leads is prevented and the lead frame 20 (see FIG. 4) is formed depending on the processing history. It is possible to suppress the release of the internal residual stress that has been left behind, and it is possible to maintain the dimensional accuracy of the conductor lead pattern 22 in the initial state.

Further, since the conductor lead pattern 22 of the conductor circuit board 11 is the conductor lead pattern 22 of the lead frame 20 formed by pressing or etching from a metal strip, the conductor circuit board 11 is used. Is simplified, the production efficiency of the semiconductor device 10 is significantly improved, and the manufacturing cost of the semiconductor device 10 can be reduced.

Furthermore, the high density conductor lead pattern 22 can be easily formed, and the demand for higher density of the semiconductor device 10 can be easily met.

[0019]

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. 1 is a plan view showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a sectional view showing a configuration of a semiconductor device according to the embodiment of the present invention, and FIG. 3 is a conductor circuit board according to the embodiment of the present invention. FIG. 4 is a cross-sectional view showing the structure, FIG. 4 is a plan view showing a lead frame used in the embodiment of the present invention, and FIG. 5 is a first and a first insulation layers used in the embodiment of the present invention. 6 is a plan view showing a state in which the opening 3 is formed.
Is a sectional view thereof.

Next, the structure of a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 1, 2 and 3. According to the drawings, the semiconductor device 10 has good thermal conductivity. A first opening corresponding to the metal substrate layer 11 having a concave semiconductor element mounting cavity 12, which is an example of a member, and the plurality of conductor leads 22a are integrally connected and supported, and the semiconductor element 13 corresponds to the first opening. First part 16 is formed
The thermosetting solder resist layer, which is an example of the insulating layer 17 of FIG.
The third opening corresponding to the semiconductor element 13 is sandwiched by a photo-curable dry film / solder mask layer, which is an example of the second insulating layer 19 in which the second opening 18 corresponding to No. 3 is formed. The portion 21 and the conductor lead pattern 22 of the lead frame 20 radially arranged so as to surround the portion 21.
And a semiconductor circuit board 15 bonded to the metal substrate layer 11 and a semiconductor bonded to the element mounting surface 12a of the cavity 12 of the metal substrate via an Ag paste which is an example of a conductive adhesive layer 13a. Element 13, a plurality of electrode pads 14 of the semiconductor element 13, and the conductor circuit board 1
5, the bonding wire 23 connecting each of the bonding pads 22c of the conductor lead 22a of 5 to form an electrically conductive circuit and the cavity 12 are filled with a resin sealing material, and the semiconductor element 13 is formed by a potting mold method. It is configured by a fat sealing member (package) 24 that seals the bonding wires 23 and the like, and a plurality of solder balls 26 that protrude in a state of being connected to the external connection terminal lands 22b. Here, the conductor lead 22a
Has an external connection terminal land 22b at one end and a wire bonding pad 22c at the other end.
3 has a structure shown in FIG. 3 in which the plurality of conduction holes 28 formed in the insulating layer 19 expose the external connection terminal lands and the second openings expose the bonding pads 22c.

Next, the structure of the conductor circuit board 15, which is a feature of the present invention, will be described with reference to FIGS. 3, 4, and 5.

First, referring to FIG. 4, a semiconductor element 13 is formed from a copper strip, which is an example of a strip-shaped metal material, by conventional press working and / or etching (in this embodiment, press working is used). A plurality of conductor leads 22a for forming an electrical conduction circuit through the bonding wire 23
Tie bar (binder) 29 so that the tips of the
And a conductor lead pattern 22 having the plurality of conductor leads 22a radially arranged as shown in FIG.
A lead frame 20 having a desired shape is formed, and a thermosetting adhesive which is an example of the first insulator layer 17 is formed on the area surface of the conductor lead pattern 22 (a prepreg is used in this embodiment). After being attached and temporarily supporting the conductor leads 22a, a process for forming the third opening 21 is performed and the tie bar 29 is removed to form the lead frame shown in FIG.

Next, the conductor lead pattern 22 including the first insulator layer 16 is punched and separated from the lead frame on the mounting surface side of the semiconductor element 13 of the metal substrate 11 formed separately, and Temporary bonding is performed so that the first opening 16 and the third opening 21 are aligned with the cavity 12 of the metal substrate 11, and the metal substrate and the conductor pattern are connected to each other by a known printed wiring board laminate. In the same manner as the formation of the above, thermocompression bonding (laminating temperature is, for example, about 250 °) is performed with a heat plate to connect the conductor leads, and as shown in FIG. 6, the metal substrate and the conductor lead pattern are joined. .

Here, the prepreg (prepre)
g) has a three-layer structure in which carbon fibers such as glass cloth are impregnated with an epoxy resin or the like, cured to the B stage (semi-cured state), and sandwiched with a carrier film and a cover film. B stage), it has some adhesiveness, and in order to react with the conductor leads to some extent (bridging between the leads), adjacent leads of the conductor lead portions are connected and supported, and their positions Can be temporarily held. Furthermore, since it has thermosetting properties, by performing hot pressing with a heat plate,
After temporarily filling the through hole portion of the conductor lead pattern of the lead frame with fluidity such as almost liquid, it can be completely cured to maintain its positional relationship. Therefore, only applying a known processing technique to the insulating material layer does not require a special process, and as a result, a desired lead pitch can be easily realized. In this embodiment, for example, YEF-040 manufactured by Mitsubishi Petrochemical Co., Ltd. is used.

Then, as another embodiment (not shown), a conventional silk screen printing method is used to form the external connection on the conductor lead pattern surface opposite to the bonding surface bonded to the conductive substrate. A well (conducting hole) exposing the terminal land and a third exposing the wire bonding region
Is formed, and a solder mask layer which is an example of a second insulator layer that covers the conductor lead pattern is formed to form the conductor circuit board (see FIG. 4).
Here, the second insulating layer (solder mask layer) is formed by using a silk screen printing method for the solder resist, but it is also possible to form the photocurable dry film photoresist by using a photographic method.

The conductor circuit board 11 may be formed by using dry film photoresist (not shown) as the first and second insulator layers and connecting and supporting the conductor leads. is there.

In this case, the conductor lead pattern is laminated (thermocompression bonding) from both sides thereof with a photoresist called a dry film photoresist, the space between the conductor leads is filled with the photoresist, and the photoresist is on the upper surface of the conductor lead. Is also formed with a predetermined thickness,
The photoresists embedded between the conductor leads are also continuous with each other. Then, the photoresist is UV-cured with predetermined ultraviolet rays to be formed.

Here, the conductor circuit board using the dry film photoresist for the first and second insulator layers is connected to the metal substrate through the prepreg layer.

As described in this embodiment, since the conductor leads adjacent in the conductor lead arrangement direction are connected and supported by the first insulator layer and the second insulator layer, the lead frame of the prior art is used. It has a function similar to that of a tie bar integrally formed with the above, and can maintain the initial shape and size of the conductor lead pattern. Furthermore, since the prepreg is used, it is possible to provide a highly reliable semiconductor device in which the insulating property is remarkably improved and the bonding with the metal substrate is stable.

[0030]

As described above, the semiconductor device of the present invention uses the conductor lead pattern formed by press working and / or etching, and the first insulating layer is provided between the plurality of conductor leads of the conductor lead pattern. Integrated with
Since the shape and size of the conductor lead pattern are maintained in the initial state, the productivity can be improved and the high density BGA type semiconductor device equivalent to the conventional BGA type semiconductor device can be reduced. Can be provided at cost.

Further, the solder resist mask layer 1
Since the conductor circuit pattern 15 is covered with 8, a fine conductor circuit pattern generated by handling of processing steps such as transportation and alignment is protected from physical deformation and chemical damage, and a high-quality semiconductor device is obtained. Can be provided at low cost.

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a configuration of a conductor circuit board according to an embodiment of the present invention.

FIG. 4 shows a lead frame used in an embodiment of the present invention.
FIG. 3 is a plan view showing a state in which the insulating layer of is formed.

5 is a plan view showing a state in which first and third openings are formed in the lead frame shown in FIG.

6 is a plan view showing a state in which the conductor lead pattern shown in FIG. 5 is joined to a metal substrate.

[Explanation of symbols]

 10 Semiconductor Device 11 Metal Substrate 12 Semiconductor Element Mounting Cavity 12a Semiconductor Element Mounting Surface 13 Semiconductor Element 13a Conductive Adhesive Layer 14 Electrode Pad 15 Conductor Circuit Board 16 First Opening 17 First Insulator Layer 18 Second Opening 19 Second insulator layer 20 Lead frame 21 Third opening 22 Conductor lead pattern 22a Conductor lead 22b External connection terminal land 22c Wire bonding pad 23 Bonding wire 24 Potting resin member 25 Solder paste 26 Solder ball 28 Conduction hole (or well) 29 Tie bar

Claims (5)

[Claims] 1. A metal substrate having a semiconductor element mounting cavity, a semiconductor circuit element mounted in the cavity via a conductive adhesive layer, and a first corresponding to the semiconductor element.
The first and second insulator layers having the second opening and the first
A resin encapsulation body obtained by forming a conductor circuit board layer composed of a plurality of conductor lead layers between the first insulation layer and the second insulation layer and an electric conduction circuit, and then encapsulating the semiconductor element or the like by a potting molding method. And a semiconductor device having an external connection terminal composed of a plurality of solder balls, wherein the conductor circuit board layer is composed of a thermosetting solder resist layer or the like for connecting and supporting the plurality of conductor leads. One insulator layer, a second insulator layer composed of a photo-curable dry film solder mask or the like having a plurality of conduction holes (wells) formed therein, and a third insulator layer sandwiched between them and corresponding to a semiconductor element. A semiconductor device having an opening and a conductor lead pattern layer of a lead frame including a plurality of conductor leads radially arranged so as to surround the opening. 2. The semiconductor device according to claim 1, wherein each of the plurality of conductor leads has an external connection terminal land at one end thereof and a wire bonding pad region at the other end thereof. 3. The second insulating layer has a conduction hole (well) for exposing the external connection terminal land, and a second opening for exposing the wire bonding pad region is provided. The semiconductor device according to claim 1 or 2. 4. The semiconductor device according to claim 1, wherein a heat-resistant adhesive layer for bonding the metal substrate and the conductor circuit substrate is provided between the metal substrate and the conductor circuit substrate. 5. The semiconductor device according to claim 4, wherein the heat-resistant adhesive is composed of a prepreg agent.