JPH0937317A - Message receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To properly use two opposed performance items, i.e., the reduction of a bit error rate and low power consumption, for the reception of a message. SOLUTION: This message receiver is provided with a 1st decoding part 15 for executing decoding processing after the completion of receiving operation of a receiving part 11, a 2nd decoding part 16 for executing decoding processing simultaneously with the receiving operation of the receiving part 11 and a selection part 12 for selecting which decoding part, the 1st decoding part 15 or the 2nd decoding part 16, is used for decoding based upon the bit error rate of a synchronizing signal obtained from the receiving part 11. When the bit error rate is high, the 1st decoding part 15 is selected and the influence of the operation noise of the decoding part 15 upon a received signal is suppressed to the minimum to reduce the bit error rate. When the bit error rate is low, the 2nd decoding part 16 is selected and only necessary data are received from a data analysis result, so that processing time is shortened and power consumption can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a message receiving device which receives an individual selective call.

[0002]

2. Description of the Related Art In recent years, a message receiving device such as a pager has been expanded from a conventional ringing-only calling method to a calling method for transmitting a message by transmitting and receiving numbers and characters, and further shifting to graphics and the like. Is being pursued. Due to such function expansion, the transmitted and received data tends to have a large capacity.

A conventional message receiving device will be described below. FIG. 5 shows the configuration of a conventional message receiving device. In FIG. 5, reference numeral 51 is a receiving unit that receives and demodulates a signal from a transmitting station and outputs a data string, and 52 analyzes the data string output from the receiving unit 51 and performs error correction, address verification, and message storage. Reference numeral 53 denotes a decoding unit for performing the above, and a display unit 53 displays the message stored in the decoding unit 52.

The operation of the message receiving device configured as described above will be described below. First, the receiving unit 51 receives a signal from the transmitting station. This signal is, for example, the POCSAG signal used in the current pager. The receiving unit 51 demodulates this signal and converts it into a data string. The decoding unit 52 performs error correction on the data string obtained from the receiving unit 51, and if the resulting data is an address, collates it with an address unique to this message receiving device. If they match at this time, an error is corrected in the data string received next, a message is generated, and the message is stored. Display unit 53
Displays the message stored by the decoding unit 52.

[0005]

However, in the above-mentioned conventional message receiving device, circuit restrictions are imposed for downsizing and low power consumption, and a weak signal must be received depending on the form of use. Therefore, there is a problem in that the operation of the message receiving apparatus itself affects the receiving unit and causes a bit error. Also, as the message length becomes longer, the possibility that an error will be included in the message increases, power consumption increases, the battery life becomes shorter, and large-capacity messages cannot be received. It was a challenge for increasing the message volume.

The present invention solves the above-mentioned problems of the prior art, and provides a message receiving apparatus capable of appropriately using contradictory performance items such as reduction of bit error rate and low power consumption for message reception. The purpose is to

[0007]

In order to achieve the above object, the present invention provides a first decoding unit which performs a decoding process after the receiving operation of the receiving unit is completed, and a decoding operation which is performed simultaneously with the receiving operation of the receiving unit. A second decoding unit that performs processing and a selection unit that selects which of the first decoding unit and the second decoding unit to perform decoding according to the bit error rate of the synchronization signal obtained from the receiving unit. .

[0008]

According to the present invention, when the bit error rate is expected to be high due to the above configuration, the first decoding unit that performs the decoding process after the receiving operation of the receiving unit is completed is selected, and the operation of the decoding unit is selected. The bit error rate can be reduced by minimizing the influence of noise on the received signal. If the bit error rate is expected to be low, the second decoding unit that performs decoding processing simultaneously with the receiving operation of the receiving unit is selected,
Since only the necessary data is received from the analysis result of the data, the processing time is shortened and the power consumption can be reduced. From the above, by selecting one of a plurality of decoding units having different characteristics depending on the bit error rate and performing decoding, conflicting performance items such as reduction of bit error rate and low power consumption are appropriately used. be able to.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of a message receiving apparatus according to an embodiment of the present invention. In FIG. 1, reference numeral 11 denotes a receiving unit that receives and demodulates a signal transmitted by a transmitting station, converts the signal into a data string, and outputs the data string. A receiving unit 11 receives the synchronization signal transmitted from the transmitting station, converts the synchronization signal into a data sequence, calculates a bit error rate of the data sequence of the synchronization signal obtained from the reception unit 11, and outputs a selection signal to the decoding unit. It is a selection unit to do. 13 is a first selection signal output by the selection unit 12 when the bit error rate is expected to be high, and 14
Is a second selection signal output by the selection unit 12 when the bit error rate is expected to be low. Reference numeral 15 is a first decoding unit which is activated upon receiving the first selection signal 13, and is a receiving unit 11
After receiving the data strings of all the blocks received by, the interleave is removed, the error is corrected, and the message obtained by performing the address collation is stored in the internal memory.
Reference numeral 16 denotes a second decoding unit which is activated in response to the second selection signal 14, which deinterleaves the already stored data sequence to correct errors, and performs address collation and the like to obtain a message obtained internally. The data string output from the receiving unit 11 is stored in the memory and at that time. 1
A display unit 7 displays a message stored in the memory in each decoding unit by the decoding process of the first decoding unit 15 or the second decoding unit 16. Reference numeral 18 is a data sequence of the synchronization signal output from the receiving unit 11, and 19 is a data sequence of the interleaved block output from the receiving unit 11.

The operation of the message receiving apparatus of this embodiment configured as described above will be described. First, the structure of a signal received by the message receiving device will be described with reference to FIG. In FIG. 2A, reference numeral 21 indicates the format of the signal transmitted from the transmitting station. 22
Indicates a sync signal, and 23 indicates a data string interleaved in units of n words (hereinafter, this data string is referred to as a block). The transmitting station first transmits the synchronization signal 22, and subsequently transmits j blocks 23. FIG. 2B shows the configuration of the block 23. In FIG. 2B, the block 23 of data interleaved and transmitted by the transmitting station is composed of m [bit / word] × n [word]. 24 is an information bit, and 25 is an error correction code bit having an α-bit error correction capability. 26 is an interleaved data unit. The data interleaved by the transmitting station is a block having one word consisting of m bits as shown in block 23 and having a depth of n, and one block is completed by receiving m data units 26. This block 23 is shown in FIG.
As shown in (a), a plurality of pieces are continuously received. In the message receiving device, the actual data can be obtained by storing one block, deinterleaving it, and performing error correction for each word (m bits).

Next, the operation of this embodiment will be described with reference to the flow chart shown in FIG. First, the receiving unit 11 receives the synchronization signal 22 from the transmitting station, demodulates the received signal, and converts it into a data string (step 3).
1). The selection unit 12, which has obtained the data sequence of the synchronization signal 22 from the reception unit 11, calculates the bit error rate from the data sequence of the synchronization signal 22 (step 32).

When the bit error rate is expected to be high (step 33), the selection section 12 outputs the first selection signal 13 and selects the first decoding section 15 (step 3).
4). When a plurality of interleaved blocks make up one data, in order to reduce the influence of the operation of the first decoding unit 15 on the received signal, the receiving unit 11 receives all the signals and demodulates them. Then, until the conversion into the data string is completed (step 35), the decoding unit 15
Only the storage of the data string output by the receiving unit 11 in the buffer in the decoding unit 15 is performed. After receiving all the data strings from the receiving unit 11, the first decoding unit 15 performs processing such as deinterleaving, error correction, and address verification, and stores the decoded message in the memory of the decoding unit 15 (step 36).

When the bit error rate is expected to be low (step 33), the selection section 12 outputs the second selection signal 14 and selects the second decoding section 16 (step 3).
7). The second decoding unit 16 includes a data string storage area for two blocks shown in FIG. 4, that is, the first buffer 41 and the second buffer 41.
Buffer 42. When a plurality of interleaved blocks form one message, the second decoding unit 16 stores the k + 1th block in the second buffer 42 while the first buffer 41
Deinterleaving, error correction, address collation, etc. of the k-th block stored in are carried out, and the message is stored in the decoding unit memory. The result of the address collation is fed back to the receiving unit 11, and when the address unique to the message receiving device does not exist, the operation of the receiving unit 11 is stopped so that the power consumption can be suppressed. When the decoding process of the kth block stored in the first buffer 41 is completed and the storage of the k + 1th block stored in the second buffer 42 is completed, the second decoding unit 16 , The decoding process of the k + 1th block stored in the second buffer 42 is started, and at the same time, the k + 2nd block from the receiving unit 11 is stored in the first buffer 41 (step 38). In this way, the second decoding unit 16 deinterleaves,
In parallel with performing error correction, address verification, and message storage, the next data string is received from the receiving unit 11 and stored. Therefore, since the second decoding unit 16 processes only the necessary data string, the operation time of the receiving unit is shortened compared to the first decoding unit 15, and the power consumption can be reduced. The message stored by the decoding process of the first decoding unit 15 or the second decoding unit 16 is
It is displayed on the display unit 17 (step 39).

In this embodiment, the bit error rate of the synchronizing signal is calculated as the selection criterion of the selecting unit 12, but the bit error rate of the newest received signal before receiving the synchronizing signal is calculated or It can be easily inferred that the same effect can be obtained by deciding which decoding unit to use by directly measuring the strength of the received electric field with an electric field strength sensor or the like.

[0015]

As described above, according to the present invention, the first decoding unit performs the decoding process after the receiving operation of the receiving unit is completed, and the second decoding unit performs the decoding process simultaneously with the receiving operation of the receiving unit. And a selection unit for selecting which of the first decoding unit and the second decoding unit to perform decoding according to the bit error rate of the synchronization signal obtained from the receiving unit, so that a plurality of decodings can be performed depending on the bit error rate. It is possible to select one of the units and selectively use the contradictory performance items of reduction of bit error rate and low power consumption.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a message receiving device according to an embodiment of the present invention.

FIG. 2A is a format diagram of a signal transmitted from a transmitting station in the embodiment. FIG. 2B is a schematic diagram showing one block of data interleaved by the transmitting station.

FIG. 3 is a flowchart showing the operation of the message receiving device in the embodiment.

FIG. 4 is a schematic diagram showing a data string storage area for two blocks of the second decoding unit in the embodiment.

FIG. 5 is a block diagram showing a configuration of a conventional message receiving device.

[Explanation of symbols]

 11 receiving unit 12 selecting unit 13 first selecting signal 14 second selecting signal 15 first decoding unit 16 second decoding unit 17 display unit 18 data string of synchronization signal 19 data string of block 21 transmitted from transmitting station Signal 22 synchronization signal 23 block of data to be interleaved 24 information bit 25 error correction code bit 26 interleaved data unit 41 first buffer 42 second buffer 51 receiving section 52 decoding section 53 display section

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Takashi Hamada Inventor Takashi Hamada 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (3)

[Claims] 1. A receiving unit that receives a signal transmitted from a transmitting station, demodulates it, and converts it into a data string, and stores a data string output from the receiving unit when the receiving unit is operating. A first decoding unit that performs only the processing and performs the decoding process after the receiving operation of the receiving unit is completed, and a second decoding unit that simultaneously performs the storage process and the decoding process of the data string output from the receiving unit. And a selection unit for selecting which of the first decoding unit and the second decoding unit performs decoding, and a display unit for displaying the decoding result, and the bit of the data string output from the reception unit. A message characterized by selecting the first decoding unit by the selecting unit when the error rate is expected to be high, and selecting the second decoding unit by the selecting unit when the bit error rate is expected to be low. Receiver. 2. The selecting unit selects which of the first decoding unit and the second decoding unit performs decoding according to the bit error rate of the data sequence of the synchronization signal obtained from the receiving unit. The message receiving device according to claim 1. 3. The message according to claim 1, wherein the selection unit selects which of the first decoding unit and the second decoding unit performs decoding by the device for measuring the strength of the received electric field. Receiver.