JPH0934935A - Design method for semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the design method of a semiconductor integrated circuit, which can easily execute design by using a DA tool available in the market on EWS and can execute almost simulation on the EWS. SOLUTION: Function modules 2, 3, 4,... connected to an arbitrary logic circuit 1 which can arbitrarily be designed are mentioned in function operation levels for the respective modules and they are made into a library. A user and the like mentions the arbitrary logic circuit 1 in a logic gate level on EWS and designs it and selects the required function module from the library. Almost simulation is executed with the function modules 2, 3 and 4 being mentioned in a function operation level as they are for a whole circuit where the arbitrary logic circuit 1 in the logic gate level is connected with the function moduels 2, 3 and 4 in the function operation level. Thus, custom LSI can easily be designed and evaluated and a developing period can be shortened.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit design technique and a technique particularly effective when applied to a custom LSI design. For example, it is possible to combine a user-designed arbitrary logic circuit with other functional circuits. The present invention relates to a technique useful for designing and evaluating operation (simulation).

[0002]

2. Description of the Related Art Conventionally, in designing a custom LSI, as shown in FIG. 2 (A), a user has a computer system (hereinafter referred to as E
It is called WS. EWS: Engineering workstation) and commercially available design automation program (hereinafter DA)
It is called a tool. ) Is used to design the specification of the custom LSI (step S1) and the user independently designs an arbitrary logic circuit (for example, a user logic circuit) having an arbitrary logic function according to the purpose of use (step S2). Simulation is performed on an arbitrary logic circuit (step S
3) Thereafter, an entire circuit diagram in which an arbitrary logic circuit and a circuit having a predetermined logic function, which has been already designed and evaluated, such as an A / D converter (hereinafter referred to as a functional module), is combined, is shown. It was created (step S4).

Based on the whole circuit diagram created, the user uses a dedicated simulator on a large-scale computer owned by the manufacturer to perform a simulation (step) on an arbitrary logic circuit in a state of being combined with other functional modules. S5), simulation of the entire circuit (step S6), verification of operation timing (step S7)
And failure simulation was performed (step S8), and the logic verification was ended. Here, as shown in FIG. 4, a large-scale computer is used because one or more functional modules coupled to the arbitrary logic circuit 1 (in FIG.
(Central processing unit) Module 2, Timer module 3,
The serial module 4 is shown. ) Is described at the logic gate level like a NAND gate and a NOR gate. Therefore, if the above various simulations are performed on the EWS owned by the user after designing the entire circuit, the simulation speed is slow and This is because the development period of the LSI will be extended.

[0004]

However, after the whole circuit drawing is created, the user uses his or her own EWS and a large-sized computer having a different usability to combine the functional blocks with other functional modules. Since many different simulations must be performed including simulation for an arbitrary logic circuit, simulation for the entire circuit, verification of operation timing, and failure simulation, (1) it takes a lot of time (for example, about 3 months) to complete the logic verification. Wasted, (2) There are too many items to learn for using a large computer, and users hesitate to design a custom LSI.
There was a problem.

The present invention has been made in view of the above circumstances, and provides a method for designing a semiconductor integrated circuit which can be easily designed by using a commercially available DA tool on the EWS and can perform most simulations on the EWS. Its main purpose is to provide.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0007]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, a functional module coupled to an arbitrarily designable arbitrary logic circuit is described for each module at the functional operation level and made into a library, and a user or the like describes the arbitrary logic circuit at the logic gate level. After designing, a functional module to be connected to the arbitrary logic circuit is selected from the library. Then, for a circuit in which an arbitrary logic circuit and a functional module are combined, a simulation is performed while the functional module is described at the functional operation level.

The function module may be selected by selecting the corresponding function module from the list of function module names displayed on the display device of the circuit designing computer such as EWS. In addition, the above simulation
It may be performed on the EWS used for selecting the functional module.

[0010]

According to the above-mentioned means, since the functional module is described in the functional operation level, for example, the user does not have to use a large-scale computer, and the EW owned by the user himself / herself.
After designing and simulating an arbitrary logic circuit on S, most of the design and simulation of the whole circuit in which the arbitrary logic circuit and the functional module are combined can be performed on the EWS.
The custom LSI can be easily designed and evaluated, and the development period can be shortened.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a schematic diagram of an entire circuit diagram of a standard cell type custom LSI chip designed according to the present invention, and FIG. 2 shows a custom LSI design according to the present invention. The steps are shown.

As shown in FIG. 1, in the overall circuit diagram, an arbitrary logic circuit 1 such as a user logic unit that can be arbitrarily designed is expressed at a logic gate level. The other functional modules coupled to the arbitrary logic circuit 1, for example, the CPU module 2, the timer module 3 and the serial module 4 are described as simple blocks, for example. This is because the functional modules such as the CPU module 2, the timer module 3 and the serial module 4 are described at the functional operation level instead of the logic gate level. The respective functional modules are grouped into modules having modules having the same function to form a library.

When designing a custom LSI, a user (customer orderer of the custom LSI) or the like designs system specifications on the EWS as shown in FIG. 2 (step S1).
After finishing the design of the arbitrary logic circuit 1 (step S2), the simulation of the arbitrary logic circuit 1 is performed (step S3). Thereafter, the user or the like utilizes the library of the functional modules on the EWS to create an overall circuit diagram in which the arbitrary logic circuit 1 and other functional modules are combined (step S4).

Each functional module has information on the types and number of input / output signal lines prepared, and information such as signals output with respect to input signals and output timings thereof. Therefore, the user, etc., at step S4
When designing the entire circuit on the WS, it suffices to select a module having a desired function from the library without being aware of the actual logic gate level circuit configuration.

The simulation for the arbitrary logic circuit 1 in the whole circuit (step S5), the simulation for the whole whole circuit (step S6), and the verification of the operation timing for the whole circuit, which are executed after designing the whole circuit, are performed by each function. The module is described in the functional operation level. Therefore, the simulation of steps S5 to S7 for the entire circuit can be performed on the EWS. Those steps S5-
The simulation up to S7 has been conventionally performed on a large-scale computer (see FIG. 2 (A)).

In the design method of the present invention, only the failure simulation in step S8 is performed on a large-scale computer (often owned by the manufacturer) as in the conventional case. In this failure simulation stage, each selected functional module is converted from the functional operation level to the logic gate level. The manufacturer has detailed circuit diagram information at the logic gate level of each functional module. A user is provided with a library of functional modules described at the functional operation level by the manufacturer.

FIG. 3 shows an example of the selection screen of the functional module displayed on the screen of the display device of the EWS when the whole circuit diagram is created in step S4.

In the designing method of the present invention, FIG.
As shown in, the names of the functional module groups that can be selected are displayed in a list on the display device. A designer such as a user selects a required function module group from the list by using a pointing device or the like which is an input device of the EWS. In the example of FIG. 3A, the CPU module 2, the timer module 3, the serial module 4, and the A / D converter module 5 are selected, and the D / A converter module 6, the DMA controller module 7, and the RE are selected.
F (refresh) controller module 8, RAM
Module 9, ROM module 10 and I / O port module 11 are not selected.

For each selected functional module,
You can make more detailed selections and settings. For example, as shown in FIG. 3B, on the selection screen of the timer module 3, [Integrated timer] 3A, [Free running timer A] 3B, and [Free running timer B] 3C are displayed in a list, and the serial module 4 is also displayed. The [1 channel] 4A and [2 channel] 4B are displayed in a list on the selection screen, and a required timer module or serial module can be appropriately selected from them.

According to the above-described embodiment, the functional modules coupled to the arbitrary logic circuit are described for each module at the functional operation level and made into a library, and the user or the like describes the arbitrary logic circuit 1 at the logic gate level. After designing, the functional modules connected to the arbitrary logic circuit 1 are selected from the library, and the functional modules 2, 3 are connected to the circuit in which the arbitrary logic circuit 1 and the functional modules 2, 3, 4 are combined. , 4 are described while being described at the functional operation level, the user, for example, designs the arbitrary logic circuit 1 on his own EWS without using a large-scale computer, and then Most of the design and simulation of the whole circuit which combined the arbitrary logic circuit 1 and the functional module on EWS Can be performed, it can be shortened development time with the design and evaluation of custom LSI is facilitated. For example, to develop a custom LSI,
Conventionally, it took about 3 months, but according to the designing method of the above-mentioned embodiment, it can be shortened to about 10 days.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the types of function modules that can be selected are not limited to those listed in the above embodiment. Further, in FIG. 1, each functional module 2, 3, 4 is shown as a block, but it may be represented by a symbol or the like that symbolizes the function of each functional module.

Furthermore, the present invention can be applied to the design of an envelope array in which the functional blocks are preliminarily formed on the base chip of the gate array.

In the above description, the invention which was mainly made by the present inventor is an application field which is the background of the invention.
However, the present invention is not limited to this, and can be used for a simulation for a wiring board having a plurality of LSI chips mounted thereon.

[0025]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, since it is possible to design the entire circuit in which the arbitrary logic circuit and the functional module are combined and perform most of the simulation for the entire circuit without using a large-scale computer, it is easy to design and evaluate the custom LSI. As a result, the development period can be shortened.

[Brief description of drawings]

FIG. 1 is a schematic diagram of an example of an overall circuit diagram of a custom LSI chip designed by applying the present invention.

FIG. 2 is a flowchart showing an example of a custom LSI design procedure to which the present invention is applied, in comparison with a conventional example.

FIG. 3 is a schematic diagram showing an example of a function module selection screen.

FIG. 4 is a schematic diagram of an entire circuit drawing of a custom LSI chip designed by a conventional method.

[Explanation of symbols]

 1 Optional Logic Circuit (User Logic Circuit) 2 CPU Module (Functional Module) 3 Timer Module (Functional Module) 4 Serial Module (Functional Module) 5 A / D Converter Module (Functional Module) 6 D / A Converter Module (Functional Module) 7 DMA controller module (functional module) 8 REF controller module (functional module) 9 RAM module (functional module) 10 ROM module (functional module) 11 I / O port module (functional module)

Claims (5)

[Claims] 1. When designing a semiconductor integrated circuit in which one or more circuits having a predetermined logic function, which have been designed and evaluated, and an arbitrary logic circuit having a desired logic function are combined, A circuit having a predetermined logical function that has been evaluated is prepared as a functional module described at a functional operation level, and a part or all of an arbitrary logic circuit having a predetermined logical function is newly designed,
A semiconductor integrated circuit characterized in that the whole is described at a logic gate level, and an arbitrary logic circuit at the logic gate level and a functional module at the functional operation level are combined to perform simulation on the circuit. Design method. 2. The semiconductor integrated circuit according to claim 1, wherein the functional modules are made into a library, and functional modules connected to the arbitrary logic circuit are selected from the functional module library. Circuit design method. 3. The method for designing a semiconductor integrated circuit according to claim 2, wherein the module library is classified into a plurality of module groups which are a group of functional modules having equivalent functions. 4. A required functional module is selected from an input device of the computer from a list of module names corresponding to each functional module displayed on a display device of the computer for circuit design. The method for designing a semiconductor integrated circuit according to claim 1. 5. A simulation for a circuit in which an arbitrary logic circuit at the logic gate level and a functional module at the functional operation level are combined is performed on the circuit design computer. A method for designing a semiconductor integrated circuit as described above.