JPH09322560A - Drive circuit of capacitive load - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drive circuit of a capacitative load with improved power efficiency. SOLUTION: A capacitor 5 that is connected to electrodes at charging and discharging sides of an EL element 1 via a switching circuit 4 is provided, one portion of charging electric charge is transferred to the capacitor 5 when discharging the EL element 1, and remaining charging electric charge is discharged. Then, after the electric charge that is transferred to the capacitor 5 is returned to the EL element 1, charging is initiated, thus utilizing one portion of the electric charge that is charged to the EL element 1 again. A power efficiency can be improved by the reutilization amount.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a drive circuit for a capacitive load.

[0002]

2. Description of the Related Art At present, as a drive circuit for a capacitive load such as an EL element, there is one shown in FIG. For example, a series circuit in which an EL element 91, a diode 92 and an inductor 93 are connected in series is connected between the ground terminal VSS and the battery anode VDD, and the connection point between the diode 92 and the inductor 93 and the ground terminal VSS are connected. A transistor 94 is connected in between, and a series circuit formed by connecting a Zener diode 95 and a transistor 96 in series is connected between the connection point between the diode 92 and the EL element 91 and the ground terminal. The operation is as follows. First,
The transistor 96 is turned off, the control circuit 97 sets the terminal A9 to "H" at the timing t0 shown in FIG. 10, and the pulse generation circuit 98 causes the drive pulse to be generated. The drive pulse turns on and off the transistor 94, and counter electromotive force is generated in the inductor 93. This counter electromotive force is applied as a drive voltage to the EL element 91 via the diode 92. Here, the potential of the electrode on the diode side of the EL element 91 is shown with reference to the potential of the ground terminal VSS as shown in FIG. 10B9, and the EL element 91 is gradually charged. At a predetermined timing t1, that is, E
When the voltage between the electrodes of the L element reaches a predetermined value, the control circuit 97
Turns the transistors 94 and 96 off and on, respectively, by setting the terminal A9 to "L" and the terminal C9 to "H". As a result, the electric charge of the EL element 91 is discharged through the Zener diode 95 and the transistor 96. The EL element 91 is driven by repeatedly performing a series of charging and discharging operations shown at timings t0 to t2 in FIG.

[0003]

However, in the above-mentioned one, the electric charge efficiency of the EL element 91 was poor because all the electric charges charged in the EL element 91 were discarded at the time of discharging.

[0004]

Therefore, a capacitive element such as an EL element for charging and discharging a capacitive load is provided with a capacitive element connected through a switching means to an electrode on the discharge side, so that when the capacitive load is discharged, a charged charge is discharged. After transferring a part of the charge to the capacitive element, discharging the remaining charge, returning the charge transferred to the capacitive element to the EL element, and then starting charging, recharging some of the charged charge of the capacitive load. To use. This reuse improves power efficiency.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION One electrode of a capacitive load having opposing electrodes is connected to an output terminal of a drive voltage generating circuit and the other electrode is connected to a first power supply terminal side, and the one electrode and the first electrode are connected to each other. A driving circuit for a capacitive load for driving the capacitive load by providing a first switching means for discharging between the power supply terminals, and repeating charging between electrodes by a driving voltage and discharging by the first switching means. In, a series circuit including a second switching means and a capacitive element is connected between the one electrode and the first power supply terminal, and a drive voltage is generated from the drive voltage generation circuit in the first period. The capacitive load is charged until the inter-electrode voltage reaches a predetermined voltage value, and then the second switching means is turned on in the second period to charge the capacitive element with the charge of the capacitive load, To the third Second to discharge the charged electric charge of the capacitive load of the first switching means as on while turning off the switching means between, then the fourth period of 1
And a control circuit for repeatedly executing a series of operations for turning off the second switching means and turning on the second switching means to charge the capacitive load with the charge of the capacitive element and then turning off the second switching means. Set up.

The capacitive load is preferably an EL element.

Further, a switching means is provided between the output terminal of the drive voltage generating circuit and the first power supply terminal for switching and connecting each electrode of the capacitive load to each other, and the switching means for connecting the capacitive load once is provided. Each time the charging / discharging operation is completed, the above electrodes are alternately switched and connected, and an AC voltage is applied.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A capacitive load drive circuit according to a first embodiment of the present invention will be described. In this example, an EL element is used as the capacitive load.

First, the configuration of this example will be described with reference to FIG. In the figure, 1 is E as a capacitive load.
Reference numeral 2 is an L element, and 2 is a drive voltage generating circuit. The EL element 1 has one electrode connected to the output of the drive voltage generation circuit 2 and the other electrode connected to the power supply terminal VSS. Here, the drive voltage generating circuit 2 has one terminal connected to the power supply terminal V
The inductor 21 connected to the DD and the other terminal thereof connected to the diode 20, and the N provided between the connection point between the diode 20 and the inductor 21 and the power supply terminal VSS.
PN structure transistor 22 and this transistor 22
And a pulse generation circuit 23 for driving. Then, the pulse generation circuit 23 generates a drive pulse according to a control output of a control circuit described later, thereby turning on / off the transistor 22 to generate a counter electromotive force in the inductor 21,
A half-wave drive voltage is output from the diode 20.

3 is an NP as a first switching means
It is an N-structured transistor, the collector of which is connected to the one electrode of the EL element 1 through the Zener diode ZD, and the emitter of which is connected to the power supply terminal VSS.

Reference numeral 4 is a switching circuit as a second switching means, 5 is a capacitor as a capacitive element, and these form a series circuit 6. Here, the switching circuit 4 is provided between one electrode of the EL element 1 and one terminal of the capacitor 5 and controls conduction between them. The other terminal of the capacitor 5 is the power supply terminal VSS
It is connected to the.

Reference numeral 7 denotes a control circuit, which controls the drive circuit of the capacitive load of this example.

Next, the operation of this example will be described. First, the operation principle of this example will be described with reference to the explanatory view of FIG. 2A, B, C and D, the switch sw1,
The sw2, the EL element e, and the capacitor c are respectively the transistor 3, the switching circuit 4, and the EL element 1 in FIG.
And the capacitor 5. In addition, the arrow in FIG. 2 indicates the moving direction of the charges. First, the EL element e is charged to a predetermined voltage value by a power source (not shown), and then the switch sw2 is turned on (FIG. 2A). Where switch sw
The predetermined voltage value when 2 is turned on is v1 (100
v), if the capacity of the EL element e is el (25nF) and the capacity of the capacitor c is cr (25nF), then EL
The electric charge q1 charged in the element 1 is q1 = el × v1 =
It is 2.5 μC. When the transfer of the charge from the EL element e to the capacitor c is completed, the charge q2 charged in the capacitor c is q2 = q1 × cr / (el + cr) = 1.25.
It becomes μC. The voltage v2 between the electrodes of the EL element e here is v2 = q2 / el = 50V. Next, the switch sw2 is turned off and the switch sw1 is turned on (FIG. 2B), the remaining charges of the EL element e are discharged, and the voltage between the electrodes of the EL element e changes from v2 = 50V to 0V. . When the voltage between the electrodes of the EL element e becomes 0 V and the switch sw1 is turned off and the switch sw2 is turned on, the EL element e is charged by the electric charge q2 charged in the capacitor c (FIG. 2C). When the charge from the capacitor c is completed, the charge q3 charged in the EL element e is q
3 = q2 × el / (el + cr) = 0.625 μC, and the voltage value v3 between the electrodes of the EL element e at this time is v
3 = q3 / el = 25v is reached. At this time, the switch sw2 is turned off, and charging of the EL element e is started by a power source (not shown) (FIG. 2D). At this time, the voltage value v3 between the electrodes of the EL element e is used as an offset voltage, and the EL element e is charged from this voltage value. FIG.
The EL element e emits light by repeating the above-described operations shown in A, B, C and D. In this series of operations, when the EL element e is discharged, a part of the electric charge is recovered by the capacitor c and is reused when the EL element e is charged next. Further, even when the electric charge is supplied from the capacitor c to the EL element e, the electric charge of the capacitor c is
Not all of them are used, but some remain, and they are accumulated by repeating the reuse operation. Therefore, the offset voltage rises according to the number of reuses. The relationship between the increase in the offset voltage and the number of reuses is as shown in FIG. In the figure, the capacitance of the EL element is 2
5nF, peak voltage value between electrodes of EL element e is 100V
, The capacitance of the capacitor is 25 nF, 50 nF, 0.
The relationship between the increase in offset voltage and the number of reuses is shown for 1 μF and 0.5 μF. Although it depends on the capacitance ratio between the EL element e and the capacitor c, the offset voltage is E
It is possible to obtain up to 50% of the peak voltage value between the electrodes of the L element e.

Next, a specific operation of the drive circuit for the capacitive load of this embodiment shown in FIG. 1 will be described with reference to the waveform chart of FIG.

First, in the initial state, the drive voltage generating circuit 2
Has stopped the generation of the drive voltage, the transistor 3 and the switching circuit 4 are off, and there is no offset voltage. Here, when the control circuit 7 sets the signal at the terminal A to "H" at the timing t0 shown in the waveform diagram of FIG. 4, the drive voltage generation circuit 2 starts its operation. That is, the pulse generation circuit 23 starts generating a pulse, and the pulse turns on and off the transistor 22 to generate a counter electromotive voltage in the inductor 21. This counter electromotive voltage is supplied as a drive voltage via the diode 20. Is output. The EL element 1 is charged by receiving the drive voltage from the drive voltage generation circuit 2, and the potential of one electrode of the EL element 1 gradually increases with reference to the power supply terminal VSS as shown in FIG. 4B.

Next, the control circuit 7 sets the signal at the terminal A to "L" at a predetermined timing t1 when it is considered that the voltage between the electrodes of the EL element 1 has reached a predetermined value, for example, 100V. When the signal at the terminal A becomes "L", the drive voltage generating circuit 2
Stops operation. At the same time, the control circuit 7 has the terminal C
Is set to “H”. Upon receiving this, the switching circuit 4 is turned on, and one electrode of the EL element 1 is connected to the capacitor 5. As a result, some of the charges charged in the EL element 1 move to the capacitor 5. That is, the charge charged in the EL element 1 is recovered by the capacitor 5 while being apparently discharged. Next, the control circuit 7 sets the terminal C to "L" at a predetermined timing t2 when it is considered that the charge transfer from the EL element 1 to the capacitor 5 is completed. As a result, the switching circuit 4 is turned off and E
The connection between one electrode of the L element 1 and the capacitor 5 is cut off. Here, the control circuit 7 turns off the switching circuit 4 and sets the terminal D to "H" to make the transistor 3
Is turned on. As a result, the remaining charges of the EL element 1 are discharged to the power supply terminal VSS via the Zener diode ZD and the transistor 3.

Next, at timing t3, the terminal D is set to "L" to turn off the transistor 3 and the terminal C is set to "H" to turn on the switching circuit 4.
As a result, the EL element 1 is charged by the charge of the capacitor 5.
Is charged.

Next, at timing t4, the transfer of the electric charge from the capacitor 5 to the EL element 1 is completed, and the EL element 1
When the voltage value between the electrodes of the control circuit 7 reaches the offset voltage, the control circuit 7 sets the terminal C to "L" and the terminal A to "H".
As a result, the operation of the drive voltage generating circuit is started. Where E
The L element 1 is charged from the offset voltage.

After that, the EL element 1 is driven by repeating the operation from the timing t0 to t4.

Now, the movement of charges in the EL element 1 and the capacitor 5 at each timing will be described.

From timing t0 to t1, the voltage VEL between the electrodes of the EL element 1 is approximately given by VEL = √ (2 × (N × El + EEL) / EL). Here, N is the number of times the transistor 22 is turned on.

Further, El is the energy due to the excitation of the inductor 21, and is given by El = (L × i ² ) / 2. Here, L is the inductance of the inductor 21, and i is the value of the current flowing through the inductor 21. The current value i is given by i = ton × Vdd / L (ton is the ON time of the transistor 22 once, and Vdd is the voltage between the power supply terminals VDD and VSS). EL is the capacitance of the EL element 1, and E
EL is energy corresponding to the offset voltage. The initial value of the energy for this offset voltage is zero. here,
As described above, the intermittent driving of the transistor 22 causes an induced voltage in the inductor 21 to gradually increase the voltage between the electrodes of the EL element 1.

The charge QEL accumulated in the EL element 1 between the timings t0 and t1 becomes QEL = VEL × EL, and a part thereof is collected in the capacitor 5 between the timings t1 and t2. The charge QCR of the capacitor 5 after this recovery is given by: QCR = (QEL + QCR ') * CR / (EL + CR). Here, CR is the capacity of the capacitor 5, and QCR 'is the charge stored in the capacitor 5 before the collection. The initial value of this charge QCR 'is 0.

Next, at timings t2 to t3, E
The remaining electric charge of the L element 1 is discharged, and the voltage VEL becomes 0V.
Becomes

At the next timings t3 to t4, a part of the electric charge of the capacitor 5 is reused to charge the EL element 1. During this time, the charge QEL stored in the EL element 1 becomes QEL = QCR × EL / (EL + CR). The voltage VEL applied to the EL element 1 at the timing t4 is given by VEL = QEL / (EL). VEL at this time becomes the offset voltage at the time of the next boosting. Here, the energy EEL stored in the EL element 1 is given by ^{EEL = EL × VEL 2/2} . After that, the operations at timings t0 to t4 are repeated.

Now, in order to show the effect of charge recycle, the case where the capacitor 5 is used as a conventional capacitive load drive circuit and the case where the capacitive load drive circuit of this example is operated as described above are used. The voltage waveforms between the electrodes of the EL element 1 obtained by simulation using the above approximate expression under the following common conditions are shown in FIG.
Shown in A and B. Here, as a common condition, Vdd = 1.
5V, N = 13 times, L = 2.2mH, ton = 120μ
Give S, EL = 25 nF and CR = 0.5 μF. As shown in the figure, Vp of the voltage between the electrodes of the EL element 1 when the capacitor 5 is used is compared to when the capacitor 5 is not used.
-P (peak TO peak) improves. In the case shown in the same figure, V when the capacitor is not used and when it is used
p-p is 84.32V and 98.87V, respectively.
That is, when the capacitor 5 is used, Vp-p can be improved by about 17% with the same current consumption. In this way, in this example, Vp-p is improved as compared with the conventional one,
Further, if the same Vp-p as the conventional one is obtained, the current consumption can be reduced. That is, this example can achieve higher power efficiency than the conventional one.

The present invention is not limited to the configuration of the above-described embodiment, but the following drive circuit for a capacitive load can be configured, and the second embodiment will be described below.

First, the configuration of the second embodiment will be described with reference to FIG. In the figure, the same reference numerals as those shown in FIG. 1 denote the same components as those in FIG.
In the figure, 8 to 11 are switching circuits, and these switching circuits 8 to 11 form a switching means, and the electrodes of the EL element 1 can be switched and connected to each other between the drive voltage generation circuit 2 and the power supply terminal VSS. To do.

A control circuit 12 controls the drive circuit of the capacitive load according to another embodiment.

Next, the operation of this embodiment will be described with reference to the waveform chart of FIG.

First, in the initial state, the drive voltage generating circuit 2
Has stopped generating drive voltage, transistor 3 is off, switching circuit 4 is off,
There is no offset voltage. Further, the switching circuits 8 and 9 are turned on and the switching circuits 10 and 11 are turned off, whereby the electrode B of the EL element 1 is connected to the output of the drive voltage generation circuit 2 and the electrode I is connected to the power supply terminal VS.
Connected to S.

Here, when the control circuit 12 sets the signal at the terminal A to "H" at the timing t0 shown in the waveform diagram of FIG. 7, the drive voltage generating circuit 2 starts its operation. The EL element 1 is charged by receiving the drive voltage from the drive voltage generation circuit 2,
The potential of the electrode B of the EL element 1 gradually increases with reference to the power supply terminal VSS as shown in FIG. 7B.

Next, the control circuit 12 sets the signal at the terminal A to "L" at a predetermined timing t1 when it is considered that the voltage between the electrodes of the EL element 1 has reached a predetermined value, for example, 100V. When the signal at the terminal A becomes "L", the drive voltage generation circuit 2 stops its operation. At the same time, the control circuit 12 sets the terminal C to "H". Switching circuit 4 which received this
Turns on and connects the electrode B of the EL element 1 to the capacitor 5. As a result, some of the charges charged in the EL element 1 move to the capacitor 5. Next, at a predetermined timing t2 when it is considered that the charge transfer from the EL element 1 to the capacitor 5 is completed, the control circuit 12 sets the terminal C to "L".
And As a result, the switching circuit 4 is turned off, and the connection between the electrode B of the EL element 1 and the capacitor 5 is cut off. Here, the control circuit 12 turns off the switching circuit 4 and turns the terminal 3 to "H" to turn on the transistor 3. As a result, the remaining charges of the EL element 1 are discharged to the power supply terminal VSS via the Zener diode ZD and the transistor 3. Next, at timing t3, the control circuit 12 sets the terminal D to "L" to turn off the transistor 3. At the same time, the terminals E and F are switched from "H" to "L" to turn off the switching circuits 8 and 9, while the terminals G and H are switched from "L" to "H" and the switching circuits 10 and 11 are turned on. And As a result, the electrodes of the EL element 1 connected between the drive voltage generation circuit 2 and the power supply terminal VSS are switched. That is,
The electrode I is connected to the output of the drive voltage generating circuit 2, and the electrode B
Will be connected to the power supply terminal VSS. Further, the terminal C is set to "H" to turn on the switching circuit 4. As a result, the EL element 1 is charged by the charge of the capacitor 5. Here, the potential of the electrode I rises to a potential corresponding to the offset voltage with reference to the power supply terminal VSS, and the potential of the electrode B falls correspondingly to the reference potential as shown in FIG. 7B.

Next, at timing t4, the transfer of the electric charge from the capacitor 5 to the EL element 1 is completed, and the EL element 1
When the voltage value between the electrodes of the control circuit 7 reaches the offset voltage, the control circuit 7 sets the terminal C to "L" and the terminal A to "H".
As a result, the operation of the drive voltage generating circuit is started. Where E
The charging of the L element 1 is started from the offset voltage. That is, the potential of the electrode I rises from the potential of the offset voltage based on the power supply terminal VSS, and the potential of the electrode B falls by that amount as seen from the reference potential as shown in FIG. 7B. Next, at timing t5, the control circuit 12 sets the signal at the terminal A to "L", and the drive voltage generation circuit 2 stops its operation. At the same time, the control circuit 12 sets the terminal C to "H" to turn on the switching circuit 4, and the electrode I of the EL element 1 is turned on.
Is connected to the capacitor 5. As a result, some of the charges charged in the EL element 1 move to the capacitor 5.
Next, at a predetermined timing t6 when it is considered that the charge transfer from the EL element 1 to the capacitor 5 is completed, the control circuit 1
2, the terminal C is set to "L" and the switching circuit 4 is turned off, whereby the connection between the electrode I of the EL element 1 and the capacitor 5 is cut off. At the same time, the control circuit 12 sets the terminal D to “H” to turn on the transistor 3, and the remaining charge of the EL element 1 is discharged to the power supply terminal VSS via the Zener diode ZD and the transistor 3.

Next, at timing t7, the control circuit 12
Turns terminal D to "L" to turn off transistor 3.
At the same time, the terminals G and H are switched from "H" to "L" to turn off the switching circuits 10 and 11, while the terminals E and F are switched from "L" to "H" and the switching circuits 8 and 9 are turned on. And As a result, the electrodes of the EL element 1 connected between the drive voltage generation circuit 2 and the power supply terminal VSS are switched. That is, the electrode B is connected to the output of the drive voltage generating circuit 2, and the electrode I is connected to the power supply terminal VSS. Further, the terminal C is set to "H" to turn on the switching circuit 4, and the EL element 1 is charged by the charge stored in the capacitor 5. Here, the power supply terminal VS
The potential of the electrode B increases by the offset voltage with S as a reference.

After that, the EL element 1 is driven by being charged and discharged from the bipolar electrode by repeating the operations at the timings t0 to t7 in FIG.

Now, in order to show the effect of charge recycle similarly to the case described in the first embodiment, the case of operating without using the capacitor 5 in the case of the second embodiment and the case described above. 8A and 8B show the voltage waveforms between the electrodes of the EL element 1 in each of the cases of the above-mentioned common conditions under the above-mentioned common conditions. As shown in the figure, Vp-p of the voltage between the electrodes of the EL element 1 is improved when the capacitor 5 is used as compared to when the capacitor 5 is not used. Vp when a capacitor is not used and when it is used
-P becomes 177.72V and 205.30V, respectively. That is, when the capacitor 5 is used, Vp-p can be improved by about 16% with the same current consumption. As described above, even in the case of this example, Vp-p is improved as compared with the case where the capacitor 5 is not used, and if the same Vp-p is obtained, the current consumption can be reduced. That is, the present example also obtains the same effect as that of the above-mentioned one example.

Further, in each of the above-mentioned embodiments, the circuit configuration using the bipolar transistor as the first and second switching means is adopted, but the circuit configuration is not limited to these, and the circuit configuration using the MOS transistor as the first and second switching means. You can take

[0039]

According to the present invention, when a capacitive load such as an EL element is discharged, a part of the charged electric charge is transferred to the capacitive element and is reused when the next capacitive load is charged. It is possible to provide a drive circuit for a capacitive load in which the power efficiency is improved by the amount of this reuse.

[Brief description of drawings]

FIG. 1 is an explanatory diagram for explaining a configuration of an embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining the operation of FIG. 1;

FIG. 3 is an explanatory diagram for explaining the operation of FIG. 1;

FIG. 4 is a waveform chart for explaining the operation of FIG. 1;

FIG. 5 is a waveform chart for explaining the operation of FIG. 1;

FIG. 6 is an explanatory diagram illustrating a configuration of an embodiment of the present invention.

FIG. 7 is a waveform chart for explaining the operation of FIG. 6;

8 is a waveform diagram for explaining the operation of FIG.

FIG. 9 is an explanatory diagram illustrating a configuration of a conventional technique.

10 is a waveform diagram for explaining the operation of FIG.

[Explanation of symbols]

1 EL element (capacitive load) 2 Drive voltage generation circuit 3 Transistor (first switching means) 4 Switching circuit (second switching means) 5 Capacitor (capacitance element) 6 Series circuit 7 Control circuit 8-11 Switching circuit ( Switching means) 12 control circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshio Kimura 4-3-9 Taira, Sumida-ku, Tokyo Seiko Precision Co., Ltd.

Claims (3)

[Claims] 1. A capacitive load having opposing electrodes, one electrode of which is connected to an output terminal of a drive voltage generating circuit, and the other electrode of which is connected to a first power supply terminal side, and the one electrode and the first power supply. In a drive circuit of a capacitive load for driving the capacitive load by providing a first switching means for discharging between terminals and repeating charging between electrodes by a driving voltage and discharging by the first switching means, A series circuit including a second switching unit and a capacitive element is connected between the one electrode and the first power supply terminal, and a drive voltage is generated from the drive voltage generation circuit in the first period to generate the capacitance. The capacitive load is charged until the inter-electrode voltage reaches a predetermined voltage value, then the second switching means is turned on in the second period to charge the capacitive element by the charge of the capacitive load, and then the Period of 3 With turning off the second switching means charges the capacitive load to discharge the first switching means as on, then with the first switching means off the fourth period second
And a control circuit for repeatedly executing a series of operations for turning on the switching means and turning on the second switching means after charging the capacitive load with the charge of the capacitive element. Drive circuit. 2. The drive circuit for the capacitive load according to claim 1, wherein the capacitive load is an EL element. 3. A switching means is provided which can switch and connect each electrode of the capacitive load between the output terminal of the drive voltage generating circuit and the first power supply terminal. 2. The drive circuit for a capacitive load according to claim 1, wherein each of the electrodes is alternately switched to be connected and an alternating voltage is applied each time a charging / discharging operation is completed.