JPH09308288A - Dc motor driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize high torque and save power consumption of a DC motor while circuit cost is reduced. SOLUTION: This drive circuit comprises a plurality of transistor circuits 17 in which a high potential side field effect transistor and a low potential side field effect transistor are connected in series and a current is supplied to a stator coil 2 to drive a DC motor when one high potential side field effect transistor and the other low potential side field effect transistor are operated depending on input of a drive signal. In this case, the transistor circuit 17 is provided with a photocoupler 36 consisting of a capacitor 33 connected to the power supply line via a diode, a photodiode which becomes conductive when the drive signal is inputted and a phototransistor which supplies charges of the capacitor 33 to the high potential side field effect transistor when the photodioe becomes conductive and both field effect transistors are formed of n-channel type field effect transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for a DC motor, and more particularly to a drive circuit for a DC motor which supplies current to each stator coil of a DC motor having a plurality of stator coils.

[0002]

2. Description of the Related Art As a drive circuit for a DC motor of this type,
The one shown in FIG. 5 is known. Drive circuit 5 shown in FIG.
1 is a so-called three-phase DC brushless motor (not shown)
And a three transistor circuit 52a, 52b, 52c (hereinafter, referred to as "transistor circuit 52" when no distinction is made).
Each transistor circuit 52 has a drain connected to a power supply line and a source of a p-channel FET 61 that functions as a high-potential side FET (field effect transistor), and an n-channel type that has a source connected to ground and functions as a low-potential side FET. The drain of the FET 62 is connected in series. In addition, each transistor circuit 52
A resistor 63 connected between the drain and the gate of the FET 61, and a resistor 6 whose one end is connected to the gate of the FET 61.
4, a transistor 65 having a collector connected to the other end of the resistor 64 and an emitter connected to the ground, a resistor 66 connected to the base of the transistor 65, and a diode 68 for protecting the FETs 61 and 62 from back electromotive force. , 6
9 and 9.

Further, the FET 61 in each drive circuit 51
The other end of the stator coils 2U, 2V, 2W of the DC brushless motor, one end of which is commonly connected, is connectable to the connection point of the source of the above and the drain of the FET 62, respectively. Further, the transistor 65 of each drive circuit 51
A high-level signal (hereinafter referred to as "H signal") is supplied to the base of the FET and the gate of the FET 62 from a control unit not shown.
Drive signals S _D can be input, and the drive signals S _D are generated by the control unit based on a position detection signal for detecting the position of the stator which is detected by a Hall IC (not shown). .

In this drive circuit, the high-potential side FET 61 in any one of the transistor circuits 52 and the other
As a result of the low potential side FETs 62 of the two transistor circuits 52 operating simultaneously according to the input of the drive signal S _D , it is possible to energize any two stator coils at the same time. Specifically, for example, the FET 61 of the transistor circuit 52a and the transistor circuit 52b
The case where the FET 62 of the transistor operates will be described. The transistor 6 is connected via the resistor 66 of the transistor circuit 52a.
When the drive signal S _D is input to the base of the transistor 6, the transistor 65 operates, whereby the gate voltage of the FET 61 decreases, and the FET 61 operates.
On the other hand, when the drive signal S _D is input to the gate of the FET 62 of the transistor circuit 52b, the FET 62 operates. As a result, the stator coils 2U and 2U are connected via the drain and source of the FET 61 of the transistor circuit 52a.
A current is supplied to V, and the current is supplied to the transistor circuit 5
It flows into the ground via the drain and the source of the FET 62 of 2b. As a result, the DC motor is rotationally controlled in a predetermined direction. Next, the stator coils 2W, 2
The direct current motor is continuously rotated in a predetermined direction by supplying a current to V and thereafter simultaneously supplying current to the two stator coils in a predetermined order.

[0005]

However, the conventional drive circuit 51 has the following problems. That is, the first
In addition, p-channel FETs are generally expensive. For this reason, when the drive circuit 51 is incorporated in a consumer appliance such as a water heater, the cost of the drive circuit 51 occupies a large proportion of the total cost of the appliance, and an urgent cost reduction is desired. Secondly, there is no problem when the power supply voltage supplied to the stator coils 2U, 2V, 2W is about 60V, but it can be obtained by full-wave rectifying the commercial power supply in order to meet the demand for higher torque of the DC motor. A problem arises when the power supply voltage is about 140 V or higher. That is, in such a case, the FET 61 connected to the power supply side is required to have high withstand voltage and large current performance. However, in general, p-channel FETs with high withstand voltage and large current specifications are not commercially available, and it is necessary to wait for the development of semiconductor manufacturers. Third
In general, the p-channel FET has a large on-resistance and therefore has a problem of large power loss.

The present invention has been made to solve the above problems, and it is an object of the present invention to provide a drive circuit of a DC motor which can achieve high torque and power saving of the DC motor while reducing the cost of the circuit. To aim.

[0007]

In order to achieve the above object, in the drive circuit for a direct current motor according to claim 1, the source and the source of the high potential side field effect transistor whose drain is connected to the power supply line are connected to the low potential line. A plurality of sets of transistor circuits configured by connecting the drains of the connected low potential side field effect transistors in series are provided, and the other end of each of the stator coils having the same number of sets and one end of which is commonly connected, Each of the sets is configured to be connectable to a connection point between the source and the drain, and the high potential side field effect transistor in any one of the sets operates according to the input of the first drive signal, and the input of the second drive signal. When the low-side field-effect transistor in one of the other sets operates in accordance with In two drive circuit for a DC motor for driving the DC motor by the stator coil through the high-potential-side field effect transistor to supply a current from the power supply lines are, each transistor circuit,
A capacitor whose one end is connected to the power supply line through at least the diode and the other end is connected to the connection point, a photodiode that is conducted when the first drive signal is input, and a photodiode that is conducted And a photocoupler composed of a phototransistor for supplying the electric charge accumulated in the capacitor to the gate of the high-potential-side field effect transistor, both field effect transistors being respectively constituted by n-channel field effect transistors. Is characterized by.

In this DC motor drive circuit, in any one of the transistor circuits, when the low potential side field effect transistor is operating and the high potential side field effect transistor is not operating, the high potential side field effect transistor is in operation. Source becomes low potential. In this state, the capacitor is charged by the current of the power supply line through the diode and the resistor, so that the positive side terminal voltage becomes sufficiently higher than the source voltage which is a low potential. When all the capacitors are charged, when the first drive signal is input to the photodiode in any one of the transistor circuits, the phototransistors operate, causing the charge accumulated in the capacitors to have a high potential. It is supplied to the gate of the side field effect transistor. In this case, since the voltage obtained by adding the voltage between the terminals of the capacitor to the source voltage of the high-potential side field effect transistor is applied to the gate, the n-channel field effect transistor which is the high potential side field effect transistor operates reliably. . Further, when the second drive signal is input, the low potential side field effect transistor operates. As a result, current flows in the two stator coils that are respectively connected to the source of the high potential side field effect transistor and the drain of the low potential side field effect transistor, so that the DC motor rotates in a predetermined direction. On the other hand, after the high-potential side field effect transistor is activated, the voltage between the terminals of the capacitor decreases due to the discharge of the accumulated charge. In this case, when the low potential side field effect transistor connected in series with the high potential side field effect transistor is operated thereafter, it is charged again. Thus, in this drive circuit, the capacitor is charged every time the low-potential side field effect transistor operates, and the high-potential side field effect transistor operates based on the charge accumulated in the capacitor.

A drive circuit for a DC motor according to a second aspect is
In the DC motor drive circuit according to the present invention, a zener diode for limiting the voltage between the terminals of the capacitor to a predetermined voltage or less is connected to both ends of the capacitor.

In this DC motor drive circuit, when the voltage between the terminals of the capacitor rises due to the power supply current from the power supply line and the voltage tends to become higher than the Zener voltage of the Zener diode, the Zener diode operates to cause the capacitor to operate. The terminal voltage of is limited to the Zener voltage or less. Therefore, the source-gate voltage of the high-potential side field effect transistor can be limited to the Zener voltage or less, which prevents the breakdown voltage between the gate and source of the high-potential side field effect transistor from being exceeded.

A drive circuit for a DC motor according to claim 3 is
In the drive circuit for a DC motor according to claim 1 or 2, a resistor is connected between the gate and the source of the high potential side field effect transistor, and a time constant based on the resistance value of the resistor and the capacitance value of the capacitor is: It is characterized in that it is set to be longer than the output time of the first drive signal.

In the drive circuit of this DC motor, after the high potential side field effect transistor is activated, the electric charge accumulated in the gate is discharged by the resistor connected between the gate and the source. Therefore, the high potential side field effect transistor is immediately turned off. On the other hand, since the time constant based on the capacitance value of the capacitor and the resistance value of the resistor is set to be larger than the output time of the first drive signal, the high potential side field effect transistor outputs the first drive signal. Be sure to maintain the operating state within the time period.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment in which a drive circuit for a DC motor according to the present invention is applied to a rotation control device for a DC brushless motor (hereinafter referred to as "control device") will be described below with reference to the accompanying drawings. To do. The same components as those of the conventional power supply device 51 are designated by the same reference numerals.

The control device 1 shown in FIG. 1 controls the drive of a DC brushless motor M (hereinafter simply referred to as "DC motor M") in consumer equipment, medical equipment, etc., and includes a logic unit 3 and a drive. It comprises a section 4. The logic unit 3 includes three Hall ICs 5a, 5b, 5c (hereinafter,
When no distinction is made, "Hall IC5") is connected. The Hall IC 5 is attached to the DC motor M, and as shown in FIG. 4, the Hall IC 5 has a mechanical angle of 30 with respect to the rotation of the rotor 6 magnetized with four poles.
The magnetic pole detection signals that are out of phase with each other can be output. Further, the drive unit 4 is connected to the stator coils 2U, 2V, 2W of the DC motor M (hereinafter, referred to as "stator coil 2" when no distinction is made).

The logic unit 3 includes inverters 11a-11c,
12a-12c and AND gates 13a-13c, 14
a to 14c, resistors 15a to 15c, and a pulse oscillation circuit 16 for adjusting the rotation speed of the DC motor M.

The logic unit 3 has three stator coils 2 in order to rotate the DC motor M in a predetermined direction based on the magnetic pole detection signals Sa to Sc output from the Hall IC 5.
The first drive signals S _{1a to} S _1c and the second drive signals S _{2a to} S _2c , which are H signals, are output to the drive unit 4 so that any two of U, 2V, and 2W are simultaneously energized. . The pulse oscillator circuit 16 has a duty ratio of 0 to
The rotation speed of the DC motor M is adjusted by substantially changing the pulse width of the second drive signals S _{2a to} S _2c by outputting a pulse signal between 100%.

The drive unit 4 includes three transistor circuits 17
a, 17b, 17c (hereinafter, referred to as "transistor circuit 17" when no distinction is made).

Next, the structure of the transistor circuit 17 will be described in detail. Since the transistor circuits 17 have the same configuration, only the transistor circuit 17a will be described, and the constituent elements of each transistor circuit 17 will be identified by adding a to c to the reference numerals. . The transistor circuit 17 is an n-channel FET 21 which is a high potential side FET for supplying a current to the stator coil 2, and an n channel type FET 21 which is a low potential side FET for causing a current to flow through the stator coil 2 to the ground.
And a channel type FET 22. FET21
Has its drain connected to the DC power supply line 23 having a voltage of 140 V, and its source connected to the drain of the FET 22. The source of the FET 22 is connected to the ground. Further, protective diodes 24 and 25 for absorbing a counter electromotive voltage are connected between the drains and sources of the FETs 21 and 22, respectively.
One end of the stator coil 2 is connected to a connection point 26 between the source of 1 and the drain of the FET 22.

The drive section 4 includes a diode 31 having an anode connected to the DC power supply line 23 and a diode 3
A resistor 32 having one end connected to the cathode of 1, a capacitor 33 having a positive terminal connected to the other end of the resistor 32 and a negative terminal connected to a connection point 26, and a capacitor 32 connected in parallel to both ends of the capacitor 33, for example, a Zener voltage A 12V Zener diode 34, a resistor 35 connected between the gate of the FET 21 and the connection point 26, a photocoupler 36, and a resistor 3
9 and 40. The photocoupler 36 includes a photodiode 38 which has an anode connected to the resistor 15 of the logic section 3 and a cathode which is connected to the ground, and which conducts when the first drive signal is input, and the photodiode 38.
And a phototransistor 37 that supplies the charge accumulated in the capacitor 33 to the gate of the FET 21 when the transistor 8 is turned on.

Next, regarding the operation of the controller 1,
This will be described with reference to FIGS.

First, an outline of the operation of the control device 1 will be described. The Hall ICs 5a to 5c, in accordance with the position of the rotor 6, as shown in FIG. Output Sa to Sc respectively. In this case, the Hall ICs ICa to ICc shown in the figure correspond to the Hall ICs 5a to 5c, respectively, and the L signal and the H signal are
The magnetic pole detection signal which is the L signal and the magnetic pole detection signal which is the H signal are shown respectively. Further, modes 1 to 6 are 30 at the mechanical angles of 0 to 180 degrees shown in FIG. 3, respectively.
It corresponds to each period divided every degree.

In the controller 1, for example, during the period of the mode 1, the Hall IC 5 outputs the L signal magnetic pole detection signal Sa, and the Hall ICs 5b and 5c output the H signal magnetic pole detection signals Sb and Sc, respectively. , Logic part 3
Drive signal D generated by the logical operation by
_1a and the second drive signal S _2c are output to the drive unit 4. As a result, the FET 21 of the transistor circuit 17a is
And the FET 22 of the transistor circuit 17c respectively actuate, thereby connecting the stator coils 2 connected in series.
Electric current is supplied to U and the stator coil 2W. As a result, positive and negative currents flow through the stator coils 2U and 2W, respectively, and positive torque is generated in the rotor 6. As a result, the DC motor M rotates in a predetermined direction. After that, modes 1 to 6 are circulated and repeated in that order, and the drive unit 4 outputs the first and second drive signals based on the magnetic pole detection signals Sa to Sc output in each mode. The DC motor M continuously rotates in a predetermined direction.

Next, the specific operation of the control device 1 will be described in detail. The operation in the mode 1 described above will be mainly described below.

In the period of the mode 1, when the magnetic pole detection signal Sa of the L signal is output, the inverter 11a turns the AND gates 13a and 14c and the inverter 12a to the H level.
Output a signal. As a result, the inverter 12a outputs the L signal, and the AND gates 14a and 13c
Respectively output L signals. On the other hand, when the magnetic pole detection signal Sb of the H signal is output, the inverter 11b outputs the L signal to the AND gates 13b and 14a and the inverter 12b. As a result, the AND gates 13b and 14a output the L signal, and the inverter 12b outputs the H signal to the AND gates 13a and 14b. Also,
When the magnetic pole detection signal Sc of H signal is input, the inverter 11c outputs an L signal to the AND gates 13c and 14b and the inverter 12c. As a result, the AND gates 13c and 14b each output the L signal, and
The inverter 12c outputs the H signal to the AND gates 14c and 13b. As a result, when the pulse signal output from the pulse oscillation circuit 16 is the H signal, the AND gate 13
The a outputs the first drive signal S _1a which is the H signal, and the AND gate 14c outputs the second drive signal S _2c which is the H signal.

On the other hand, in the drive unit 4, for example, the FET 22 in any one of the transistor circuits 17 is previously operated without operating all the FETs 21a to 21c.
Is operated for a predetermined time, all the capacitors 33a to 3a are connected via the diode 31 and the resistor 32.
3c can be charged. In this state, F
The source of ET21 becomes low potential and the diode 3
Since 1 blocks the discharge of the capacitor 33, the positive terminal voltage of the capacitor 33 is maintained in a state higher than the source voltage of the FET 21 by the Zener voltage of the Zener diode 34. After that, when the operation of the FET 22 is stopped, the source of the FET 21 enters a high impedance state and the voltage between the terminals of the capacitor 33 is maintained at the same voltage.

In this state, when the first drive signal S _1a is input, the photodiode 38a is turned on to activate the phototransistor 37a, which causes a current based on the electric charge accumulated in the capacitor 33a. It flows into the gate capacitance of the FET 21a. In this case, generally, in order to drive the n-channel FET, it is necessary to make the gate voltage higher than the source voltage by at least 4 V or more. However, in the driving unit 4, the gate voltage is higher than the source voltage. Since the voltage is higher by the Zener voltage, the FET 21a operates reliably. on the other hand,
When the second drive signal S _2c is input, the gate voltage divided by the resistors 39c and 40c becomes the FET.
By being applied to 22c, FET 22c operates. As a result, the current from the DC power supply line 23 is F
ET21a, stator coils 2U, 2W and FET2
It flows into the ground through 2c. In this case, the time constant based on the capacitance value of the capacitor 33a and the resistance value of the resistor 35a is set to be larger than twice the pulse time of the first drive signal. Therefore, the FET 21a is
The operating state is always maintained while the drive signal S _1a is output. As a result, the DC motor M rotates in a predetermined direction. Then, when the output of the first and second drive signals S _1a and S _2c is stopped, the phototransistor 3
7a stops its operation, and the electric charge accumulated in the gate of the FET 21a is transferred to the stator coil 2U via the resistor 35a.
Since it is emitted to the ground via 2W, FET21a
Will stop working immediately.

Next, during the mode 2 period, when the first drive signal S _1a and the second drive signal S _2b are output from the AND gate 13a and the AND gate 13b, respectively, as in the mode 1 period. And FET
By operating 21a and FET 22b respectively, current is supplied to the stator coils 2U and 2V, and the DC motor M rotates in the same direction as in the period of the mode 1. In this state, the electric charge accumulated in the capacitor 33a is discharged to the stator coil 2U side via the resistor 35, so that the terminal voltage of the capacitor 33a is reduced. After that, when it comes to the period of mode 4 after the period of mode 3,
A first drive signal S _1c and a second drive signal S _2a are output from the AND gate 13c and the AND gate 14a, respectively, and the FET 21c operates and the FE
T22a operates. At this time, when the FET 22a operates, the capacitor 33a is charged by the current flowing through the diode 31a and the resistor 32, and compensates for the electric charge released in the periods of modes 1 and 2. After that, the drive unit 4 sets the capacitors 33a.
While charging ~ 33c, the DC motor M is continuously rotated in a predetermined direction according to the input of the first drive signal and the second drive signal.

As described above, the drive unit 4 according to this embodiment.
According to this, while the capacitor 33 is charged and the gate voltage based on the charge charged in the capacitor 33a is applied to the gate of the FET 21 via the phototransistor 37 in response to the input of the first drive signal, the gate voltage is changed. As a result of being higher than the source voltage, the n-channel FET 21 can be operated reliably. In this case, the FET 21 can be operated by separately using a power supply that outputs a voltage higher than the power supply voltage of the DC power supply line 23 for the gate voltage of the FET 21, but in such a case, another power supply is provided. This leads to an increase in cost. On the other hand, according to the drive unit 4 according to the present embodiment, the FET 21 can be operated with a single power source, so that the configuration can be extremely inexpensive. Further, since the Zener diode 34 is connected to both ends of the capacitor 33, the withstand voltage of the capacitor 33 can be lowered and the breakdown due to the over-breakdown of the gate-source withstand voltage of the FET 21 can be surely prevented.

Note that the present invention is not limited to the above embodiment, and the configuration can be changed as appropriate. For example, in the present embodiment, the FET 21 is configured to operate when the logic level of the first drive signal is the H signal.
The FET 21 may be operated by the L signal by pulling up the anode of the photodiode 38 and connecting the cathode to the output side of the logic section 3, or the logic level of the second drive signal may be changed to the L level. It can also be a signal.

The present invention is not limited to a three-phase DC brushless motor, but can be applied to other multi-phase DC motors.

Further, as the field effect transistor in the present invention, either a junction type or a MOS type can be used.

[0032]

As described above, according to the drive circuit of the DC motor of the first aspect, the capacitor is charged every time the low potential side field effect transistor is activated, and the voltage between the terminals of the capacitor is high potential side electric field. Since the voltage added to the source voltage of the effect transistor is applied to the gate, the n-channel field effect transistor which is the high potential side field effect transistor can be operated reliably. As a result, an inexpensive n-channel field effect transistor can be used in place of the p-channel field effect transistor, and a high voltage can be applied to the stator coil, so that the DC motor has high torque and low power consumption. Can meet the request of.

According to another aspect of the drive circuit for a DC motor of the present invention, the voltage between the terminals of the capacitor is limited to the Zener voltage or less, so that the source-gate voltage of the high-potential side field effect transistor is equal to or less than the Zener voltage. Therefore, it is possible to reliably prevent the gate-source breakdown voltage of the high potential side field effect transistor from being exceeded.

Further, according to the drive circuit of the DC motor of the third aspect, the turn-off time of the field effect transistor can be shortened by the resistor connected between the gate and the source, and the first drive can be achieved. The field effect transistor can be reliably operated within the time when the signal is output.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a rotation control device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a signal level output in each mode by the Hall IC of the DC motor according to the present embodiment.

FIG. 3 is a signal waveform diagram showing a voltage applied to a stator coil of the DC motor according to the present embodiment.

FIG. 4 is a Hall I in the DC motor according to the present embodiment.
It is a layout drawing of C.

FIG. 5 is a circuit diagram of a conventional DC motor drive circuit.

[Explanation of symbols]

 2 Stator coil 4 Drive part 17 Transistor circuit 21 FET 22 FET 23 DC power supply line 31 Diode 33 Capacitor 34 Zener diode 35 Resistor 36 Photocoupler 37 Phototransistor 38 Photodiode M DC brushless motor

Claims (3)

[Claims] 1. A transistor circuit configured by connecting in series a source of a high-potential side field effect transistor whose drain is connected to a power supply line and a drain of a low-potential side field effect transistor whose source is connected to a low potential line. A plurality of sets are provided, and the other end of each of the stator coils, the number of which is the same as the number of the sets and one end of which is commonly connected, is configured to be connectable to a connection point between the source and the drain in each set, respectively. The high potential side field effect transistor in any one of the groups operates according to the input of one drive signal, and the low potential side field effect transistor in any one of the other groups according to the input of the second drive signal. Is activated, the two stator coils respectively connected to the field effect transistors are connected to the stator coils. In a drive circuit of a DC motor that drives a DC motor by supplying a current from the power supply line via a high-potential-side field effect transistor, each of the transistor circuits has the one end at least through a diode in the power supply line. A capacitor having the other end connected to the connection point, a photodiode that conducts when the first drive signal is input, and a capacitor that accumulates in the capacitor when the photodiode conducts. A photocoupler comprising a phototransistor for supplying charges to the gate of the high-potential side field effect transistor, wherein both the field effect transistors are n-channel type field effect transistors. Motor drive circuit. 2. A drive circuit for a DC motor according to claim 1, wherein a Zener diode for limiting a voltage between terminals of the capacitor to a predetermined voltage or less is connected to both ends of the capacitor. 3. A resistor is connected between the gate and the source of the high potential side field effect transistor, and a time constant based on the resistance value of the resistor and the capacitance value of the capacitor is the first drive signal. 3. The drive circuit for the DC motor according to claim 1, wherein the output time is set to be larger than the output time.