JPH09297971A - Demodulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a demodulator capable of increasing the probability of demodulation success of data and accelerating the speed of reproducing operation. SOLUTION: Interval data corresponding to recorded data read out from an optical card is generated by an interval data obtaining circuit 32, these data are successively stored in an interval data memory 35, interval data read out from this interval data memory 35 in the prescribed order is demodulated by a CPU 36, while this demodulated data is stored in a modulated data memory 37. And when error correction is performed by an error correction circuit 38 for every plural pieces of data for demodulated data stored in the demodulated data memory 37, in the case of impossibility of error correction, interval data corresponding to plural pieces of data of which error correction is performed by this error correction circuit 38 is controlled so that interval data is read out from the interval data memory 35 in the reverse order of the prescribed order.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical recording medium, for example, a demodulating device for demodulating information from an optical card.

[0002]

2. Description of the Related Art Conventionally, as an optical recording medium, a card-shaped optical card for optically recording / reproducing information using a laser beam has been known. FIG. 5 shows a general structure of such an optical card 10, which has an optical recording section 2 in which a plurality of tracks 3 are formed on a card body 1 in parallel with the longitudinal direction thereof. Information is recorded on the portion 2 by irradiating the track 3 with laser light at an intensity that causes a thermal change to form holes called pits, while
Information is reproduced by irradiating the track 3 with laser light having an intensity that does not cause a thermal change and receiving reflected light having an intensity change depending on the presence or absence of the pit 301.

FIG. 6 shows a schematic structure of an optical card processing apparatus for recording and reproducing information on such an optical card 10. In the figure, 11 is an optical card processing apparatus main body, and a card insertion / ejection port 12 for inserting and ejecting the optical card 10 is provided on the front surface of the apparatus main body 11.
Inside the card insertion / ejection slot 12, the pulley 13
The optical card 10 in which the conveying means such as a, 13b, the belt 14 and the motor 15 are arranged and is inserted through the card insertion / ejection slot
Is fixed to the pulley 13a and the rotation shaft of the motor 15
The optical head 16 for writing and reproducing information on the track 3 of the optical card 10 by the forward and reverse rotation of the motor 15 by mounting the belt 14 suspended between the optical head 16 and the belt 3b. It is designed to be transported back and forth.

In this case, the motor 15 is connected to the controller 18 via the motor drive circuit 17. Also,
The optical head 16 is connected to a controller 18 via a head drive means 19 including a voice coil motor and a head drive circuit 20.

The controller 18 controls the entire apparatus according to a control command from an external host computer 21. In such an optical card processing device, information is recorded on the optical card 10 by using the optical card 1 as the optical head 1.
The laser beam modulated by the information to be written is irradiated from the optical head 16 onto the track 3 of the optical card 10 shown in FIG. The reproduction of information is performed by forming the pits 301, and the laser light whose output is weakened to such an extent that the pits 301 are not formed on the track 3 while the optical card 19 is forwardly or backwardly transported to the optical head 16. Is irradiated to a desired track 3, the reflected light thereof is converted into an electric signal by a light receiving element (not shown) provided in the optical head 16, and the signal is binarized and demodulated. .

The head drive means 19 and the head drive circuit 20 are provided for the track 3 of the optical card 10 which is currently located.
To move the optical head 16 to another track 3.

By the way, the modulation methods for recording pits on the optical card 10 include (2,7) RLL and 8-1.
Self-clock modulation such as 0 conversion and MFM is used. Further, as a demodulation method of the optical card 10, a bit clock synchronized with the minimum data interval is generated based on the detected polarity change edge of the binarized signal, and the binarized signal is sampled by the bit clock. There is a method of extracting the bit string of the data by this, and a method of demodulating based on the edge interval (hereinafter referred to as interval data) of the polarity change of the binarized signal.

Here, the correspondence between the pits on the track and the interval data is, for example, as shown in FIG. 7, the minimum mark (pit) length, that is, 1T is 4 μm, the average drive speed of the card is 100 mm / s, and the edge is If the clock frequency for measuring the interval is 1 MHz, the 1T regular interval data is 40 clocks, that is, the count value is “39”.
Becomes Similarly, the regular interval data of 2T, 3T, and 4T are “79”, “119”, and “159”, respectively.
Becomes

The interval data thus obtained is temporarily stored in the interval data memory, demodulated by 8-10 inverse conversion, and stored in the demodulated data memory.
Further, the demodulated data in the demodulated data memory is error-corrected for each of a plurality of pieces of fixed length, and is output to the host computer as reproduced data.

FIG. 8 shows a process until a bit string of demodulated data demodulated by 8-10 inverse conversion is generated from a bit string generated from such interval data. The data is read and a bit string corresponding to the interval data is generated as shown in FIG. Then, the bit string is divided into 10-bit units as shown in FIG. 9B (“Δ” indicates the 10th bit), and every 10 bits is 8
-10 inverse conversion is performed, and 8 bits (1
Byte) data is being demodulated.

In this case, each recorded interval data is added with an error correction code so that the original data can be restored even if some local demodulation errors occur during demodulation. .

FIG. 9 is a diagram for explaining error correction when demodulating interval data using such an error correction code. Here, 8 bytes of interval data for 32 bytes are used.
They are arranged in a matrix of × 4 bytes, and an error correction code of 4 bytes that can be double-corrected in each row and column direction is added to form a 12 × 8 bytes. In addition, this 1
In the 2 × 8 byte configuration, a special code (hereinafter referred to as SYNC) is inserted as a synchronization signal before and after each line in order to synchronize in units of lines when performing 8-10 inverse conversion, and further At the beginning and end, a pattern (hereinafter referred to as Lead-In) mainly used for pulling in a bit clock is given.

In this case, since 8-10 inverse conversion is taken as an example, the data byte and the error correction code byte in the drawing are each composed of a 10-bit pattern.

That is, the interval data of the interval data memory in this case goes from left to right on the track 3 according to the first row → second row ... → 8th row of the matrix, Lead-In → SYNC. → D00 → D01 → ... → E0A → E0B → SYNC → D10 → D11 → ... → E7A → E7B → SYNC → Lead-In ... (A).

In order to demodulate such interval data, first, Lead-In is searched. L
After detecting the ead-In, the first SYNC is detected next. When SYNC is detected, the data in the first row is demodulated with reference to it until the SYNC at the end of the first row is detected. Here, even if bit synchronization shift occurs due to a demodulation error during demodulation of the data part, this cannot be confirmed, so the reference of the demodulation start position is based on the SYNC detection between the lines. This prevents the error from propagating to undemodulated rows. Therefore, the demodulation of the second row is the SYNC at the end of the first row.
By performing detection as a new reference and thereafter repeating up to the eighth row, all interval data can be demodulated.

In this case, as can be seen from the matrix of 12 × 8 bytes, since error correction codes are assigned to each row and each column, error correction processing is performed even if some demodulation errors occur. If applied, the original data will be restored.

For example, as shown in FIG. 10, when a demodulation error occurs during demodulation of D24 in the third row and a bit synchronization deviation occurs, that is, the interval data D24 shown in FIG. 8 (d).
If, for example, 4 bits (indicated by x part) are mistaken for 3 bits in the part, as shown in FIG.
From 25 to E2B, a so-called burst error may occur, which is incorrect data with a 1-bit shift.
In this case, one at each location in the vertical direction of the matrix.
Since there are only errors for bytes, these errors are within the correctable range.

[0018]

However, the optical card 1
The range of dirt and scratches of 0 is relatively large, and for example, as shown in FIG. 11, when the bit synchronization shift occurs due to D24 in the middle of the third row, subsequent data becomes a burst error (S
Bit sync recovery at YNC), similar burst error occurred at D32 in the fourth row (bit sync recovery at SYNC), and local random error occurred at E67 to E69 in the seventh row. In such cases, the third,
The probability of being uncorrectable is very high because there are three or more errors in the small blocks of the 4th and 7th rows. On the other hand, also in the column direction, 3 errors occur in each of the 8th to 10th columns. Therefore, the probability that it cannot be corrected is very high,
Eventually, errors in the eighth to tenth columns may remain, and demodulation errors may occur.

In this case, it is usual that the error byte is not specified, and the data has meaning only after the sector is completed. Therefore, in such demodulation operation, the error could not be corrected and the sector could not be restored. Only information will be output to the controller.

Therefore, conventionally, when such a demodulation operation is unsuccessful, it is possible to give up only once,
I try to retry a few times. However, in such a retry of the demodulation operation, the optical card 10 must be driven again to newly acquire undemodulated data, and therefore, each time such an operation is performed, a new one of several hundred msec is required. It takes time, and the time for retrying causes a decrease in reproduction speed.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a demodulation device capable of increasing the probability of successful data demodulation and also speeding up the reproducing operation. .

[0022]

According to the first aspect of the present invention,
Interval data storage means for sequentially storing interval data corresponding to recording data read from the optical recording medium, demodulation means for demodulating the interval data read from the interval data storage means in a predetermined order, and demodulated by the demodulation means. Data stored in the demodulated data storage means, error correction means for performing error correction on the demodulated data stored in the demodulated data storage means for each plurality of data, and demodulation stored in the demodulated data storage means. When the error correction means cannot correct the data, the interval data corresponding to the plurality of pieces of data to be error-corrected by the error correction means are stored in the interval data storage means in the reverse order from the predetermined order. And the control means for controlling the reading to be performed in this order.

The invention according to claim 2 is the control circuit according to claim 1, wherein the error correction means performs error correction when the error correction means cannot correct the error. Of the interval data corresponding to a part of the data of the interval data is read from the interval data storage means in the reverse order of the predetermined order, and demodulated data for the interval data read in the reverse order demodulated by the demodulation means. Is controlled so that it is replaced with a part of the plurality of data that cannot be error-corrected by the error correction means stored in the demodulated data storage means.

The invention according to claim 3 is based on claim 1, wherein the size of a part of the plurality of data to be replaced can be arbitrarily selected within the range of the plurality of data. .

As a result, according to the invention of claim 1,
When the error correction means performs error correction on the data stored in the demodulated data storage means, and as a result, the error correction is impossible, the control means controls the plurality of data which cannot be error corrected. The interval data corresponding to is read from the interval data storage means in the reverse order of the predetermined order. As a result, when a data error occurs in the demodulated data due to the deviation of the interval data due to the fluctuation of the carrying speed at the time of carrying the optical recording medium, the dirt on the recording medium, the scratch, etc., the error of the data in the demodulated data Since the propagation direction can be reversed, it is possible to increase the probability that the error correction of the demodulated data will be successful, and to carry the recording medium again in order to demodulate a plurality of data that could not be error corrected. Since there is no need to do so, it is possible to speed up playback.

According to the second aspect of the invention, when the error correction means cannot correct the error, the control means corresponds to a part of the plurality of data which cannot be corrected. The interval data is read from the interval data storage means in the reverse order. Then, the demodulated data for the interval data demodulated by the demodulating means and read out in the reverse order is replaced with the corresponding plurality of data portions stored in the demodulated data storage means. Even in this case, the same effect as described above can be expected.

According to the third aspect of the invention, the control means can arbitrarily select the size of a part of the plurality of data to be replaced within the range of the plurality of data. As a result, it is possible to arbitrarily select the size of a plurality of data to be replaced according to the fluctuation of the transport speed at the time of transporting the medium, the stain on the medium, the scratch, or the like.

[0028]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows a schematic configuration of a demodulator to which the present invention is applied. In addition, this demodulator
It is provided in the controller 18 of the optical card processing device described in FIG.

In the figure, 31 is a binarization circuit, which converts the analog electric signal from the light receiving element of the optical head 16 described in FIG. 6 into a binarization signal. The interval data acquisition circuit 32 is connected to the binarization circuit 31. The interval data acquisition circuit 32 counts the edge interval of the polarity change of the binarized signal from the binarization circuit 31 with a high frequency clock and generates the count value as interval data.

An interval data memory 35 is connected to the interval data acquisition circuit 32 via a data bus 33 and an address bus 34. The interval data memory 35 stores the interval data generated by the interval data acquisition circuit 32.

The data bus 33 and the address bus 34 include
The CPU 36 and the demodulation data memory 37 are connected. C
The PU 36 sequentially reads the interval data stored in the interval data memory 35, converts the interval data into a bit string, demodulates the converted bit string according to the modulation / demodulation rule of the 8-10 conversion code, and stores the demodulated data in the demodulation data memory 37. I am trying.

An error correction circuit 38 is connected to the data bus 33. The error correction circuit 38 fetches the demodulated data stored in the demodulated data memory 37 by a certain length in the order stored in the demodulated data memory 37, corrects the error, and then reproduces the reproduced data to the host computer side. I am trying to output.

Even in such a demodulator, however, the interval data generated by the interval data acquisition circuit 32 is stored in the interval data memory 35, and C
The PU 36 reads the interval data from the interval data memory 35, generates a bit string corresponding to the interval data as shown in FIG. 8A, and divides the bit string into 10-bit units as shown in FIG. 8B. ".DELTA." Indicates the 10th bit.), 8-bit for every 10 bits
10 inverse conversion is performed to demodulate 8-bit (1 byte) data shown in FIG.
To be stored. Then, after that, the demodulated data stored in the demodulated data memory 37 is fetched by a fixed length in the order stored in the demodulated data memory 37, error correction is performed, and the reproduced data is output to the host computer side. .

However, also in this case, as shown in FIG. 11 described above, the data following the occurrence of the bit synchronization deviation due to D24 in the middle of the third row becomes a burst error (S
It seems that a similar burst error occurred from D32 in the 4th row (bit sync recovery from YNC) (bit synchronization from SYNC), and a local random error occurred from E67 to E69 in the 7th row. If not, the third,
The probability of being uncorrectable is very high because there are three or more errors in the small blocks of the 4th and 7th rows. On the other hand, also in the column direction, 3 errors occur in each of the 8th to 10th columns. Therefore, the probability that it cannot be corrected is very high,
Eventually, the errors in the eighth to tenth columns may remain and cause demodulation errors.

Therefore, in the first embodiment, if the data read from the storage direction in the interval data memory 35 cannot be corrected, the next retry is performed in the opposite direction as in the conventional card. Is not driven to newly acquire undemodulated data, but the interval data memory 35
The stored data is read out in the reverse order of the order in which it is stored and demodulated.

That is, here, without performing a new scan operation, the data is read from the interval data memory 35 in the direction opposite to the direction in which the data was stored and demodulated, so that in the matrix shown in FIG. If the error occurs, the matrix shown in FIG. 2 is newly generated.

In this case, the matrix shown in FIG. 2 is generated from the matrix shown in FIG. 11 because the bit synchronization shift at D24 in the middle of the third row shown in FIG.
When an error occurs in which, for example, 4 bits (indicated by X part) are recognized as 3 bits in the D24 portion as shown in (a), as shown in FIG.
Although a burst error occurs up to 2B, in the first embodiment, the data is read from the interval data memory 35 in the opposite direction from the time of storage and demodulated by retry, so that FIG.
When an error bit (indicated by a portion X) occurs in the interval data D24 portion as shown in FIG. 7, burst error occurs from D23 to D20 after D24 as shown in FIG. Similarly, in the case of bit synchronization shift due to a demodulation error at D32 in the middle of the fourth row, burst errors occur from D31 to D30 after D32. Note that the local random errors E67 to E69 in the middle of the seventh line remain unchanged.

In this way, if the matrix shown in FIG. 2 is obtained as the demodulation result by reading from the interval data memory 35 in the opposite direction from the time of storage by retrying, as is apparent from the figure, there is an error in any column. Since the number can be two or less, the error correction will be successful.

The data read and demodulated in the reverse order in this manner is overwritten in the storage area of the previous demodulation data of the demodulation data memory 37. In such a reverse scan at the time of retry, the interval data stored in the interval data memory 35 is loaded in the reverse order from the storage order by using software, without actually moving the optical card 10. Since it corresponds to that, it becomes possible to proceed with the work very fast.

Next, using concrete numerical values, consider the time required for reverse access to the interval data memory 35 for demodulation. Now, assuming that the interval data of "20" to "39" is regarded as 1T, the algorithm when considering the process of demodulating the interval data of "29" as 1T is as follows.

Step1. Load interval data from interval data memory 34 step2. Interval data> = 20? step3. Interval data <= 39? step4. Set "1" as demodulated data step5. Stored in demodulated data memory 38 The processing amount of the CPU 36 required for such an operation is 1
Even if an average of 10 cycles is consumed for the step, it is 50 cycles, and the data for one track is about 1680 bytes = 16800 bits at the maximum including the error correction code. Therefore, 16800 x 50 = 840000.
Cycle. As a result, 1 of the CPU 36 here
If the cycle is 100 nsec, the time required for this is about 84 msec.

On the other hand, if a backward retry is attempted by the conventional method using the bit clock, the optical card 10 is scanned, and it is 80 mm (track length) / 1.
00 mm / s (speed) = 800 msec, and since this time does not include data processing, it takes more time. Therefore, according to the method described above, the retry by reading the interval data is performed by the optical card 10. It can be seen that the work can be performed at a much higher speed than that achieved by the actual scan of.

Further, in the first embodiment as described above,
Since the optical card 10 is not driven at the time of retry, there is also an advantage that power saving can be achieved. (Second Embodiment) In FIG. 11 and FIG. 2 described above, it is D24, D32, E67 ...
It turns out that it is only 5 bytes of E69. For this reason,
A new matrix with less errors can be created by replacing all the data demodulated in the forward direction in the retry with the data demodulated in the backward direction, replacing a certain number of bytes, and combining them to form one matrix. Next to
The error correction may be more likely to be successful.

For example, in the retry by the backward access of the interval data memory 35, only 1/2 is replaced for each row, and the remaining 1/2 uses the data stored in the previous demodulation data memory 37. The matrix shown in FIG. 11 can be replaced with the matrix shown in FIG. 4 by retrying.

In FIG. 4, the left half of the block representing the sector is the forward-scanned interval data read out in the forward direction and demodulated, and the right half is the interval data read out in the reverse direction and demodulated. Since the total number of errors in such a matrix can be made smaller than in the case of FIG. 2, if the second embodiment is adopted,
Further, the success rate of error correction can be increased.

Although the partial replacement range is set to 1/2 of the row here, it is not limited to 1/2 and the size of the replacement area is set every time the error correction by the error correction circuit fails. It may be changed to perform error correction.

Further, when the error cannot be corrected by such backward reading, the conventional backward scanning may be carried out. Further, the size of the replacement area when the error correction is successful is stored for each track, and is stored when the data recorded in the track located near the track is reproduced next time. The size of the replacement area of the track to be reproduced may be determined based on the size of the replacement area.

Furthermore, when the number of times of error correction including the retry becomes a predetermined number, the controller 36 ejects the optical card 10 from the optical card processing device, or the recording medium being reproduced is defective. Or
Alternatively, the reverse track scan may be performed for the first time when the number of times error correction is impossible reaches a predetermined number.

Although the above description is based on the embodiment,
The present invention includes the following inventions. (1) Interval data storage means for sequentially storing interval data corresponding to recording data read from an optical recording medium, demodulation means for demodulating interval data read from the interval data storage means in a predetermined order, and this demodulation means Demodulated data storage means for storing the data demodulated by the above, error correction means for performing error correction on the demodulated data stored in the demodulated data storage means for each of a plurality of data, and stored in the demodulated data storage means When the error correction means cannot correct the demodulated data, the interval data corresponding to the plurality of pieces of data to be error-corrected by the error correction means are stored in the predetermined order by the interval data storage means. A demodulation device, comprising: a control unit for controlling the reading in the reverse order.

In this way, when a data error occurs in the demodulated data due to the deviation of the interval data due to the fluctuation of the carrying speed at the time of carrying the optical recording medium and the dirt or scratches on the recording medium, this demodulated data is generated. Since the propagation direction of the error of the inside data can be reversed, the probability that the error correction of the demodulated data will be successful can be increased, and moreover, it is recorded to demodulate a plurality of data that could not be error corrected. Since it is not necessary to convey the medium again, speeding up at the time of reproduction can be realized.

(2) In the demodulator described in (1),
The control means, when the error correction by the error correction means is impossible, the interval data corresponding to a part of the plurality of data to be error-corrected by the error correction means,
The demodulation data is read from the interval data storage means in the reverse order of the predetermined order, and the demodulation data for the interval data read in the reverse order demodulated by the demodulation means is stored in the demodulation data storage means. The error correction means is controlled to replace a part of the plurality of data that cannot be error-corrected.

Even in this case, the same effect as (1) can be expected. (3) In the demodulator according to (1), the size of a part of the plurality of data to be replaced can be arbitrarily selected within the range of the plurality of data.

By doing so, it is possible to arbitrarily select the size of a plurality of data to be replaced according to the variation of the transport speed at the time of transporting the medium, the stain on the medium, the scratch, and the like.

(4) In the demodulator according to any one of (2) to (3), the control means is arranged to replace the plurality of data each time the error correction means cannot correct the plurality of data. I am trying to change the size of some of the data.

In this way, the control means changes the size of a part of the plurality of data to be replaced every time the error correction means cannot correct the plurality of data. It is possible to know the size of replacement data for which error correction can be normally performed by the error correction means.

(5) In the demodulator described in (2) to (4), the recording data read from the optical recording medium is:
The data is recorded on tracks which are formed adjacent to each other on the optical recording medium, and the control means determines the size of a part of the plurality of data for which the error correction by the error correction means is normally completed. Each track is stored for each track, and when the data recorded on a track located in the vicinity of the track where a part of the plurality of data is stored is reproduced, The size of a part of the plurality of data of the track to be reproduced is determined based on the size of a part of the individual data.

In this way, when the error correction means cannot correct the error in the demodulated data of the track adjacent to the track on which the error correction means has normally performed the error correction, the error correction cannot be performed. Error correction is normally performed by the error correction means in the range in which the demodulated data obtained by reading the interval data corresponding to the demodulated data in the reverse direction from the interval data storage means is replaced with the corresponding demodulated data stored in the demodulated data storage means. Since it is possible to make a decision with reference to the replacement range in the track that has been performed, it is possible to perform processing in an appropriate replacement range.

(6) In the demodulator according to any one of (1) to (5), further, an opening for an optical recording medium in which at least one of insertion and ejection of the optical recording medium is performed, and two openings from the optical recording medium. Reading means for reading the data that is the source of the binarized signal, and the optical recording medium inserted from the opening for the optical recording medium is moved to the reading means, and the optical recording medium is opened through the opening for the optical recording medium. And an optical recording medium conveyance control means for controlling the operation of the optical recording medium conveyance means. The error correction means cannot correct the plurality of data. When the number of times reaches a predetermined number, the optical recording medium carrying control means controls the optical recording medium carrying means to eject the optical recording medium.

In this way, the optical recording medium that cannot be error-corrected by the error-correcting means a predetermined number of times or more is promptly ejected, so that such a recording medium may stay in the apparatus. It can be prevented.

(7) In the demodulating device described in (1) to (5), further, reading means for reading the data which is the source of the binarized signal from the optical recording medium, and the reading means for the optical recording medium. An optical recording medium moving means for moving the optical recording medium relative to the optical recording medium and a reciprocating movement control means for controlling the reciprocating movement direction of the optical recording medium moving means. When the number of times when the error correction means cannot correct the plurality of demodulated data obtained by moving the optical recording medium to either side is a predetermined number, the reciprocating movement control means At the position of the optical recording medium where the original data of the plurality of demodulated data exists, the optical recording medium is moved in a direction opposite to the direction in which the plurality of demodulated data are read. Cormorant controls the optical recording medium moving means.

In this way, even if the error correction means cannot correct the error in the plurality of demodulated data obtained by reading in either the forward or backward direction, the error correction cannot be performed. The probability that the data can be reproduced can be increased by moving the optical recording medium in the direction opposite to the direction in which the plurality of demodulated data was obtained and obtaining the data.

[0062]

As described above, according to the present invention, the demodulated data is erroneous due to the deviation of the interval data due to the fluctuation of the carrying speed at the time of carrying the optical recording medium and the dirt and scratches on the recording medium. Even if it is necessary to demodulate the interval data again, it is possible to increase the probability that the error correction of the demodulated data will be successful, and also to use a recording medium to demodulate a plurality of data that could not be error-corrected. There is no need to transport it again, and high speed playback can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic configuration of a first embodiment of the present invention.

FIG. 2 is a diagram for explaining error correction of demodulated data according to the first embodiment.

FIG. 3 is a diagram for explaining a burst error of demodulated interval data according to the first embodiment.

FIG. 4 is a diagram for explaining an error correction matrix of demodulated data according to the second embodiment of this invention.

FIG. 5 is a diagram showing a schematic configuration of an optical card.

FIG. 6 is a diagram showing a schematic configuration of an optical card processing device for recording / reproducing an optical card.

FIG. 7 is a diagram showing a correspondence relationship between pits on a track of an optical card and interval data.

FIG. 8 is a diagram for explaining a burst error of interval data generated from an optical card.

FIG. 9 is a diagram for explaining a conventional matrix for error correction of demodulated data.

FIG. 10 is a diagram for explaining a conventional matrix for error correction of demodulated data.

FIG. 11 is a diagram for explaining a conventional matrix for error correction of demodulated data.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Card main body, 2 ... Optical recording part, 3 ... Track, 301 ... Pit, 10 ... Optical card, 31 ... Binarization circuit, 32 ... Interval data acquisition circuit, 33 ... Data bus, 34 ... Address bus, 35 ... Interval data memory, 36 ... CPU, 37 ... Demodulation data memory, 38 ... Error correction circuit.

Claims (3)

[Claims] 1. Interval data storage means for sequentially storing interval data corresponding to recording data read from an optical recording medium, and demodulation means for demodulating interval data read from the interval data storage means in a predetermined order. Demodulation data storage means for storing data demodulated by the demodulation means, error correction means for performing error correction on the demodulation data stored in the demodulation data storage means for each of a plurality of data, and the demodulation data storage means When the error correction by the error correction means for the demodulated data stored in is impossible,
And a control means for controlling the interval data corresponding to the plurality of data to be error-corrected by the error correction means so as to be read from the interval data storage means in an order opposite to the predetermined order. A demodulator characterized by. 2. The control means, when the error correction by the error correction means is impossible, sets the interval data corresponding to a part of the plurality of data to be error-corrected by the error correction means to the interval data. The error stored in the demodulation data storage means is demodulated data for the interval data read out from the data storage means in the reverse order to the predetermined order and read out in the reverse order demodulated by the demodulation means. 2. The demodulator according to claim 1, wherein the demodulation device is controlled to replace a part of the plurality of data that has not been error-correctable by the correction means. 3. The demodulator according to claim 2, wherein a size of a part of the plurality of data to be replaced can be arbitrarily selected within a range of the plurality of data.