JPH09289200A - Substrate temperature control device - Google Patents

Substrate temperature control device

Info

Publication number
JPH09289200A
JPH09289200A JP12646696A JP12646696A JPH09289200A JP H09289200 A JPH09289200 A JP H09289200A JP 12646696 A JP12646696 A JP 12646696A JP 12646696 A JP12646696 A JP 12646696A JP H09289200 A JPH09289200 A JP H09289200A
Authority
JP
Japan
Prior art keywords
substrate
temperature
wafer
control device
temperature control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12646696A
Other languages
Japanese (ja)
Inventor
Takayuki Sato
孝幸 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP12646696A priority Critical patent/JPH09289200A/en
Publication of JPH09289200A publication Critical patent/JPH09289200A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PROBLEM TO BE SOLVED: To make processing results uniform through all the surface of the substrate, by a method wherein the substrate is divided into two regions, a first region and a second region, and the regions are so controlled as to be different from each other in temperature. SOLUTION: A lower electrode 16 is formed like a disc whose upside is slightly larger in diameter than a wafer 1. The lower electrode 16 is composed of a center electrode 16A whose diameter is nearly 2/3 as large as the overall diameter of the electrode 16 and a peripheral electrode 16B. Warm water is supplied to the electrodes 16A and 16B from temperature controls 18 and 20 to keep them at 30 deg.C and 20 deg.C, respectively, to cause a temperature difference of 10 deg.C between the center 21 and the periphery 22 of the wafer 1. By this setup, all the surface of a wafer 1 is uniformly processed, so that the substrate can be set uniform in processing result through all its surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は基板温度制御装置に
関し、例えば所定気体でウエハをエツチングするエツチ
ング装置に適用し得る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate temperature control device, and can be applied to, for example, an etching device for etching a wafer with a predetermined gas.

【0002】[0002]

【従来の技術】従来、この種のエツチング装置には、マ
イクロ波で励起して発生したプラズマ状態のガスに磁界
をかけてエツチングするいわゆるマイクロ波プラズマエ
ツチヤがある。マイクロ波プラズマエツチヤのエツチン
グ室内に導入するエツチングガスには、エツチング性と
同時に堆積性を有するものがある。このエツチングガス
によつてウエハをエツチングすると、ウエハは、ウエハ
面内と直交する方向にエツチングされて段差部が形成さ
れると共に、この段差部の側壁にプラズマとエツチング
ガスとの反応生成物が堆積して、側壁がエツチングガス
によつて過剰にエツチングされることを抑えることがで
きる。
2. Description of the Related Art Conventionally, an etching apparatus of this type includes a so-called microwave plasma etcher for etching a gas in a plasma state generated by being excited by microwaves by applying a magnetic field. Some etching gases introduced into the etching chamber of the microwave plasma etcher have etching properties and deposition properties at the same time. When a wafer is etched by this etching gas, the wafer is etched in a direction orthogonal to the plane of the wafer to form a step portion, and a reaction product of plasma and etching gas is deposited on the side wall of the step portion. Thus, it is possible to prevent the sidewall from being excessively etched by the etching gas.

【0003】[0003]

【発明が解決しようとする課題】ところが、上述のマイ
クロ波プラズマエツチヤでは、エツチングガスがウエハ
の周辺より排気されており、排気するときこのエツチン
グガスを均一に排気することが困難である。またウエハ
を載置する下部電極は、ウエハ全面の温度を同一に制御
していた。
However, in the above-described microwave plasma etcher, the etching gas is exhausted from the periphery of the wafer, and it is difficult to exhaust this etching gas uniformly when exhausting. The lower electrode on which the wafer is placed controls the temperature of the entire surface of the wafer to be the same.

【0004】このため、上述のようなマイクロ波プラズ
マエツチヤでエツチング性と堆積性とを有するエツチン
グガスを用いて、ウエハ面上の例えばポリシリコンをエ
ツチングすると、エツチングガスの滞留時間は、ウエハ
中心部に比して周辺部で短くなつていた。従つて、エツ
チングを終了したときの側壁の形状がウエハ面内で不均
一となつていた。
Therefore, when etching is performed on, for example, polysilicon on the wafer surface using an etching gas having etching properties and deposition properties in the microwave plasma etcher described above, the residence time of the etching gas is the center of the wafer. It was shorter in the peripheral part than in the part. Therefore, the shape of the side wall at the end of etching is not uniform in the wafer surface.

【0005】すなわち、図3に示すように、ウエハ1中
心部では、プラズマ状態のガスとエツチングガスとの反
応生成物2が段差部3の側壁の上方に比して下方に多く
堆積して、側壁がウエハ1面内方向に対して傾斜した形
状にエツチングされていた。これに対して、ウエハ1周
辺部では、反応生成物2が側壁の上方及び下方にほぼ均
一に堆積して、側壁がウエハ1面内方向と直交する形状
にエツチングされていた。
That is, as shown in FIG. 3, in the central portion of the wafer 1, reaction products 2 of the gas in the plasma state and the etching gas are deposited more in the lower portion than in the upper portion of the side wall of the step portion 3, The sidewall was etched into a shape inclined with respect to the in-plane direction of the wafer 1. On the other hand, in the peripheral portion of the wafer 1, the reaction products 2 were deposited almost uniformly above and below the side wall, and the side wall was etched into a shape orthogonal to the in-plane direction of the wafer 1.

【0006】本発明は以上の点を考慮してなされたもの
で、基板面に対する処理結果を基板全面に亘つて均一化
し得る基板温度制御装置を提案しようとするものであ
る。
The present invention has been made in consideration of the above points, and an object thereof is to propose a substrate temperature control device capable of uniformizing the processing result on the substrate surface over the entire surface of the substrate.

【0007】[0007]

【課題を解決するための手段】かかる課題を解決するた
め本発明においては、基板の温度を制御する基板温度制
御装置において、基板を複数領域に領域分けして設定し
た第1の領域と、当該領域分けして設定した第2の領域
との間に任意の温度差を与えるように制御する。
In order to solve such a problem, according to the present invention, in a substrate temperature control device for controlling the temperature of a substrate, the first region is set by dividing the substrate into a plurality of regions, and It is controlled so as to give an arbitrary temperature difference to the second region set by dividing into regions.

【0008】基板面を同一温度のときの処理結果が異な
る複数領域に領域分けして設定した第1の領域と第2の
領域との間に任意の温度差を与えることにより、基板全
面がほぼ均一に処理されて、基板面に対する処理結果を
基板全面に亘つて均一化することができる。
By giving an arbitrary temperature difference between the first region and the second region, which are set by dividing the substrate surface into a plurality of regions having different processing results at the same temperature, almost the entire surface of the substrate is By uniformly processing, the processing result on the substrate surface can be made uniform over the entire surface of the substrate.

【0009】[0009]

【発明の実施の形態】以下図面について、本発明の一実
施例を詳述する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

【0010】図1は全体として温度制御装置としてのマ
イクロ波プラズマエツチヤ10を示し、基板としてのシ
リコン半導体ウエハ全面を均一にエツチングする。マイ
クロ波プラズマエツチヤ10は、プラズマ室11に導入
した水素ガスや窒素ガスを、プラズマ室11上方のマグ
ネトロン12より導入したマイクロ波によつて励起して
プラズマ放電を起こす。マイクロ波プラズマエツチヤ1
0は、プラズマ室11の周囲に配されたコイル13によ
る磁界によつて、水素プラズマや窒素プラズマをプラズ
マ室11の下部に配されたエツチング室14内に導入す
る。
FIG. 1 shows a microwave plasma etcher 10 as a temperature control device as a whole, which uniformly etches the entire surface of a silicon semiconductor wafer as a substrate. The microwave plasma etcher 10 excites hydrogen gas or nitrogen gas introduced into the plasma chamber 11 by microwaves introduced from the magnetron 12 above the plasma chamber 11 to generate plasma discharge. Microwave plasma etcher 1
0 introduces hydrogen plasma or nitrogen plasma into the etching chamber 14 arranged in the lower part of the plasma chamber 11 by the magnetic field generated by the coil 13 arranged around the plasma chamber 11.

【0011】マイクロ波プラズマエツチヤ10は、エツ
チング室14下方に下部電極16が配されており、この
下部電極16を直流バイアス電源17によつて所定電位
にバイアスしている。マイクロ波プラズマエツチヤ10
は、水素プラズマや窒素プラズマを、下部電極16上に
載置された1枚のほぼ円盤形状のシリコン半導体ウエハ
1に照射する。
In the microwave plasma etcher 10, a lower electrode 16 is arranged below the etching chamber 14, and the lower electrode 16 is biased to a predetermined potential by a DC bias power supply 17. Microwave plasma etcher 10
Irradiates one substantially disk-shaped silicon semiconductor wafer 1 mounted on the lower electrode 16 with hydrogen plasma or nitrogen plasma.

【0012】このとき、マイクロ波プラズマエツチヤ1
0は、エツチング室14内にエツチング性及び堆積性を
有するエツチングガスが供給される。これによりマイク
ロ波プラズマエツチヤ10は、ウエハ1表面をウエハ1
面内方向と直交する方向にエツチングして、コンタクト
ホール等の段差部3をウエハ1表面に形成する。またマ
イクロ波プラズマエツチヤ10は、水素プラズマや窒素
プラズマとエツチングガスとの反応生成物2を段差部3
の側壁に堆積し、側壁がエツチングガスによつて過剰に
エツチングされることを抑える。
At this time, the microwave plasma etcher 1
At 0, an etching gas having an etching property and a deposition property is supplied into the etching chamber 14. This causes the microwave plasma etcher 10 to move the surface of the wafer 1 to the wafer 1
Etching is performed in a direction orthogonal to the in-plane direction to form a step portion 3 such as a contact hole on the surface of the wafer 1. Further, the microwave plasma etcher 10 causes the reaction product 2 of the hydrogen plasma or nitrogen plasma and the etching gas to pass through the step portion 3.
Is deposited on the side wall of the substrate and prevents the side wall from being excessively etched by the etching gas.

【0013】図2に示すように、下部電極16は、上面
の直径がウエハ1に比して少し大きい円盤状に形成され
ている。また下部電極16は、全体の直径のほぼ2/3 の
直径を有する中心電極部16Aと周辺電極部16Bとで
構成されている。周辺電極部16Bは、中心電極部16
Aと中心を共有するドーナツ状に形成され、内周壁が中
心電極部16Aの外周壁に嵌め込まれている。
As shown in FIG. 2, the lower electrode 16 is formed in a disc shape whose upper surface has a diameter slightly larger than that of the wafer 1. Further, the lower electrode 16 is composed of a central electrode portion 16A and a peripheral electrode portion 16B having a diameter of approximately 2/3 of the entire diameter. The peripheral electrode portion 16B is the center electrode portion 16
It is formed in a donut shape sharing the center with A, and the inner peripheral wall is fitted into the outer peripheral wall of the center electrode portion 16A.

【0014】中心電極部16A及び周辺電極部16B
は、それぞれ温度調節器18及び20によつて例えば温
水が供給されて温度が制御される。これにより、ウエハ
1は、中心電極部16A及び周辺電極部16B上にそれ
ぞれ載置している第1の領域としての中心部21と、第
2の領域としての周辺部22との温度がそれぞれ中心電
極部16A及び周辺電極部16Bによつて別個に制御さ
れる。
Center electrode portion 16A and peripheral electrode portion 16B
The temperature is controlled by, for example, supplying hot water by the temperature controllers 18 and 20, respectively. As a result, in the wafer 1, the temperatures of the central portion 21 as the first region and the peripheral portion 22 as the second region, which are respectively placed on the central electrode portion 16A and the peripheral electrode portion 16B, are centered. It is controlled separately by the electrode portion 16A and the peripheral electrode portion 16B.

【0015】以上の構成において、中心電極部16A及
び周辺電極部16Bは、温度がそれぞれ例えば30〔℃〕
及び20〔℃〕に制御されて、ウエハ1の中心部21と周
辺部22との間に10〔℃〕の温度差を生じさせる。これ
により、この温度差の分だけウエハ1の中心部21にお
ける反応生成物13の堆積速度が周辺部22に比して低
下し、中心部21及び周辺部22にそれぞれ形成される
段差部3の側壁に対するエツチング中の反応生成物2が
ほぼ均一な厚さに堆積する。
In the above structure, the central electrode portion 16A and the peripheral electrode portion 16B have a temperature of, for example, 30 [° C.].
And 20 [° C.] so that a temperature difference of 10 [° C.] is generated between the central portion 21 and the peripheral portion 22 of the wafer 1. As a result, the deposition rate of the reaction product 13 in the central portion 21 of the wafer 1 is reduced as compared with the peripheral portion 22 by the temperature difference, and the stepped portions 3 formed in the central portion 21 and the peripheral portion 22 respectively. The reaction product 2 during etching on the side wall is deposited to a substantially uniform thickness.

【0016】従つて、中心部21及び周辺部22のそれ
ぞれの段差部3の側壁がウエハ1面内方向と直交する形
状にエツチングされる。結果として、ウエハ1の全面に
亘つてほぼ段差部3の側壁を同一の均一な形状にエツチ
ングすることができることになる。
Accordingly, the side walls of the step portions 3 of the central portion 21 and the peripheral portion 22 are etched into a shape orthogonal to the in-plane direction of the wafer 1. As a result, it is possible to etch the side wall of the step portion 3 into the same uniform shape over the entire surface of the wafer 1.

【0017】以上の構成によれば、同一温度のときの反
応生成物2の堆積状態が異なるウエハ1の中心部21と
周辺部22との間に、中心電極部16A及び周辺電極部
16Bによつて任意の温度差を与えるように制御するこ
とにより、エツチング中の反応生成物2がウエハ1全面
に亘つてウエハ1面上の段差部3の側壁に均一な厚さに
堆積して、ウエハ1面をエツチングして形成する段差部
3の側壁形状をウエハ1全面に亘つて均一化することが
できる。
According to the above configuration, the central electrode portion 16A and the peripheral electrode portion 16B are provided between the central portion 21 and the peripheral portion 22 of the wafer 1 in which the deposition state of the reaction product 2 at the same temperature is different. The reaction product 2 during etching is deposited over the entire surface of the wafer 1 to a uniform thickness on the side wall of the step portion 3 on the surface of the wafer 1 by controlling so as to give an arbitrary temperature difference. The side wall shape of the step portion 3 formed by etching the surface can be made uniform over the entire surface of the wafer 1.

【0018】なお上述の実施例においては、ウエハ1を
中心部21及び周辺部22でなる2つの領域に領域分け
して温度を制御する場合について述べたが、本発明はこ
れに限らず、例えば同心円状に3つ以上の領域に領域分
けして温度を制御する場合にも適用し得る。この場合に
も上述と同様の効果を得ることができる。
In the above-described embodiment, the case where the wafer 1 is divided into the two regions consisting of the central portion 21 and the peripheral portion 22 to control the temperature has been described, but the present invention is not limited to this, and for example, It can also be applied to the case where the temperature is controlled by concentrically dividing into three or more regions. In this case, the same effect as described above can be obtained.

【0019】また上述の実施例においては、本発明をウ
エハ1面をエツチングするマイクロ波プラズマエツチヤ
10に適用する場合について述べたが、本発明はこれに
限らず、ウエハをCVD処理するCVD処理装置等、任
意の基板に設定した複数領域相互間に任意の温度差を与
えるように温度を制御して任意に処理する場合にも広く
適用できる。
Further, in the above-described embodiment, the case where the present invention is applied to the microwave plasma etcher 10 for etching the surface of the wafer 1 is described, but the present invention is not limited to this, and the CVD process for performing the CVD process on the wafer The present invention can be widely applied to the case where the temperature is controlled so as to give an arbitrary temperature difference between a plurality of regions set on an arbitrary substrate, such as an apparatus, and arbitrary treatment is performed.

【0020】さらに上述の実施例においては、温度調節
器18及び20によつてウエハ1の中心部21と周辺部
22との間にある温度差を与える場合について述べた
が、本発明はこれに限らず、例えば、中心部においてヒ
ータの密度を高くし、周辺部においてヒータの密度を下
げることによつて、中心部と周辺部との間に任意の温度
差を与える場合にも適用できる。
Further, in the above-described embodiment, the case where a temperature difference between the central portion 21 and the peripheral portion 22 of the wafer 1 is given by the temperature controllers 18 and 20 has been described. Not limited to this, for example, by increasing the density of the heaters in the central portion and decreasing the density of the heaters in the peripheral portion, it can be applied to a case where an arbitrary temperature difference is provided between the central portion and the peripheral portion.

【0021】[0021]

【発明の効果】上述のように本発明によれば、基板面を
同一温度のときの処理結果が異なる複数領域に領域分け
して設定した第1の領域と第2の領域との間に任意の温
度差を与えることにより、基板全面がほぼ均一に処理さ
れて、基板面に対する処理結果を基板全面に亘つて均一
化し得る基板温度制御装置を実現することができる。
As described above, according to the present invention, the substrate surface is divided into a plurality of regions having different processing results at the same temperature, and the region is set between the first region and the second region. It is possible to realize a substrate temperature control device in which the entire surface of the substrate is processed substantially uniformly by providing the temperature difference of 1, and the processing result for the surface of the substrate can be made uniform over the entire surface of the substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による基板温度制御装置の一実施例によ
るマイクロ波プラズマエツチヤを示す略線図である。
FIG. 1 is a schematic diagram showing a microwave plasma etcher according to an embodiment of a substrate temperature control device of the present invention.

【図2】下部電極の説明に供する略線的側面図及び略線
的上面図である。
FIG. 2 is a schematic side view and a schematic top view for explaining a lower electrode.

【図3】段差部の壁面に対する反応生成物の堆積状態を
示す略線図である。
FIG. 3 is a schematic diagram showing a deposition state of reaction products on a wall surface of a step portion.

【符号の説明】[Explanation of symbols]

1……ウエハ、2……反応生成物、3……段差部、10
……マイクロ波プラズマエツチヤ、11……プラズマ
室、12……マグネトロン、13……コイル、14……
エツチング室、16……下部電極、16A……中心電極
部、16B……周辺電極部、17……直流バイアス電
源、18、20……温度調節器、21……ウエハ中心
部、22……ウエハ周辺部。
1 ... Wafer, 2 ... Reaction product, 3 ... Step portion, 10
…… Microwave plasma etcher, 11 …… Plasma chamber, 12 …… Magnetron, 13 …… Coil, 14 ……
Etching chamber, 16 ... Lower electrode, 16A ... Center electrode part, 16B ... Peripheral electrode part, 17 ... DC bias power supply, 18, 20 ... Temperature controller, 21 ... Wafer center part, 22 ... Wafer Peripheral area.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】基板の温度を制御する基板温度制御装置に
おいて、 上記基板を複数領域に領域分けして設定した第1の領域
と、当該領域分けして設定した第2の領域との間に任意
の温度差を与えるように温度制御することを特徴とする
基板温度制御装置。
1. A substrate temperature control device for controlling the temperature of a substrate, wherein the substrate is divided into a plurality of regions and set between a first region and a second region set by dividing the region. A substrate temperature control device characterized in that the temperature is controlled so as to give an arbitrary temperature difference.
【請求項2】上記第1の領域を第1の温度に制御する第
1の温度制御手段と、上記第2の領域を第2の温度に制
御する第2の温度制御手段とを有し、上記第1及び第2
の温度により上記任意の温度差を与えることを特徴とす
る請求項1に記載の基板温度制御装置。
2. A first temperature control means for controlling the first area to a first temperature, and a second temperature control means for controlling the second area to a second temperature. The first and second
2. The substrate temperature control device according to claim 1, wherein the arbitrary temperature difference is given by the temperature of.
【請求項3】上記基板温度制御装置は、上記基板面を任
意に処理する基板処理装置であることを特徴とする請求
項1に記載の基板温度制御装置。
3. The substrate temperature control device according to claim 1, wherein the substrate temperature control device is a substrate processing device that arbitrarily processes the substrate surface.
【請求項4】上記処理は、 上記基板を処理室内に収納し、当該処理室内に導入した
所定気体によつて上記基板をエツチングするエツチング
処理であることを特徴とする請求項3に記載の基板温度
制御装置。
4. The substrate according to claim 3, wherein the process is an etching process in which the substrate is housed in a processing chamber and the substrate is etched by a predetermined gas introduced into the processing chamber. Temperature control device.
【請求項5】上記第1の領域は、上記基板の中心部であ
り、 上記第2の領域は、上記中心部を囲むよう設定された上
記基板の周辺部であり、 上記中心部の温度を上記周辺部の温度に比して上記任意
の温度差だけ高く制御することを特徴とする請求項1に
記載の基板温度制御装置。
5. The first region is a central portion of the substrate, the second region is a peripheral portion of the substrate set so as to surround the central portion, and the temperature of the central portion is controlled. The substrate temperature control device according to claim 1, wherein the temperature is controlled to be higher than the temperature of the peripheral portion by the arbitrary temperature difference.
JP12646696A 1996-04-23 1996-04-23 Substrate temperature control device Pending JPH09289200A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12646696A JPH09289200A (en) 1996-04-23 1996-04-23 Substrate temperature control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12646696A JPH09289200A (en) 1996-04-23 1996-04-23 Substrate temperature control device

Publications (1)

Publication Number Publication Date
JPH09289200A true JPH09289200A (en) 1997-11-04

Family

ID=14935925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12646696A Pending JPH09289200A (en) 1996-04-23 1996-04-23 Substrate temperature control device

Country Status (1)

Country Link
JP (1) JPH09289200A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5360069B2 (en) * 2008-11-18 2013-12-04 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing method
US9263298B2 (en) 2008-02-27 2016-02-16 Tokyo Electron Limited Plasma etching apparatus and plasma etching method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9263298B2 (en) 2008-02-27 2016-02-16 Tokyo Electron Limited Plasma etching apparatus and plasma etching method
JP5360069B2 (en) * 2008-11-18 2013-12-04 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing method

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