JPH09284760A - Coding and decoding device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a coding and decoding device by which only data of a reduced image are easily discriminated and a receiver side system is simplified. SOLUTION: A reduction circuit 12 of the coder applies sub-sampling to an original image to generate the reduced image from an original image, a difference circuit 13 magnifies the reduced image into the original size to obtain the magnified image and generates a difference image by subtracting the magnified image from the original image. Then an encode circuit 14 applies coding to the reduced image data and the difference image data in a ratio of 1: (N-1) respectively. Furthermore, a multiplexer circuit 15 applies time division multiplexing to the reduced image data and the difference image data outputted from the encode circuit 14 so that the reduced image data appears at a period of N. A decoder applies 1/N frequency division to a transmission clock and the reception system is operated by the clock signal subject to 1/N frequency division to allow the decoder to decode on the code data of the reduced image.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coding / decoding apparatus suitable for transmitting and receiving a plurality of images of different sizes, especially reduced images, by using spatial scalability.

[0002]

2. Description of the Related Art Conventionally, as means for encoding information signals such as video and audio signals, MPEG (Mov-ing Picture Codi
There is an encoding method by ng Experts Group). For example, M
PEG2 is a media-integrated video compression standard that can be used in a wide range of fields such as computers, broadcasting, and communication.
It can be applied to high-definition television such as digital HDTV.

In MPEG2, an encoding method using spatial scalability (called hierarchical encoding) is prepared. In the encoding method using spatial scalability, a reduced image (called a base layer), The reduced image can be enlarged, divided into a difference image obtained by taking the difference from the original image, encoded, and transmitted.

On the receiving side, the reduced image is decoded and the image is reproduced by enlarging it and adding it to the difference image. This spatial scalability has advantages such as good coding efficiency when sending a plurality of images of different sizes at the same time and sending rough information of the entire image in a short time.

By the way, when data is transmitted in this spatial scalability, conventionally, a reduced image and a difference image are transmitted in small units such as packets. In other words, a part of the data is divided, a header indicating that it is a reduced image or a difference image is attached to this, and a plurality of unit data are mixed and continuously transmitted in time series. Therefore,
The reduced and differential data are irregularly mixed and transmitted. Therefore, on the receiving side, after checking the header of each data one by one, if it is a reproducing device only for the reduced image, only the reduced image is transmitted. In the case of a reproducing apparatus for reproducing a large image, the reduced image is enlarged and added to the difference image to obtain the original reproduced image.

In this way, when each of the reduced and differential data encoded by using the MPEG spatial scalability is transmitted, the receiving side reproduces only the reduced image from the transmitted data. It was necessary to receive all the data, confirm the contents, and separate the contents, and a high capability was required for the receiving device.

[0007]

As described above, conventionally,
Even when reproducing only the reduced image from the transmitted data, it is necessary to receive all the data and check the contents while distinguishing between the reduced image and the difference image, and the receiving side needs a high capability. .

In view of the above problems, it is an object of the present invention to provide a coding / decoding device that can easily classify only reduced image data and can simplify the receiving side device. Is.

[0009]

According to a first aspect of the present invention, there is provided an encoding apparatus which reduces an original image and reduces the original image by expanding the reduced image to an original size. And a encoding means for encoding each data obtained from the reduction means and the difference means so as to have a ratio of 1 to (N-1) (N is an integer of 2 or more). The present invention is characterized by further comprising: a multiplexing unit that multiplexes each data from the encoding unit so that the data of the reduced image appears in the cycle N.

According to a second aspect of the present invention, there is provided a device for decoding the data coded and multiplexed by the encoding device according to the first aspect, wherein the received multiplexed data is divided into reduced data and differential data. The dividing means, the first decoding means for reproducing a reduced image from the reduced data, the reproduced reduced image is enlarged to its original size, and the enlarged image and the reproduced difference image of the difference data from the dividing means are used as the original. And a second decoding means for reproducing an image of the size.

According to a third aspect of the present invention, there is provided an apparatus for decoding the data encoded and multiplexed by the encoding apparatus according to the first aspect, wherein the transmission clock of the received multiplexed data is divided by N. Means for separating reduced data from the received multiplexed data using the clock divided by N of the dividing means, and decoding means for reproducing a reduced image from the reduced data. To do.

An encoding device according to a fourth aspect of the invention is
A means for performing sub-sampling so that the original image is divided into N reduced images of 1 / N size (N is an integer of 2 or more), and the 1 / N size image is encoded to have the same size. Means and means for alternately multiplexing the encoded data are provided.

The decoding device according to the invention of claim 5 is
An apparatus for decoding data coded and multiplexed by the encoding apparatus according to claim 4, wherein the received multiplexed data is divided into each divided image, and the divided data is divided into A decoding unit for reproducing an image reduced to / N size, and a synthesizing unit for sequentially reading and composing data constituting each reproduced 1 / N size image to obtain a reproduced image of the original size. It is characterized by having.

A decoding device according to the invention of claim 6 is
5. An apparatus for decoding data coded and multiplexed by the encoding apparatus according to claim 4, wherein the frequency division means divides the transmission clock of the received multiplexed data by N, and the received multiplexed data is used for the division. Dividing means for dividing the divided data using the clock divided by N of the dividing means,
And a decoding unit for reproducing a reduced image of 1 / N size from the divided data.

In the encoding apparatus according to the first aspect of the present invention, the reducing means subsamples the original image to generate reduced data from the original image, and the difference means expands the reduced data to the original size. Difference data is generated by obtaining an enlarged image and subtracting the enlarged image from the original image. Then, the encoding means encodes the reduced data and the differential data so that the ratio becomes 1 to (N-1). Further, the multiplexing means multiplexes the reduced data and the difference data output from the encoding means in time division so that the reduced data appears in the cycle N and transmits the multiplexed data. As described above, when transmitting the reduced data and the differential data in a mixed manner, the time-sequential arrangement of the reduced data and the differential data has a regularity. The reduced data and the difference data can be easily separated.

In the decoding device according to the second aspect of the present invention, the multiplexed data composed of the reduced data and the difference data sent from the encoding device according to the first aspect is based on the transmission clocks sent at the same time. It is divided into reduced data and difference data by using the created division signal. The cut-out reduced data is reproduced as a reduced image by using the first decoding means, and the second decoding means enlarges the reduced image from the first decoding means, and the enlarged image and the dividing means. An image having the same size as the original image is reproduced by adding the difference image reproduced from the difference data.

The division signal is a signal for dividing the reduced data and the difference data appearing in the cycle N, and is created based on the transmission clock having the same cycle as the data.

In the decoding device according to the third aspect of the present invention, the dividing means divides the multiplexed data sent from the encoding device according to the first aspect into a clock obtained by dividing the transmission clock sent at the same time by N. By reading using
Only reduced data is extracted from the multiplexed data. The extracted reduced data is supplied to the decoding means to reproduce the reduced image. The division signal in this case is a signal for dividing the reduced data appearing in the cycle N, and is created by dividing the transmission clock having the same cycle as the data by N.

In the encoding apparatus according to the fourth aspect of the invention, the sub-sampling means sub-samples the original image so as to divide it into N 1 / N size images. The image data divided into N 1 / N size images by the sub-sampling means are encoded by the encoding means so as to have the same code amount. Then, the multiplexing unit alternately multiplexes the image data of each 1 / N size encoded to the same code amount. By doing this,
The image data of each 1 / N size will appear alternately in the multiplexed data at the cycle N. In the decoding device, reduced image data can be obtained by cutting and decoding the sub-sampling data that appears in each cycle N.

In the decoding device according to the fifth aspect of the present invention, the separating means extracts the multiplexed data from the encoding device according to the fourth aspect for each transmission clock in the time axis direction and for each image. And the decoding means decodes each of the N-divided data into 1 / N
Play a size image. The synthesizing unit sequentially reads the N pieces of image data decoded by the decoding unit from the decoding unit by using the transmission clock, writes them in the memory, and synthesizes them to output as a reproduced image.

In the decoding device according to the sixth aspect of the invention, the dividing means divides the multiplexed data transmitted from the encoding device of the fourth aspect from the transmission clock transmitted at the same time by N. By reading using
It is possible to extract 1 / N size data from the multiplexed data. The extracted 1 / N size image data is supplied to the decoding means, and only the reduced image is reproduced.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an encoding device according to a first embodiment of the present invention.

In FIG. 1, data of an original image is input to an input terminal 11, and a reducing circuit 12 and a difference circuit 13 are provided.
Is supplied to. The reduction circuit 12 is a circuit that reduces the original image, and is, for example, a circuit that subsamples the original image. The difference circuit 13 enlarges the image reduced by the reduction circuit 12 and outputs the difference from the original image. The image data output from the reduction circuit 12 and the difference circuit 13 are
It is input to the encoding circuit 14. Encoding circuit 14
Is a circuit that encodes each image data output from the reduction circuit 12 and the difference circuit 13 and then encodes the image data so as to have a ratio of 1 to (N−1) (N is an integer of 2 or more). For example, when encoded using MPEG2, dummy data is added to adjust the code amount, and when converted into serial data for transmission (time division multiplexed data described later), the code amount of the reduced data and the difference data is 1 The ratio should be (N-1). The reduced data and the difference data in the ratio of 1 to (N−1) from the encoding circuit 14 are input to the multiplexing circuit 15. The multiplexing circuit 15
The reduced image data is multiplexed so that it appears in a cycle N (one for every N), and the multiplexed data is output to the output terminal 16.

Next, the operation of the apparatus shown in FIG. 1 will be described with reference to FIG. As shown in FIG. 2A, the reduction circuit 12
Generates a reduced image from the original image by sub-sampling the original image with, and the difference circuit 13 enlarges the reduced image to the original size to obtain an enlarged image, and subtracts the enlarged image from the original image to obtain the difference. Generate an image. Then, in the encoding circuit 14, as shown in FIG. 2B, the reduced data of the reduced image and the difference data of the difference image are encoded so as to have a ratio of 1 to (N-1). here,
The case where N = 4 is described. Further, in the multiplexing circuit 15, as shown in FIG.
The reduced image code data (a1, a2, a
3, ...) and the coded data (b1, b2, b3,
...) and the reduced image code data (a1, a2, a3,
...) appears in the cycle N, and is multiplexed by time division. When encoding audio, the audio data can be reproduced at the same time by including the audio data in the reduced data even when only the reduced data is decoded by the decoding device.

FIG. 3 is a block diagram showing a decoding device according to the first embodiment of the present invention. This decoding device is for decoding the data coded and multiplexed by the coding device of FIG.

In FIG. 3, the input terminal 21 receives the multiplexed data from the encoder of FIG. The input multiplexed data is supplied to the separation circuit 23. Also,
The transmission clock transmitted together with the multiplexed data is input to the input terminal 22. The dividing circuit 23 divides the received multiplexed data into reduced data and difference data using a dividing signal. The division signal is a signal having a cycle of N and having a ratio of a low level period and a high level period of 1: (N-1). Actually, in the dividing circuit 23, 1 is set in the cycle N.
The division signal is generated so as to be activated for the data, and the reduced timing divided by the first decoding circuit 24 at the next stage can be reproduced normally by changing the activation timing until the reduction data is normally reproduced. It is generated by fixing the timing at the position. The reduced data and the difference data thus divided are input to the first decoding circuit 24 and the second decoding circuit 25, respectively.

The first decoding circuit 24 reproduces a reduced image from the reduced data and outputs it from the output terminal 26. Second
The decoding circuit 25 enlarges the reproduced reduced image to the original size, reproduces the image of the original size from the enlarged image and the reproduction difference image of the difference data from the dividing circuit 23, and outputs from the output terminal 27. Output.

Next, the operation of the apparatus shown in FIG. 3 will be described with reference to FIG. FIG. 4 sent from the encoding device of FIG.
The multiplexed data shown in (a) is obtained by using the division signal (see Fig. 4 (c)) created based on the transmission clocks (see Fig. 4 (b)) sent at the same time, as shown in Fig. 4 (d). As shown in, the data is divided into reduced data and difference data. The cut-out reduced data is reproduced into a reduced image as shown in FIG. 4 (e) by using the first decoding circuit 24. In the second decoding circuit, the reduced image from the first decoding circuit 24 is enlarged, and the enlarged image and the difference image obtained by reproducing the difference data from the dividing circuit 23 are added together to have the same size as the original image. Play the image.

FIG. 5 is a block diagram showing a decoding device according to the second embodiment of the present invention. This decoding device is for decoding the data coded and multiplexed by the coding device of FIG.

In FIG. 5, the multiplexed data from the encoder of FIG. 1 is input to the input terminal 21. The input multiplexed data is supplied to the dividing circuit 23A. The transmission clock transmitted together with the multiplexed data is input to the input terminal 22. The transmission clock is divided by N using the N dividing circuit 28 and supplied to the dividing circuit 23A. Here, the phase of the N-divided clock output from the N-divider circuit 28 is changed until the decoded circuit 24 normally reproduces the reduced image, and is fixed at a position where normal reproduction is possible. The dividing circuit 23A can extract only the reduced data by reading the received multiplexed data using the clock divided by N.
The reduced data extracted by the dividing circuit 23A is reproduced into a reduced image by the decoding circuit 24 and output from the output terminal 26.

Next, the operation of the apparatus shown in FIG. 5 will be described with reference to FIG. The division circuit 23A divides the multiplexed data shown in FIG. 6 (a) sent from the encoding apparatus of FIG. 1 by N from the transmission clock (see FIG. 6 (b)) sent at the same time. 6 (c)), only the reduced data (a1, a2, a3, ...) Is extracted from the multiplexed data as shown in FIG. 6 (d). The extracted reduced data is supplied to the decoding circuit 24,
Here, a reduced image as shown in FIG. 6 (e) is reproduced.

In the embodiment of FIG. 5, the transmission clock is N
Since the reduced data is divided by using the clock with the frequency divided and divided by N, the oscillation frequency of the necessary operation clock can be reduced to 1 / N, power consumption can be suppressed, and peripheral devices can be suppressed. On the other hand, it is also possible to prevent high frequency interference, and the receiving side device can be structurally simplified.

FIG. 7 is a block diagram showing an encoding apparatus according to the second embodiment of the present invention.

In FIG. 7, the data of the original image is input to the input terminal 31 and supplied to the sub-sampling circuit 32. The sub-sampling circuit 32 outputs the original image to 1 / N
Subsampling is performed so that the image is divided into N reduced images (N is an integer of 2 or more). However,
FIG. 7 illustrates the case where N = 4. The N subsampled 1 / N size reduced images are input to the encoding circuit 33. The encoding circuit 33 encodes the 1 / N size N reduced images so as to have the same size (that is, the same code amount),
It is input to the multiplexing circuit 34. The multiplexing circuit 34 has the same 1
The image data encoded in the / N size is alternately multiplexed and output from the output terminal 35.

Next, the operation of the apparatus shown in FIG. 7 will be described with reference to FIG. The case of N = 4 will be described.

In the sub-sampling circuit 32, as shown in FIG.
Sub-sampling is performed so that the original image is divided into four 1/4 size images as shown in FIG. The image data divided into four 1/4 size images by the sub-sampling circuit 32 are respectively encoded by the encoding circuit 3 as shown in FIG. 8 (b).
3 are encoded so as to have the same code amount (1: 1: 1: 1). Then, in the multiplexing circuit 34, the image data of each 1/4 size encoded to the same code amount are alternately multiplexed as shown in FIG. 8 (c). By doing so, the image data of each 1/4 size appears alternately in the multiplexed data at cycle 4.

When the encoding circuit 33 simultaneously encodes the audio data, the four types of image data of 1/4 size are encoded by including different types of audio data, respectively, so that the audio data can be reproduced. The function of selecting can be added. Here, in order to add the audio data to the image data, four image data of 1/4 size (this image data is a reduced image obtained by sub-sampling the original image to 1/4, and is divided into four 1/4). Each image is the same in content), but four different types of audio data are successively added, respectively, and the same content is provided in correspondence with four image data of each 1/4 size. If you add audio data in four different languages such as Japanese, English, French, and German,
When any one of the four reduced images (all four have the same content) is selected and played back at the time of playback, it is possible to play the sound in the language of the type corresponding to the selected image. .

FIG. 9 is a block diagram showing a decoding device according to the third embodiment of the present invention. This decoding device is for decoding the data coded and multiplexed by the coding device of FIG. Here, a case where N = 4 will be described.

In FIG. 9, the multiplexed data from the encoder of FIG. 7 is input to the input terminal 41. The input multiplexed data is supplied to the separation circuit 43. Also,
The transmission clock transmitted together with the multiplexed data is input to the input terminal 42. The transmission clock is supplied to the dividing circuit 43. The dividing circuit 43 is a circuit that extracts the multiplexed data for each transmission clock in the time axis direction and divides it into four, and simply takes one from the top data in order and divides it into four groups. The decoding circuit 44 decodes each of the four divided data to
This is a circuit for reproducing a / 4 size image, and one decoding circuit may be used, for example, in a time division manner. Synthesis circuit 45
The four image data decoded by the decoding circuit 44 are sequentially read from the decoding circuit 44 by using the transmission clock, and are written in the memory to be combined. Here, in order to sequentially read out from the decoding circuit 44 when the screens are combined, it is necessary to determine which 1/4 size image corresponds to which pixel of the image of the same size as the original image. This can be done by observing the timing when the leading data of the 4-size image has arrived. In the synthesis circuit 45, the reproduced 1
The data forming each / 4 size image is sequentially read and combined, and is output to the output terminal 46 as a reproduced image.

FIG. 10 is a block diagram showing a decoding device according to the fourth embodiment of the present invention. This decryption device
The data is encoded and multiplexed by the encoder of FIG. 7. Here, a case where N = 4 will be described.

In FIG. 10, the input terminal 41 receives the multiplexed data from the encoding device of FIG. The input multiplexed data is supplied to the separation circuit 43A. The transmission clock transmitted together with the multiplexed data is input to the input terminal 42. The transmission clock is frequency-divided by 4 using the frequency-dividing circuit 47 and supplied to the dividing circuit 43A and the decoding circuit 44. Here, the divide-by-four circuit 47 generates four divide-by-four clocks having different phases for each cycle of the transmission clock. The isolation circuit 43A is
The multiplexed data is read by using four divided-by-four clocks having different phases to divide the multiplexed data into four in the time axis direction. The decoding circuit 44 is a circuit that decodes the four-divided data by using the four divided-by-four clocks, respectively, and reproduces four 1 / 4-size images. One decoding circuit is used, for example, in time division. It is also possible to do so. From the four output terminals 48, 49, 50 and 51 of the decoding circuit 44, four reproduced images of 1/4 size, that is, four reduced images are obtained.

Next, the operation of the apparatus shown in FIG. 10 will be described with reference to FIG. The dividing circuit 43A divides the multiplexed data shown in FIG. 11 (a) sent from the encoding device of FIG. 7 by 4 from the transmission clock (see FIG. 11 (b)) sent at the same time. 11 (c)), the 1/4 size data (a1) shown in FIG. 11 (d) is read from the multiplexed data shown in FIG. 11 (a).
, A2, a3, ...) can be extracted. Similarly,
By reading the multiplexed data using a clock as shown in FIG. 11 (e) that has a phase difference of two cycles of the transmission clock as the divided-by-four clock, the multiplexed data shown in FIG. 11 (a) can be read. The data (b1, b2, b3, ...) Of 1/4 size as shown in FIG. 11 (f) can be extracted. By reading the multiplexed data by using a clock as shown in FIG. 11 (g), which has a phase difference of 3 cycles of the transmission clock as a clock divided by 4, the multiplexed data shown in FIG. 11 (a) is read. To 1/4 as shown in Fig. 11 (h)
Size data (c1, c2, c3, ...) Can be extracted. One of the transmission clocks is used as the quarter clock
By reading the multiplexed data using the clock shown in FIG. 11 (i), which is different in phase by the period,
From the multiplexed data shown in (a), it is possible to extract 1/4 size data (d1, d2, d3, ...) As shown in FIG. 11 (j).

The four extracted 1/4 size image data are supplied to the decoding circuit 44 to reproduce four reduced images and output from the output terminals 48, 49, 50 and 51, respectively.

In the encoding circuit in the encoding apparatus of FIG. 7, when four different types of audio data are added after each of the four image data reduced to 1/4 size (for example, 4 of each 1/4 size
In the case where voice data in four different languages such as Japanese, English, French, and German are added to correspond to one image data), the data is reproduced by the decoding circuit 44 in the decoding device as shown in FIG. At times, if any one of the four reduced images (they have the same content) can be selectively reproduced, a different type is selected each time one of the four images is selected. You can select and listen to the audio in the language.

FIG. 12 is a block diagram showing a decoding device according to the fifth embodiment of the present invention. This decryption device
This is for decoding the data coded and multiplexed by the encoding device of FIG. 7, and can be said to be a modification of the decoding device of FIG. Here, a case where N = 4 will be described.

In FIG. 12, multiplexed data from the encoding device of FIG. 7 is input to the input terminal 41. The input multiplexed data is supplied to the separation circuit 43A. The transmission clock transmitted together with the multiplexed data is input to the input terminal 42. The transmission clock is frequency-divided by 4 using the frequency-dividing circuit 47 and supplied to the dividing circuit 43A and the decoding circuit 44. Here, the divide-by-four circuit 47 generates one type of divide-by-4 clock having a different phase for one cycle of the transmission clock. Isolation circuit 43A
Can read and output one of the 1/4 size image data by reading the multiplexed data using the one type of divide-by-four clock. Decoding circuit 44
Uses the one type of divide-by-four clock to reproduce the 1/4 size image data output from the dividing circuit 43A. From the output terminal 48 of the decoding circuit 44, 1 /
It is possible to reproduce one 4-size reproduced image, that is, a reduced image.

In the embodiments shown in FIGS. 10 and 12, the transmission clock is divided by N, and the reduced data is divided by using the clock having a cycle divided by N. Therefore, the oscillation frequency of the necessary operation clock is reduced to 1 / N. It is possible to reduce the power consumption, reduce power consumption, prevent high-frequency interference with peripheral devices, and structurally simplify the receiving side device.

[0048]

As described above, according to the present invention, the transmission clock from the encoding device is divided by N, and the receiving side device is operated by the N-divided clock, whereby the encoded data of the reduced image is obtained. For example, in small portable devices that need to reproduce only reduced images, it is possible to reduce power consumption and reduce high-frequency noise to peripheral devices. It is also possible to prevent unnecessary interference, and the structure of the receiving side device can be simplified.

[Brief description of drawings]

FIG. 1 is a block diagram showing an encoding device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram explaining an operation of the apparatus of FIG.

FIG. 3 is a block diagram showing a decoding device according to the first embodiment of the present invention.

FIG. 4 is an explanatory view explaining the operation of the apparatus of FIG.

FIG. 5 is a block diagram showing a decoding device according to a second embodiment of the present invention.

FIG. 6 is an explanatory view explaining the operation of the apparatus of FIG.

FIG. 7 is a block diagram showing an encoding device according to a second embodiment of the present invention.

FIG. 8 is an explanatory view explaining the operation of the apparatus of FIG.

FIG. 9 is a block diagram showing a decoding device according to a third embodiment of the present invention.

FIG. 10 is a block diagram showing a decoding device according to a fourth embodiment of the present invention.

11 is an explanatory diagram explaining the operation of the apparatus of FIG.

FIG. 12 is a block diagram showing a decoding device according to a fifth embodiment of the present invention.

[Explanation of symbols]

12 ... Reduction circuit, 13 ... Difference circuit, 14 ... 1: (N-1) encoding circuit, 15 ... Multiplexing circuit, 22 ... Transmission clock input terminal, 23, 23A ... Separation circuit, 24, 25 ...
Decoding circuit, 28 ... N dividing circuit, 32 ... Sub sampling circuit, 33 ... 1: 1: 1: 1 encoding circuit, 34 ...
Multiplexing circuit, 43, 43A ... Separation circuit, 44 ... Decoding circuit, 45 ... Synthesis circuit, 46 ... Reproduced image output terminal,
47 ... Divider circuit, 48 ... Reduced image output terminal.

Claims (6)

[Claims] 1. A reduction means for reducing an original image, a difference means for expanding the reduced image to an original size and outputting a difference from the original image, the reduction means and the difference means. Encoding means for encoding each data obtained from the above so as to have a ratio of 1 to (N-1) (N is an integer of 2 or more); An encoding device, comprising: a multiplexing unit that multiplexes so as to appear in a cycle N. 2. A code by the encoding device according to claim 1,
An apparatus for decoding multiplexed data, comprising: a dividing means for dividing the received multiplexed data into reduced data and difference data; first decoding means for reproducing a reduced image from the reduced data; Decoding comprising a reduced image enlarged to the original size, and second decoding means for reproducing the image of the original size from the enlarged image and the reproduction difference image of the difference data from the dividing means. Device. 3. A code by the coding device according to claim 1,
An apparatus for decoding multiplexed data, comprising: a dividing unit for dividing a transmission clock of received multiplexed data by N; and a clock divided by N of the dividing unit from the received multiplexed data. A decoding device comprising: a dividing unit that divides reduced data by using it, and a decoding unit that reproduces a reduced image from the reduced data. 4. A means for performing sub-sampling so that an original image is divided into N reduced images of 1 / N size (N is an integer of 2 or more), and the 1 / N size image has the same size. An encoding device comprising means for encoding so as to and means for alternately multiplexing encoded data. 5. A code by the encoding device according to claim 4,
A device for decoding multiplexed data, which divides the received multiplexed data into divided images, and reproduces an image reduced to 1 / N size from each divided data. A decoding device comprising: a decoding unit for reproducing the reproduced image of 1 / N size, and a synthesizing unit for sequentially reproducing and synthesizing data constituting each image of 1 / N size. 6. A coding device according to claim 4,
An apparatus for decoding multiplexed data, comprising: a dividing unit for dividing a transmission clock of received multiplexed data by N; and a clock divided by N of the dividing unit from the received multiplexed data. A decoding device comprising: a dividing means for dividing the divided data by using the dividing means, and a decoding means for reproducing a 1 / N size reduced image from the divided data.