JPH09284597A - Shading correction circuit for television camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain miniaturization and to reduce the cost by adding a sawtooth pulse with a negative slope in the amplitude in response to a voltage difference of black levels at upper and lower parts of a screen to a dark current component of a video signal so as to reduce the effect of the dark current thereby compensating the shading. SOLUTION: A video signal S1 from a CCD image pickup element 1 of the inter-line frame transfer system includes a dark current component causing shading in an output signal S4. An adder circuit 2 adds a correction use sawtooth pulse P from a correction use sawtooth pulse generating circuit 14 to the video signal S1 and provides an output of the resulting video signal to a video amplifier 3. The correction use sawtooth pulse P has a negative slope of an amplitude in response to a voltage difference of levels of optically black parts at upper and lower parts of a screen and added to a positive slope of the dark current component of the video signal S1 to reduce the effect of the dark current. Thus, the output signal whose dark current component to cause shading is compensated is obtained. Thus, miniaturization and cost reduction are attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a shading correction circuit for a television camera using a solid-state image pickup device such as an interline frame transfer type CCD.

[0002]

2. Description of the Related Art Conventionally, a television camera using an interline frame transfer type CCD image pickup device has been used (Japanese Patent Publication No. 62-5298).
No. 8). The configuration and operation of this interline frame transfer type CCD image sensor will be described below.

First, the construction of this interline frame transfer type CCD image pickup device will be described. As shown in a part of FIG. 4, the CCD image pickup device 100 of the interline frame transfer system includes a pixel 101
, The first vertical CCD register 102, the transfer gate 103, the charge absorption unit 104, and the second vertical CC.
D register 105 and horizontal CCD output register 106
And an output device 107.

Next, the connection relationship will be described. This interline frame transfer type CCD image pickup device 10
As shown in part in FIG. 4, reference numeral 0 denotes a pixel 101 which is a p-type semiconductor substrate and has a pn junction with the main surface on the light-receiving side of the substrate and which is composed of a photoelectric conversion element for accumulating signal charges by incident light
Are arranged in a matrix. This pixel 1
A first vertical CCD register 102 is formed in close proximity to each column of 01. A transfer gate 103 is provided between the pixel 101 and the first vertical CCD register 102. A charge absorbing portion 104 is provided so as to be connected to one end portion of the first vertical CCD register 102. One end of the second vertical CCD register 105 is provided so as to be connected to the other end of the first vertical CCD register 102. The second vertical CCD register 105 functions as a charge storage unit, and the number of bits of the second vertical CCD register 105 is approximately the same as the number of bits of the first vertical CCD register 102. The other end of the second vertical CCD register 105 is connected to the horizontal CCD output register 106, and the end of the horizontal CCD output register 106 is connected to the output device 107. A portion other than the pixel 101 that performs photoelectric conversion is light-shielded by aluminum.

The operation of the CCD image pickup device 100 of the interline frame transfer system thus configured will be described. First, the CCD output video signal will be described. The CCD output video signal has a periodic structure in frame units. One frame consists of two fields, an A field and a B field, and is interlaced. One field consists of a vertical scanning period and a vertical blanking period, and the vertical scanning period is composed of many horizontal scanning periods. This horizontal scanning period includes a horizontal effective period in which an effective output video signal exists and a horizontal retrace line period.

The transfer gate 103 is turned on for a part of the vertical blanking period. The signal charge accumulated in the pixel 101 when the transfer gate 103 is turned on is the first vertical CCD register 1
02, and the potential of the pixel 101 is set by the channel potential of the transfer gate 103. When the transfer gate 103 is turned off, the pixel 101 accumulates signal charges according to incident light. When the signal charge is accumulated, the potential of the pixel 101 becomes small. Next, signal charges are accumulated until the transfer gate 103 is turned on.

On the other hand, the signal charges transferred to the first vertical CCD register 102 are transferred from the first vertical CCD register 102 to the second vertical CCD during the vertical blanking period after the transfer gate 103 is turned off. It is transferred at high speed to the CCD register 105. In the vertical scanning period, one bit is transferred from the second vertical CCD register 105 to the horizontal CCD output register 106 in the horizontal blanking period, and the signal charges are transferred from the respective second vertical CCD registers 105 to the horizontal CCD output register 106.
During the horizontal effective period, the signal charges transferred to the horizontal CCD output register 106 are sequentially transferred to the output device 107 by the horizontal CCD output register 106 and output as a CCD output video signal. Similar driving is performed in the next horizontal scanning period. The signal charges accumulated in the pixels 101 arranged two-dimensionally in this way are sequentially read out.

On the other hand, during the vertical scanning period, all the electrodes of the first vertical CCD register 102 are kept in the ON state. In this state, the charges existing in the first vertical CCD register 102 move to the charge absorption unit 104 by diffusion,
Absorbed. Therefore, strong light is incident, a large number of charges are generated, the maximum accumulated charge amount of the pixel 101 is exceeded, and most of the outflow charges flowing into the adjacent first vertical CCD register 102 are in the first vertical CCD register. It moves to the charge absorption unit 104 by diffusion in 102 and is absorbed by the charge absorption unit 104.

However, in the CCD image sensor 100 of the interline frame transfer system, the signal charges are transferred from the first vertical CCD register 102 to the second vertical CCD register 105 at a high speed during the vertical blanking period. However, this signal charge is transferred from the second vertical CCD register 105 to the horizontal CCD output register 1
Since it is sequentially transferred to 06 over one vertical scanning period, a dark current proportional to the time of transfer to the horizontal CCD output register 106 is added to this signal charge,
This dark current changes in a sawtooth wave shape in one vertical scanning period, which causes dark shading. In particular, when the temperature of the CCD image pickup device 100 is, for example, 40 ° C. or higher, the dark current increases and dark shading becomes noticeable. Further, when the number of pixels 101 is increased and the quality is increased, the number of pixels 101 and its peripheral circuits increases, so that the pixels 101
The heat generated by itself and the heat generated from the peripheral circuits are increased by that much, and there is a disadvantage that the temperature rises and the occurrence of shading becomes remarkable.

Therefore, the applicant of the present invention generates a sawtooth wave signal having an amplitude and a vertical cycle which depends on the temperature in the vicinity of the position where the solid-state image pickup device 100 is arranged, and the sawtooth wave signal is solid-state imaged. Shading correction of a television camera capable of obtaining an output video signal without dark shading by combining with the CCD output video signal of the device 100 and compensating for the dark current of the CCD output video signal of the solid-state imaging device 100. A patent application for the circuit was filed (see Japanese Patent Laid-Open No. 2-288685). The configuration and operation of the conventional shading correction circuit of the television camera will be described below.

First, the structure of a conventional shading correction circuit of a television camera will be described. As shown in FIG. 4, the shading correction circuit of this television camera is an interline frame transfer type C
CD image sensor 100, temperature detection device 110, threshold circuit 119, and sawtooth wave signal generation circuit 12
It has 0, an adder circuit 109, and an output terminal 108.
The temperature detecting device 110 is a temperature detecting device 110 arranged in the vicinity of the CCD image pickup device 100, and the temperature detecting device 110 outputs a voltage inversely proportional to the temperature, for example. This output voltage is configured to be a zero voltage at 40 degrees C, for example. The threshold circuit 119 includes a diode 112 and resistors 113 and 111. The threshold circuit 119 outputs a constant voltage determined by the threshold voltage of the diode 112 at 40 ° C. and a negative voltage inversely proportional to temperature at 40 ° C. or higher. The sawtooth wave signal generation circuit 120 includes resistors 114 and 115 that divide the power supply voltage + B [V].
It has an input resistor 116, an operational amplifier circuit 118a and a capacitor 118b that form an integrating circuit, a switch 118c that is on / off controlled by a switching signal supplied to a switching signal input terminal 118d, and an output resistor 117.

Next, the operation of the shading correction circuit of this television camera will be described. Temperature detector 110
Outputs an output voltage that is inversely proportional to the temperature, for example, an output voltage that becomes a zero voltage at 40 degrees C. The output voltage inversely proportional to the temperature from the temperature detection device 110 is the resistance 11
1 is supplied to the non-inverting input terminal (+) of the operational amplifier circuit 118a that constitutes the integrating circuit of the sawtooth wave signal generating circuit 120. Here, the output voltage inversely proportional to the temperature from the temperature detection device 110 is 40 ° C. due to the diode 112 and the resistor 113 of the threshold circuit 119.
Is limited to a constant voltage determined by the threshold voltage of the diode 112, and is set to a negative voltage inversely proportional to the temperature at 40 ° C. or higher.

The power supply voltage + B [V] is set to the resistor 11
The voltage divided by 4 and 115 is supplied to the inverting input terminal (−) of the operational amplifier circuit 118a via the resistor 116.
The charge charged in the capacitor 118b is charged when the switch 118c is turned off by the switching signal and discharged when the switch 118c is turned on. The output voltage of the operational amplifier circuit 118a is added to the adder circuit 1 via the resistor 117.
09 is supplied to one of the input terminals. The other output terminal of the adding circuit 109 is supplied with the CCD output video signal of the CCD image pickup device 100 of the interline frame transfer system.

When the switching signal of the vertical cycle is supplied to the switch 118c, the switch 118c is turned on and the capacitor 118b is discharged every vertical cycle. The integrator circuit outputs a sawtooth wave signal having a negative slope that is inversely proportional to the temperature when the vertical cycle is 40 ° C. or more. in this case,
The dark current component that causes shading of the CCD output video signal of the CCD image pickup device 100 is a sawtooth wave having a positive slope with a vertical cycle, and the slope increases as the temperature rises. Therefore, in the adding circuit 109, the dark current component of the CCD output video signal is the sawtooth wave signal generating circuit 120.
This summing circuit 10 is compensated by the sawtooth signal from
An output video signal from which a dark current component that causes shading of the CCD output video signal is removed is output to the output terminal 108 of the reference numeral 9.

Next, another configuration of the conventional shading correction circuit of the television camera will be described. As shown in FIG. 5, the shading correction circuit of this television camera includes a CCD image pickup device 100 of the interline frame transfer system shown in FIG. 4, a sample hold circuit 126, and a sawtooth wave signal generation circuit 120.
And an adder circuit 109. Here, an interline frame transfer type CCD image pickup device 100,
Since the configurations of the sawtooth wave signal generation circuit 120 and the addition circuit 109 are the same as those shown in FIG. 4, description thereof will be omitted.
The sample hold circuit 126 includes an operational amplifier circuit 121 that forms a comparison circuit, switches 124 and 125 and capacitors 122 and 123 that form a sample hold unit.
And One and the other switch 124, 125
Is connected to the output terminal 108 of the adding circuit 109,
The other end of one switch 124 has one capacitor 122
, And the non-inverting input terminal (+) of the operational amplifier circuit 121. The other switch 125
The other end of is connected to one end of the other capacitor 123 and is also connected to the inverting input terminal (−) of the operational amplifier circuit 121. The other ends of the one and the other capacitors 122 and 123 are both grounded.

The shading correction circuit of the conventional television camera thus configured operates as follows. When one and the other switches 124 and 125 are supplied with the switching signals 124a and 125a as a pulse delayed by a predetermined period with respect to the vertical period and an early pulse, respectively, one and the other are respectively provided at the beginning and the end of the vertical period. The switches 124 and 125 are turned on. That is, the voltage of the output video signal at the beginning of the vertical period is sampled and held in one capacitor 122, and the voltage of the output video signal at the end of the vertical period is sampled and held in the other capacitor 123. Then, the voltage of this difference is output from the operational amplifier circuit 121. The voltage of this difference is supplied to the non-inverting input terminal (+) of the operational amplifier circuit 118a of the sawtooth wave signal generation circuit 120.

By doing so, a sawtooth wave signal having a negative slope having an amplitude corresponding to the voltage difference of the output video signal at the beginning portion and the end portion of the vertical period is output from the sawtooth wave signal generating circuit 120. Is output. As a result, similarly to the example shown in FIG. 4, the output video signal in which the dark current component that causes shading from the CCD output video signal is compensated is output from the output terminal 108.

[0018]

The conventional shading correction circuit of the television camera shown in FIG. 4 detects the temperature in the vicinity of the CCD image pickup device 100 and determines the shading correction amount according to the temperature. The dark current component that causes shading is compensated by changing the amplitude of the correction pulse shown. Here, the correction amount indicated by the amplitude of the shading correction pulse with respect to the temperature can be experimentally determined.

However, in the interline frame transfer type CCD image pickup device 100, as shown in FIG. 6, the effective pixel area 128 of the CCD pixel 127 is used.
And an optical black mask portion 129 on the upper and lower portions of the screen of the CCD image sensor. Here, the optical black mask portions on the left and right sides of the screen do not affect the problem to be solved by the invention, and therefore the description thereof is omitted. Then, the optical black mask portions 1 on the upper and lower parts of the screen
Black level 130 indicating the video level [V] corresponding to 29
[V] exists.

However, since the charge of the optical black level portion 129 in the lower part of the screen is stored in the second vertical CCD register 105 for a longer time than the charge of the optical black level part in the upper part of the screen, the lower part of the screen is displayed. The dark current in the optical black level portion of is larger than that in the optical black level portion in the upper part of the screen. For this reason, as shown in FIG. 7, the amplitude level of the shading correction pulse is increased by the shading level difference 133 of the upper 131 parts of the screen with respect to the lower 132 parts of the screen. As described above, when the temperature becomes high, the amplitude level of the shading correction pulse must be made higher than that when the temperature is low.

Further, as shown in FIG. 8, the voltage [V] indicating the amplitude level of the shading correction pulse exponentially increases as the temperature rises. Since the correction amount is not accurately determined and there is a large variation among the individual CCD image pickup devices 100, there is a problem in that appropriate correction cannot be performed at high temperatures.

The shading correction circuit of the conventional television camera shown in FIG. 5 sets the optical black level at the beginning and end of the vertical period, that is, the optical black level at the upper and lower parts of the screen of the CCD image sensor 100. The dark current component that causes shading is compensated by analog-like sample-holding and feeding back so that the optical black levels of the upper screen and the lower screen become equal. However, the CCD imaging device 100 is specified by specifying the beginning and end of the vertical cycle.
Switching signals 124a and 12 for performing sample hold of the optical black level of the upper and lower parts of the screen
The configuration of the circuit for forming 5a is difficult, and in particular, this circuit must be provided for each of the R, G, and B video signals, so that the circuit scale becomes complicated and large.

The present invention has been made in view of the above points, and an object thereof is to provide a shading correction circuit for a television camera which removes shading due to the temperature of the solid-state image pickup device with a simple structure.

[0024]

In a shading correction circuit for a television camera according to the present invention, photoelectric conversion elements arranged in a matrix and a first vertical register group for transferring charges generated by the photoelectric conversion elements are provided. And a second vertical register group that receives and transfers the charges of the first vertical register group and a horizontal output register, and the charges transferred to the first vertical register group during the vertical blanking period can be transferred at high speed. Shading correction circuit for a television camera having a solid-state image sensor, which transfers the charges of the second vertical register group to the second vertical register group at predetermined intervals during the vertical scanning period via the horizontal output register. In the above, the black mask part level detecting means for detecting the level of the black mask part at the end of the solid-state imaging device, and the black mask part level detecting means A correction pulse level generating means for generating a level of correction pulses based on the detection level of al,
A sawtooth wave signal generating means for generating a sawtooth wave signal having a level of the correction pulse from the correction pulse level generating means and a vertical cycle, and an output signal of the sawtooth wave signal generating means is provided to the solid-state imaging device. It is designed to be combined with the output signal of.

According to the present invention, the following operations are performed. The first vertical register group transfers the charges generated by the photoelectric conversion element, and the second vertical register group receives and transfers the charges of the first vertical register group. That is, the charges transferred to the first vertical register group during the vertical blanking period are transferred to the second vertical register group at high speed, and the charges of the second vertical register group are horizontally output at a predetermined cycle during the vertical scanning period. Read through register. As a result, an output video signal is output from the solid-state image sensor. This output video signal is a video signal containing a dark current component that causes shading.

The output video signal including shading from the solid-state image pickup device and the correction sawtooth pulse from the correction sawtooth pulse generation means are added to output a video signal, and this analog video signal is analog / digital. Supply to the conversion means. The analog / digital converting means converts the analog video signal into a digital video signal so that the digital signal processing can be performed in the subsequent stage, and supplies the digital video signal to the black mask partial level detecting means.

The storage means reads the address information designating the detection area and supplies it to the detection area setting section. The detection area setting unit sets a detection area based on the address information read from the storage unit and supplies a detection area setting signal to the black mask partial level detection unit.

The digital video signal is output as an output video signal by passing each pixel on one horizontal line for each pixel, and at the same time, a specific pixel among the passing pixels is captured. The address of a specific pixel of each pixel of one horizontal line of the passing digital video signal is designated,
The pixels are added for each pixel or for each horizontal line to form a pixel group of a specific area, and the pixel group is supplied to the black mask partial level detecting means.

The black mask partial level detecting means temporarily stores the pixel group of the supplied area. Then, the black mask partial level detection means selects a specific area whose address is designated based on the detection area setting signal from the detection area setting means, that is, the optical area of each of the upper screen portion and the lower screen portion of the added pixel group. The level of the black part is detected,
The level detection signals of the optical black portions at the upper and lower parts of the screen are supplied to the comparison means for comparing the black levels at the upper and lower parts of the screen.

The comparing means compares the levels of the optical black portions of the upper screen portion and the lower screen portion supplied from the black mask portion level detecting means and supplies a difference signal to the correcting pulse level generating means. The correction pulse level generation means generates a correction level control signal so that the difference signal becomes zero and supplies it to the correction sawtooth pulse generation means. The correction pulse level generating means increases the level of the correction pulse when the difference signal is large, and decreases the level of the correction pulse when the difference signal is small, and changes the level of the correction pulse by the correction level control signal. Control.

This correction level control signal is supplied to the sawtooth wave signal generating means. The correction sawtooth pulse is generated by outputting a correction sawtooth pulse having a negative inclination with a vertical cycle according to the correction level control signal.

By doing so, a sawtooth wave signal with a negative slope having an amplitude corresponding to the difference in voltage between the levels of the optical black portions at the upper and lower portions of the screen is output from the sawtooth wave signal generating means. It That is, if the difference is large, the level of the correction pulse is increased to increase the slope of the negative slope, and if the difference is small, the level of the correction pulse is decreased to reduce the slope of the negative slope.

As a result, the positive slope dark current from the solid-state image pickup device and the negative slope correction sawtooth pulse from the sawtooth wave signal generating means are added, and the influence of the dark current can be reduced. Therefore, a video signal in which the dark current component that causes shading in the output video signal is compensated is output.

[0034]

BEST MODE FOR CARRYING OUT THE INVENTION This embodiment will be described below. First, the configuration of the shading correction circuit of the television camera of this embodiment will be described with reference to FIG. The shading correction circuit of the television camera of this embodiment is
An interline frame transfer type CCD image pickup device 1, an adding circuit 2, a video amplifier 3, an A / D converter 4, a digital signal processing LSI 5, a microprocessor 9, and a correcting sawtooth pulse generating circuit 14 are provided. Have.

The CCD image pickup device 1 of the interline frame transfer system stores pixels 101 as photoelectric conversion devices arranged in a matrix as shown in FIG. 4 and charges generated by the pixels 101 as photoelectric conversion devices. It has a first vertical register group 102 for transferring, a second vertical register group 105 for receiving and transferring charges of the first vertical register group 101, and a horizontal output register 106, and has a first vertical register group during a vertical blanking period. A structure in which the charges transferred to the vertical register group 102 are transferred at high speed to the second vertical register group 105, and the charges of the second vertical register group 105 are read out through the horizontal output register 106 at a predetermined cycle during the vertical scanning period. Is.

Although not shown in FIG. 1, the CCD image pickup device 1 of the interline frame transfer system constitutes a so-called three-plate CCD image pickup device. That is, the CCD image pickup device includes a prism that separates incident light into lights of R, G, and B, a photoelectric conversion device for R, and a photoelectric conversion device for G that photoelectrically convert light of R, G, and B colors. , B photoelectric conversion elements. It also has a first vertical register group, a second vertical register group, and a horizontal output register for each color of R, G, and B. The CCD image pickup device 1 of the interline frame transfer system has the same structure as the CCD image pickup device of the interline frame transfer system shown in FIG.

The adder circuit 2 adds the CCD output image signal S1 including shading from the CCD image pickup device 1 of the interline frame transfer system and the correction sawtooth pulse P from the correction sawtooth pulse generation circuit 14. To output the video signal. The video amplifier 3 amplifies the added video signal to a level capable of signal processing in the subsequent stage and outputs the analog video signal S2. The A / D converter 4 converts the analog video signal S2 into a digital video signal S3 so that digital signal processing can be performed in the subsequent stage.

The digital signal processing LSI 5 has a register 6, an adder 7, and a black mask partial level detecting section 8. The register 6 passes each pixel of each horizontal line of the digital video signal S3 for each pixel and outputs the output video signal S3.
Output as 4. The adder 7 adds a specific pixel among the pixels of each horizontal line of the digital video signal S3 passing through the register 6 for each pixel or for each horizontal line. The black mask partial level detection unit 8 is a specific area in which an address is designated among the pixels added by the adder 7,
That is, the levels of the optical black portions at the upper and lower portions of the screen are detected, and the level detection signals D of the optical black portions at the upper and lower portions of the screen are supplied to the microprocessor 9.

The microprocessor 9 includes a memory 10 and
Detection area setting unit 11 and black level comparison unit 1 at the top and bottom of the screen
2 and a correction pulse level generator 13. The memory 10 stores an operation program and address information designating a detection area. Although the address information designating this detection area is input at the time of designing, it may be updated later in response to replacement of the CCD image pickup device 1. The detection area setting unit 11 sets a detection area based on the address information read from the memory 10 and supplies the detection area setting signal E to the black mask partial level detection unit 8. The black level comparing unit 12 at the top and bottom of the screen compares the levels of the optical black portions at the top and bottom of the screen supplied from the black mask portion level detecting unit 8 and supplies a difference signal to the correcting pulse level generating unit 13. To do. The correction pulse level generation unit 13
A correction level control signal C is generated so that the difference signal becomes zero and is supplied to the correction sawtooth pulse generation circuit 14.

The correction sawtooth pulse generation circuit 14 is shown in FIG.
A resistor 114 for dividing the power supply voltage + B [V] indicated by
115, an input resistor 116, an operational amplifier circuit 118a and a capacitor 118b forming an integrating circuit, and a switching signal 15 having a vertical cycle of 1V shown in FIG. , A switch 118c for controlling the electric charge accumulated in the capacitor 118b to be discharged or charged
And an output resistor 117. The correction sawtooth pulse generation circuit 14 is the sawtooth wave signal generation circuit 1 shown in FIG.
Since the configuration is the same as that of 20, the detailed description thereof will be omitted.

The CCD image pickup device 1 of the interline frame transfer system is a solid-state image pickup device, and the black mask part level detection part 8 is a black mask part level detection means for detecting the levels of the black mask parts at the upper end and the lower end of the solid-state image pickup device. The correction pulse level generation unit 13 generates the correction pulse level based on the detection level from the black mask partial level detection unit, and the correction sawtooth pulse generation circuit 14 outputs the correction pulse level generation unit. The sawtooth wave signal generating means for generating the sawtooth wave signal having the level of the correction pulse and the vertical cycle, and the A / D converter 4 is an analog / digital converter for converting the video signal photoelectrically converted by the fixed image pickup device into a digital signal. The means and the detection area setting unit 11 specify the address of the specific area to perform solid-state imaging. The detection area setting means for setting the detection areas of the black mask portions at the upper and lower ends of the child, the memory 10 for storing the addresses set in the detection area setting means 11 in advance, and the black level comparing portion 12 at the top and bottom of the screen are A comparison unit for comparing the detection levels of the black mask portions at the upper end portion and the lower end portion of the solid-state image pickup device from the black mask portion level detection unit 8, the adder circuit 2 outputs the output signal of the sawtooth wave signal generation unit to the solid-state image pickup device 1. Each of the adding means is configured to combine with the output signal.

The shading correction circuit of the television camera of the present embodiment thus configured operates as follows. When a television camera switch (not shown) is turned on, the shading correction circuit of this television camera operates as follows. When the television camera is switched on, the microprocessor 9
The operation program stored in the internal memory 10 is read out, and the microprocessor 9 supplies an instruction based on the operation program to each circuit. Each circuit operates according to this instruction.

First, the CCD image pickup device 1 of the interline frame transfer system operates as follows.
Incident light is separated by a prism into R, G, and B color lights, and the R, G, and B color lights are received by the R photoelectric conversion element, G photoelectric conversion element, and B photoelectric conversion element, respectively. It

The first vertical register group for each color of R, G, B transfers the charge generated by the photoelectric conversion element for each color of R, G, B, and the group for each color of R, G, B. Second
The vertical register group of 1 receives and transfers the charge of the first vertical register group for each color of R, G, and B. That is, the charges transferred to the first vertical register group for each color of R, G, B in the vertical blanking period are rapidly transferred to the second group for each color of R, G, B.
To the vertical register group of R, G, B during the vertical scanning period.
The charge of the second vertical register group for each color of
It is read out through the horizontal output registers for each of R, G, and B colors. As a result, the CCD image pickup device 1 outputs the CCD output video signal S1. This CCD output video signal S1 produces shading in the output video signal S4.
It is the CCD output video signal S1 containing the 16 components of the dark current as shown in FIG. The CCD image pickup device 1 of the interline frame transfer system has the same operation as the CCD image pickup device 100 of the interline frame transfer system shown in FIG.

The adder circuit 2 adds the CCD output video signal S1 including shading from the CCD image pickup device 1 of the interline frame transfer system and the correction sawtooth pulse P from the correction sawtooth pulse generation circuit 14. To output a video signal and supply the video signal to the video amplifier 3. The video amplifier 3 amplifies the added video signal to a level capable of signal processing in a subsequent stage and outputs an analog video signal S2, and the analog video signal S2 is A / D
Supply to the converter 4. The A / D converter 4 uses the analog video signal S so that digital signal processing can be performed in the subsequent stage.
2 is converted into a digital video signal S3, and this digital video signal S3 is supplied to the digital signal processing LSI 5.

When the switch of the television camera is turned on, the operation program stored in the memory 10 of the microprocessor 9 is read out, and the microprocessor 9 stores the address information for designating the detection area stored in the memory 10. Is supplied to the memory 10. The memory 10 reads the address information designating the detection area and supplies it to the detection area setting unit 11. The detection area setting unit 11 sets a detection area based on the address information read from the memory 10 and supplies the detection area setting signal E to the black mask partial level detection unit 8.

Register 6 of digital signal processing LSI 5
Supplies each pixel for each horizontal line of the digital video signal S3 and outputs it as an output video signal S4 for each pixel, and supplies a specific pixel among the passing pixels to the adder 7. The adder 7 designates the address of a specific pixel among the pixels of each horizontal line of the digital video signal S3 passing through the register 6 and adds up for each pixel or for each horizontal line to obtain a specific area. The pixel group of is formed and is supplied to the black mask partial level detection unit 8. Further, the adder 7 also designates the address of a specific area and adds the areas. The black mask partial level detection unit 8 temporarily stores the pixel group of the area supplied from the adder 7. Then, the black mask partial level detection unit 8 selects, from the pixel group added by the adder 7, a specific area whose address is specified based on the detection area setting signal E from the detection area setting unit 11, that is, the upper portion of the screen. And the levels of the optical black portions of the lower portion of the screen are detected, and the level detection signals D of the optical black portions of the upper portion of the screen and the lower portion of the screen are supplied to the black level comparing portion 12 of the upper and lower portions of the screen of the microprocessor 9.

The black level comparing section 12 at the top and bottom of the screen compares the levels of the respective optical black areas at the top and bottom of the screen supplied from the black mask portion level detecting section 8 and compares the difference signal with a pulse level generating section for correcting the difference signal. Supply to 13. The correction pulse level generation unit 13 generates the correction level control signal C so that the difference signal becomes zero and supplies it to the correction sawtooth pulse generation circuit 14. The correction pulse level generation unit 13 increases the level 17 of the correction pulse shown in FIG. 2C when the difference signal is large, and decreases the level 17 of the correction pulse when the difference signal is small to perform the correction level control. The signal C controls the level 17 of the correction pulse.

This correction level control signal C is shown in FIG.
The operational amplifier circuit 1 of the sawtooth wave signal generation circuit 120 shown in FIG.
It is supplied to the non-inverting input terminal (+) of 18a. The power supply voltage + B [V] is applied to the resistor 11 at the inverting input terminal (-) of the operational amplification circuit 118a of the correction sawtooth pulse generation circuit 14.
The voltage divided by 4,115 is supplied. Operational amplifier circuit 118a and capacitor 1 forming an integrating circuit
18b outputs a sawtooth pulse P for correction having a negative slope according to the correction level control signal C. In addition, switch 1
18c is turned on or off at a vertical cycle of 1 V by the switching signal 15 shown in FIG.
The electric charge accumulated in 8b is controlled to be discharged or charged. As a result, a negative-sloping correction sawtooth pulse P having a vertical period of 1 V is generated.

By doing so, the sawtooth wave signal P having a negative slope of amplitude corresponding to the voltage difference between the levels of the optical black portions at the upper and lower portions of the screen is output from the sawtooth wave signal generation circuit 14. Is output. That is, if the difference is large, the level 17 of the correction pulse is increased to increase the slope of the negative slope, and if the difference is small, the level 17 of the correction pulse is decreased to reduce the slope of the negative slope. Since the correction sawtooth pulse generation circuit 14 operates in the same manner as the sawtooth wave signal generation circuit 120 shown in FIG. 4, detailed description thereof will be omitted.

As a result, the dark current 16 having a positive slope and the correcting sawtooth pulse P having a negative slope are added by the adder circuit 2,
The influence of the dark current 16 can be reduced. Therefore,
An output video signal S4 in which the dark current 16 components that generate shading is compensated for the CCD output video signal S1 is output.

By doing so, as the voltage indicating the amplitude level of the shading correction pulse increases with the temperature rise, the level of the optical black portion where the voltage directly increases is detected, so that it corresponds to each level. The correction can be performed. Further, the variation between the individual CCD image pickup devices 1 is corrected so that the voltage difference between the respective optical black portions at the upper and lower portions of the screen becomes zero for each CCD image pickup device 1. Therefore, the correction corresponding to each CCD image sensor 1 can be performed. Moreover, since the levels of the optical black portions of the upper and lower portions of the screen of the CCD image pickup device 1 are detected by designating the address of the detection area, the start portion and the end portion of the vertical cycle 1V are specified. It is not necessary to create complicated switching signals 124a and 125a for performing sample and hold of the optical black level of the upper and lower parts of the screen of the CCD image pickup device 1.

Next, the configuration of the shading correction circuit of the television camera of another embodiment will be described with reference to FIG. The same parts as those in the configuration shown in FIG. 1 are designated by the same reference numerals, detailed description thereof will be omitted, and only different parts will be described.

The digital signal processing LSI 5 includes a register 6, an adder 7, a black mask partial level detection unit 8, a black level comparison unit 12 at the top and bottom of the screen, a correction pulse level generation unit 13, and a correction sawtooth shape. It has a pulse generation circuit 14 and an optical and circuit shading correction pulse generation circuit 18. Therefore, the digital signal processing LSI 5 is shown in FIG.
1. The register 6, the adder 7, the black mask partial level detection unit 8, the black level comparison unit 12 and the correction pulse level generation unit 13 at the top and bottom of the screen shown in the microprocessor 9 of FIG. The correction sawtooth pulse generation circuit 14 shown in 1 and the newly provided optical and circuit shading correction pulse generation circuit 18 are integrated to form a one-chip LSI.

The register 6 is 1 of the digital video signal S3.
Each pixel of each horizontal line is passed through for each pixel and output as an output video signal S4. The adder 7 adds a specific pixel among the pixels of each horizontal line of the digital video signal S3 passing through the register 6 for each pixel or for each horizontal line. The black mask portion level detection unit 8 detects the level of a specific area designated by an address among the pixels added by the adder 7, that is, the level of each optical black portion of the upper screen and the lower screen, and displays the screen. The level detection signals of the optical black portions of the upper part and the lower part of the screen are supplied to the black level comparing part 12 at the top and bottom of the screen.

The black level comparing unit 12 at the top and bottom of the screen compares the levels of the respective optical black portions at the upper and lower parts of the screen supplied from the black mask portion level detecting unit 8 and compares the difference signal with the pulse level generating unit for correction. Supply to 13. The correction pulse level generation unit 13 generates the correction level control signal C so that the difference signal becomes zero and supplies it to the correction sawtooth pulse generation circuit 14.

The newly provided optical and circuit shading correction pulse generation circuit 18 will now be described.
The light of each color of R, G, and B which is split by the prism of the CCD image pickup device 1 has different optical spectral characteristics between the upper side of the screen and the lower side of the screen. This spectral characteristic is optical shading. The optical / circuit correction pulse generation circuit 18 creates a correction pulse for correcting the optical shading caused by the spectral characteristic, supplies the correction pulse to the addition circuit 2, and outputs the correction pulse generated by the CCD image sensor 1 based on the optical characteristic. The shading is corrected.

Further, in an analog circuit, the value of the current of the power supply supplied to the circuit decreases during the vertical blanking period, but this decrease of the current will cause noise on the power supply line. This analog power supply noise causes circuit shading. The optical / circuit shading correction pulse generation circuit 18 creates a pulse for correcting the circuit shading caused by the analog power supply noise, supplies the pulse to the adder circuit 2, and supplies the pulse to this analog circuit. The circuit shading caused by the power supply noise is corrected. In addition, here, the shading shown in FIG. 1 will be described as black shading with respect to such optical and circuit shading. Optical and circuit shading correction pulse P from the optical and circuit shading correction pulse generation circuit 18
1 is superimposed on an existing line for supplying 1 to the adder circuit 2, and a black shading correction sawtooth pulse P2 for correcting black shading on the screen upper side and the screen lower side from the correction sawtooth pulse generation circuit 14 is superposed. The correction pulse P ′ is supplied to the adder circuit 2 as P ′.

The microprocessor 9 includes a memory 10 and
The detection area setting unit 11 is included. The memory 10 stores an operation program and address information designating a detection area. Although the address information designating this detection area is input at the time of designing, it may be updated later in response to replacement of the CCD image pickup device 1. The detection area setting unit 11 sets a detection area based on the address information read from the memory 10 and supplies the detection area setting signal E to the black mask partial level detection unit 8.

The shading correction circuit of the television camera of the other embodiment configured as described above operates as follows. Detailed description of the same parts as those of the example shown in FIG. 1 will be omitted, and only different parts will be described.

When the switch of the television camera is turned on, the operation program stored in the memory 10 of the microprocessor 9 is read out, and the microprocessor 9 stores the address information designating the detection area stored in the memory 10. Is supplied to the memory 10. The memory 10 reads the address information designating the detection area and supplies it to the detection area setting unit 11. The detection area setting unit 11 sets a detection area based on the address information read from the memory 10 and supplies the detection area setting signal E to the black mask partial level detection unit 8 of the digital signal processing LSI 5.

Register 6 of digital signal processing LSI 5
Supplies each pixel in each horizontal line of the digital video signal S3 and outputs it as an output video signal S4 for each pixel, and supplies a specific pixel among the passing pixels to the adder 7. The adder 7 designates the address of a specific pixel among the pixels of each horizontal line of the digital video signal S3 passing through the register 6 and adds up for each pixel or for each horizontal line to obtain a specific area. Make a pixel group of
It is supplied to the black mask partial level detection unit 8. Further, the adder 7 also designates the address of a specific area and adds the areas. The black mask partial level detection unit 8 is an adder 7
The pixel group of the area supplied from is temporarily stored. Then, the black mask partial level detection unit 8 selects, from the pixel group added by the adder 7, a specific area whose address is specified based on the detection area setting signal E from the detection area setting unit 11, that is, the upper portion of the screen. And the levels of the respective optical black portions at the bottom of the screen are detected, and the level detection signals D of the optical black portions at the upper portion of the screen and the lower portion of the screen are supplied to the black level comparing section 12 at the upper and lower portions of the screen.

The black level comparing unit 12 at the top and bottom of the screen compares the levels of the respective optical black portions at the upper and lower portions of the screen supplied from the black mask portion level detecting unit 8 and compares the difference signal with the pulse level generating unit for correction. Supply to 13. The correction pulse level generation unit 13 generates the correction level control signal C so that the difference signal becomes zero and supplies it to the correction sawtooth pulse generation circuit 14. The correction pulse level generation unit 13 increases the level 17 of the correction pulse shown in FIG. 2C when the difference signal is large, and decreases the level 17 of the correction pulse when the difference signal is small to perform the correction level control. The signal C controls the level 17 of the correction pulse.

This correction level control signal C is shown in FIG.
The operational amplifier circuit 1 of the sawtooth wave signal generation circuit 120 shown in FIG.
It is supplied to the non-inverting input terminal (+) of 18a. The power supply voltage + B [V] is applied to the resistor 11 at the inverting input terminal (-) of the operational amplification circuit 118a of the correction sawtooth pulse generation circuit 14.
The voltage divided by 4,115 is supplied. Operational amplifier circuit 118a and capacitor 1 forming an integrating circuit
18b outputs a black shading correction pulse P2 as a sawtooth pulse for correction having a negative slope according to the correction level control signal C. The black shading correction pulse P2 is the same as the correction sawtooth pulse P shown in FIG. The switch 118c is controlled to be turned on or off at a vertical cycle of 1 V by the switching signal 15 shown in FIG. 2A,
The electric charge accumulated in the capacitor 118b is controlled to be discharged or charged.

As a result, a black shading correction sawtooth pulse P2 is produced as a negative slope correction sawtooth pulse having a vertical period of 1V. Further, the optical / circuit correction pulse generation circuit 18 creates an optical / circuit shading correction pulse P1 and supplies it to the addition circuit 2 on the line from the correction sawtooth pulse generation circuit 14 on the upper side and the lower side of the screen. A correction pulse P ′ superposed with the black shading correction sawtooth pulse P2 for correcting the black shading on the side is supplied to the adder circuit 2.

As for the black shading correction, as described above, the black as a sawtooth wave signal having a negative slope with an amplitude corresponding to the voltage difference from the level of each of the optical black portions at the upper and lower portions of the screen. The sawtooth pulse P2 for shading correction is output from the sawtooth wave signal generation circuit 14. That is, if the difference is large, the level 17 of the correction pulse is increased to increase the slope of the negative slope, and if the difference is small, the level 17 of the correction pulse is decreased to reduce the slope of the negative slope. The correction sawtooth pulse generation circuit 14 is
Since the operation is similar to that of the sawtooth wave signal generation circuit 120 shown in FIG. 4, detailed description thereof will be omitted.

As a result, the dark current 16 having a positive slope and the sawtooth pulse P for black shading correction having a negative slope are added in the adder circuit 2.
2 can be added to reduce the influence of the dark current 16. Further, the optical and circuit shading correction pulse P1 can also remove the optical and circuit shading. Therefore, the output video signal S4 in which the dark current 16 components that cause shading in the output video signal S4 is compensated and the optical and circuit shading is removed
4 is output.

By doing so, the black shading correction can be performed by the sawtooth pulse P2 for black shading correction using the line for supplying the pre-existing optical and circuit shading correction pulse P1 to the adding circuit 2. it can.

By doing so, with respect to the increase in the voltage indicating the amplitude level of the black shading correction pulse due to the temperature rise, the level of the optical black component in which the voltage is directly increased is detected, so that each level is detected. Corresponding corrections can be made. Further, the variation between the individual CCD image pickup devices 1 is corrected so that the voltage difference between the respective optical black portions at the upper and lower portions of the screen becomes zero for each CCD image pickup device 1. Therefore, the correction corresponding to each CCD image sensor 1 can be performed. Moreover, since the levels of the optical black portions of the upper and lower portions of the screen of the CCD image pickup device 1 are detected by designating the address of the detection area, the start portion and the end portion of the vertical cycle 1V are specified. It is not necessary to create complicated switching signals 124a and 125a for performing sample and hold of the optical black level of the upper and lower parts of the screen of the CCD image pickup device 1. Therefore, the circuit configuration can be simplified.

[0070]

According to the shading correction circuit of the television camera of the present invention, the photoelectric conversion elements arranged in a matrix, the first vertical register group for transferring the charges generated by the photoelectric conversion elements, and the first vertical register group A second vertical register group that has a second vertical register group that receives and transfers the charges of the vertical register group and a horizontal output register, and rapidly transfers the charges transferred to the first vertical register group during the vertical blanking period. In the shading correction circuit of the television camera having a solid-state image sensor, which transfers the electric charges of the second vertical register group at a predetermined cycle during the vertical scanning period to the black at the end of the solid-state image sensor. A black mask portion level detecting means for detecting the level of the mask portion,
A correction pulse level generating means for generating the level of the correction pulse based on the detection level from the black mask partial level detecting means, and a sawtooth wave signal having the level of the correction pulse from the correction pulse level generating means and having a vertical cycle. A sawtooth wave signal generating means is provided, and the output signal of the sawtooth wave signal generating means is combined with the output signal of the solid-state imaging device. As a result, when the voltage indicating the amplitude level of the shading correction pulse is increased due to the temperature rise, the level of the optical black portion where the voltage is directly increased is detected, so that the correction corresponding to each level can be performed. . Further, since the variation between the solid-state image pickup elements is corrected so that the voltage difference between the optical black portions of the upper screen portion and the lower screen portion of each solid-state image pickup element becomes zero, The correction corresponding to each solid-state image sensor can be performed. Further, since the detection portions are designated to detect the levels of the respective optical black portions at the upper and lower portions of the screen of the solid-state image sensor, the start portion and the end portion of the vertical cycle are specified to identify the solid-state image sensor. Since it is not necessary to create a complicated switching signal for performing sample-holding of the optical black level at the upper and lower parts of the screen, size reduction and cost reduction can be achieved, and black shading due to temperature change can be almost completely removed. It has the effect of being able to.

Further, the shading correction circuit of the television camera of the present invention is provided with analog / digital conversion means for converting the video signal photoelectrically converted by the solid-state image pickup device into a digital signal as described above.
Since the level of the black mask portion at the end of the solid-state image pickup device is detected by the black mask portion level detecting means for the pixels converted to digital by the digital converting means, the black is detected for the pixels converted to digital. Since the level of the mask portion is detected, it is possible to easily control the level of the correction pulse based on the detected level with a simple configuration.

Further, the shading correction circuit of the television camera of the present invention, in the above, comprises the detection area setting means for setting the detection area of the black mask portion at the end of the solid-state image pickup device by designating the address of the specific area. The level of the black mask portion at the end of the solid-state image sensor is detected by the black mask portion level detection means based on the address set by the detection area setting means. Since the level of the black mask portion is designated and detected, it is possible to easily control the level of the correction pulse based on the detected level with a simple configuration.

Further, the shading correction circuit of the television camera of the present invention, in the above, is provided with the storage means for storing beforehand the address set in the detection area setting means, and the address read from the storage means is set in the detection area setting means. Since the setting is made in step 3, the black level can be easily detected with a simple configuration by specifying the address of the black mask part in advance and setting the detection area.
The effect is that the level of the correction pulse can be controlled based on the detection level.

Further, in the shading correction circuit of the television camera of the present invention, the black mask portion level detecting means detects the levels of the black mask portions at the upper end portion and the lower end portion of the solid-state image pickup device, and the black mask portion is detected. Comparing means for comparing the detection levels of the black mask portions at the upper end portion and the lower end portion of the solid-state image pickup device from the level detecting means is provided, and the correction pulse level generating means makes the correction pulse so that the comparison result from the comparing means becomes zero. The level of the correction pulse can be controlled so that the detection levels of the black mask portions at the upper end portion and the lower end portion of the solid-state image sensor become zero.

In the shading correction circuit of the television camera of the present invention, the black mask partial level detection means, the correction pulse level generation means, and the sawtooth wave signal generation circuit are integrated in the solid-state image pickup device. Since the output signal of the sawtooth wave signal generation circuit is superimposed on the other signal to be combined with the output signal, the circuit configuration can be simplified and the size can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a shading correction circuit of a television camera according to the present invention.

FIG. 2 is a waveform diagram showing the operation of an embodiment of the shading correction circuit of the television camera according to the present invention,
2A is a diagram showing switching signals, FIG. 2B is a diagram showing dark currents, and FIG. 2C is a diagram showing correction sawtooth pulses.

FIG. 3 is a block diagram showing the configuration of another embodiment of the shading correction circuit of the television camera according to the present invention.

FIG. 4 is a block diagram showing a configuration of a shading correction circuit of a conventional television camera.

FIG. 5 is a block diagram showing another configuration of a conventional shading correction circuit of a television camera.

FIG. 6 is a diagram showing a pixel configuration of a CCD of a shading correction circuit of a conventional television camera.

FIG. 7 is a diagram showing a black level voltage when no light is incident on a CCD of a shading correction circuit of a conventional television camera.

FIG. 8 is a diagram showing temperature dependence of a shading level of a shading correction circuit of a conventional television camera.

[Explanation of symbols]

1 Interline frame transfer type CCD,
2 adder circuit, 3 video amplifier, 4 A / D converter, 5 digital signal processing LSI, 6 register, 7
Adder, 8 black mask partial level detection unit, 9 microprocessor, 10 memory, 11 detection area setting unit, 12 black level comparison unit at the top and bottom of the screen, 13 correction pulse level generation unit, 14 correction sawtooth pulse generation circuit, S
1 CCD output video signal, S2 Analog video signal, S
3 digital video signal, S4 output video signal, E detection area setting signal, D level detection signal of the optical black portion on the upper and lower sides of the screen, C correction level control signal, P correction sawtooth pulse, 15 switching signal, 16 dark current, 17 correction pulse level, 18 optical and circuit shading correction pulse generation circuit, P '
Correction pulse (P1 optical and circuit shading correction pulse + P2 black shading correction sawtooth pulse)

Claims (6)

[Claims] 1. A photoelectric conversion element arranged in a matrix, a first vertical register group for transferring electric charges generated by the photoelectric conversion element, and a first vertical register group for receiving and transferring electric charges of the first vertical register group. Two vertical register groups and a horizontal output register are provided, and the charges transferred to the first vertical register group during the vertical blanking period are transferred at high speed to the second vertical register group, and during the vertical scanning period. In a shading correction circuit of a television camera having a solid-state image sensor for reading out the charges of the second vertical register group at a predetermined cycle through the horizontal output register, a level of a black mask portion at an end of the solid-state image sensor is set. A black mask partial level detecting means for detecting, and a correction pulse level for generating a level of the correction pulse based on the detection level from the black mask partial level detecting means. Generating means and sawtooth wave signal generating means for generating a sawtooth wave signal having a vertical cycle at the level of the correction pulse from the correction pulse level generating means, and providing an output signal of the sawtooth wave signal generating means. A shading correction circuit for a television camera, wherein the shading correction circuit is combined with an output signal of the solid-state imaging device. 2. The shading correction circuit for a television camera according to claim 1, further comprising analog / digital conversion means for converting a video signal photoelectrically converted by said solid-state image pickup device into a digital signal, said analog / digital conversion means. A shading correction circuit for a television camera, wherein the level of the black mask portion at the end of the solid-state image pickup device is detected by the black mask portion level detecting means for the pixel converted into digital by. 3. The shading correction circuit for a television camera according to claim 1, further comprising detection area setting means for setting a detection area of a black mask portion at an end of the solid-state image pickup device by designating an address of a specific area. A television, characterized in that the level of the black mask portion at the end of the solid-state image sensor is detected by the black mask portion level detecting means based on the address set by the detection area setting means. Shading correction circuit for the camera. 4. The shading correction circuit for a television camera according to claim 1, further comprising a storage unit that stores in advance an address set by the detection area setting unit, and the address read from the storage unit is the detection area. A shading correction circuit for a television camera, characterized in that setting is made by setting means. 5. The shading correction circuit for a television camera according to claim 1, wherein the black mask portion level detecting means detects the levels of the black mask portions at the upper end portion and the lower end portion of the solid-state imaging device, Comparing means for comparing the detection levels of the black mask portions at the upper end portion and the lower end portion of the solid-state image sensor from the mask portion level detecting means is provided, and the correction pulse level generating means makes the comparison result from the comparing means zero. A shading correction circuit for a television camera, characterized in that the level of a correction pulse is generated so that 6. The shading correction circuit for a television camera according to claim 1, wherein the black mask partial level detection means, the correction pulse level generation means, and the sawtooth wave signal generation means are integrated, A shading correction circuit for a television camera, wherein the output signal of the sawtooth wave signal generating means is superimposed on another signal to be combined with the output signal of the image pickup device.