JPH09284590A - Dynamic focus circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the fluctuation of dynamic focus output voltage and also to eliminate the fluctuation of this output voltage despite the switching of capacity of S-shaped correction capacitors. SOLUTION: The dividing ratio of double-end voltage of a horizontal S-shaped correction capacitor CS1 is switched in response to the switching of a switching FETQ2 which switches the capacity of the CS1. The voltage dividing ratio switching means use two capacitors C4 and C5 having very small capacity relatively to the capacity of a 2nd S-shaped correction capacitor CS2. The circuits of both capacitors C4 and C5 are connected in series to the primary winding of a boosting transformer T1. In such a constitution, the fluctuation of dynamic focus output voltage can be eliminated by switching the connection states between both capacitors C4 and C5 in response to the switching of the FETQ2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dynamic focus circuit for improving the focus characteristics of a peripheral portion of a screen of a cathode ray tube (hereinafter, CRT) such as a television receiver.

[0002]

2. Description of the Related Art Generally, a CR of a television receiver or the like.
In T, the electrostatic focus method is used to narrow the electron beam. In this method, a DC voltage is applied to the focus electrode in the neck of the CRT, an electrostatic lens is formed between the focus electrode and the anode electrode, and the electron beam is focused on the CRT phosphor screen. Since the distance from the focus electrode to the phosphor screen changes depending on the position of the screen, it is necessary to apply a focus voltage according to the screen position in order to obtain good focus characteristics on the entire screen. The variation of the focus voltage becomes a parabolic variation waveform with horizontal and vertical periods. Therefore,
To the focus electrode, a voltage obtained by superimposing this variation on the DC focus voltage, that is, a parabolic voltage of horizontal and vertical periods is applied as a correction waveform. Such a circuit is a dynamic focus circuit.

Among the dynamic focus circuits, a horizontal dynamic focus circuit for generating a parabolic voltage having a horizontal period has a large effect because a display screen is generally long and is widely used.

FIG. 3 shows a conventional horizontal dynamic focus circuit. In FIG. 3, a sawtooth wave current due to a horizontal output circuit flows in the primary winding T01 of the flyback transformer T0, and a pulse voltage (flyback pulse) of a horizontal period is induced in the secondary winding T02 by this current. To be done. The horizontal output circuit has a well-known structure and is composed of a horizontal output transistor Q1, a damper diode D1, a resonance capacitor C0, a horizontal deflection coil LH, and an S-shaped correction capacitor CS. The pulse voltage induced in the secondary winding T02 of the transformer T0 is integrated by the distributed capacitance C1 generated between the coil L1 and the winding of the primary winding T11 of the step-up transformer T1, so that the parabolic voltage of the horizontal cycle is obtained. A waveform is generated. Then, this parabolic voltage is boosted by a transformer T1, passed through a coupling capacitor C2 from a secondary winding T12, and supplied as a horizontal dynamic focus voltage to a focus electrode of a CRT (not shown). A DC focus voltage from a DC focus voltage generating circuit (not shown) is applied to the focus electrode. Further, a parabola voltage having a vertical cycle is supplied to the focus electrode from a vertical dynamic focus circuit (not shown).

However, in the circuit of FIG. 3, since the parabola voltage waveform is generated by the inductance of the coil L1 and the flyback pulse, which vary widely, the output of the dynamic focus circuit varies greatly.
Adjustments due to manufacturing process etc. are required. Therefore, the coil L1 is a variable coil and the inductance can be adjusted. Further, since the coil is used, there is a problem that the cost is increased.

FIG. 4 shows another conventional dynamic focus circuit. The same parts as those in FIG. 3 will be described with the same reference numerals. 3 is different from FIG. 3 in that the horizontal period parabolic voltage generated at both ends of the S-shaped correction capacitor CS of the horizontal output circuit is taken out to the resistor R1 and the capacitors C1 and C1 are connected.
The voltage is divided by the voltage divider circuit of 3 and is input to the primary winding T11 of the step-up transformer T1, boosted by the transformer T1, and then the secondary winding T12.
Is supplied to the focus electrode of a CRT (not shown) through a coupling capacitor C2 as a horizontal dynamic focus voltage. C1 is the distributed capacitance of the primary winding of the transformer T1. As in the case of FIG. 3, a DC focus voltage from a DC focus voltage generating circuit (not shown) is applied to the focus electrode. Further, a parabola voltage having a vertical cycle is supplied to the focus electrode from a vertical dynamic focus circuit (not shown).

In the circuit of FIG. 4, the primary winding T of the transformer T1
If the impedance of 11 is LP, then 1 / jωC1 >> j
Since there is a relationship of .omega.LP, the influence of the impedance LP can be ignored, and the parabola voltage waveform given by the division of the capacitors C1 and C3 is simply input to the transformer T1.
Since this parabolic voltage waveform is formed by the horizontal deflection coil LH and the S-shaped correction capacitor CS, the amplitude variation is usually managed and the amplitude variation is small. Therefore, according to the present dynamic focus circuit, the dynamic focus output voltage can be adjusted.

However, in a receiver having a function of switching horizontal frequency or horizontal linearity,
When the capacitance value of the S-shaped correction capacitor CS is switched, there is a problem that the parabola voltage generated across the S-shaped correction capacitor changes due to the switching, which also changes the dynamic focus output voltage.

[0009]

As described above, in the prior art of FIG. 3, there is a large variation in the dynamic focus output voltage due to the circuit components, which requires adjustment in the manufacturing process. In the prior art of FIG. When the capacity of the character correction capacitor is switched, there is a problem that the dynamic focus output voltage also changes.

In view of the above problems, the present invention reduces the variation in the dynamic focus output voltage due to the circuit components so that the dynamic focus output voltage does not fluctuate even when the capacitance of the S-shaped correction capacitor is switched. An object of the present invention is to provide a dynamic focus circuit that can be used.

[0011]

According to a first aspect of the present invention, there is provided a dynamic focus circuit which includes a switch means for switching whether or not a second S-shaped correction capacitor is connected in parallel to a horizontal S-shaped correction capacitor, and A transformer for boosting a parabolic voltage of a horizontal cycle generated across the horizontal S-shaped correction capacitor, and a voltage division ratio for dividing the voltage across the horizontal S-shaped correction capacitor according to switching of the switch means. It is composed of two capacitors which are connected in series to the primary winding of the transformer and have a very small capacitance relative to the capacitance of the second S-shaped correction capacitor. And a capacitor circuit capable of switching the connection state of two capacitors.

In the above description, the switch means is a field effect transistor (FE) which is turned on / off by the capacitance switching signal.
T) or a switching element such as a bipolar transistor. Further, the capacitor circuit is configured by a circuit that connects two capacitors in parallel or a circuit that connects two capacitors in series.

According to a second aspect of the present invention, in the dynamic focus circuit according to the first aspect, the two capacitors forming the capacitor circuit are connected in parallel with each other when the switch means is turned on. A circuit is connected in series to the primary winding of the transformer, and when the switch means is turned off, one of the two capacitors is connected in series to the primary winding of the transformer.

According to a third aspect of the present invention, in the dynamic focus circuit according to the first aspect, when the switch means is turned on, one of the two capacitors constituting the capacitor circuit is the transformer. Is connected in series to the primary winding of the transformer, and the two capacitors are connected in series when the switch means is turned off, and the series circuit is connected in series to the primary winding of the transformer.

According to the first aspect of the invention, in order to prevent the dynamic focus output voltage (that is, the parabolic voltage of the horizontal period) applied to the focus electrode from changing even when the horizontal S-shaped correction capacitor is switched, the horizontal S The voltage dividing ratio for dividing the voltage across the horizontal S-shaped correction capacitor is also switched in accordance with the switching of the switch means for switching the capacity of the S-shaped correction capacitor. Then, as the voltage division ratio switching means, two capacitors having a capacity relatively smaller than the capacity of the second S-shaped correction capacitor are used, and the circuit of the two capacitors is used as the primary winding of the transformer. Is connected in series with the switching means, and the connection state of the two capacitors is switched according to the switching of the switching means. By doing so, it is possible to simultaneously switch the voltage division ratio for dividing the voltage across the horizontal S-shaped correction capacitor by using only the capacity switching switch means of the horizontal S-shaped correction capacitor. That is, the dynamic focus output voltage fluctuates by switching the horizontal S-shaped correction capacitor only by using one switch means and two capacitors having a very small capacity relative to the capacity of the second S-shaped correction capacitor. It is possible to set not to.

According to a second aspect of the invention, the capacitance of the second S-shaped correction capacitor is very small relative to the capacitance of the second S-shaped correction capacitor.
It shows a configuration in which two capacitors are used in parallel to switch the voltage division ratio.

According to a third aspect of the present invention, the capacity of the second S-shaped correction capacitor is very small relative to the capacity of the second S-shaped correction capacitor.
It shows a configuration in which two capacitors are used in series to switch the voltage division ratio.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a dynamic focus circuit according to an embodiment of the present invention. The same parts as those in FIG.

In FIG. 1, a damper diode D1, a resonance capacitor C0, horizontal deflection coils LH and S are arranged in parallel with the transistor Q1 between the collector and emitter of the horizontal output transistor Q1 to which a horizontal drive pulse is supplied. A series circuit of the letter correction capacitor CS1 is connected, and the collector of the horizontal output transistor Q1 is supplied with the power supply voltage from the DC power supply + B through the primary winding T01 (or choke coil) of the flyback transformer T0. The horizontal output circuit is configured as described above.

Further, the S-shaped correction capacitor CS1 has a second S-shaped correction capacitor CS2 and an F-shaped switch means.
A series circuit with ETQ2 is connected in parallel, and by turning on / off the FET Q2, it is possible to turn on / off whether or not the second S-shaped correction capacitor CS2 is connected in parallel to the S-shaped correction capacitor CS1. There is. FET
The gate of Q2 is adapted to receive a capacitance switching signal associated with horizontal frequency switching. This capacity switching is made possible for a plurality of types (two types here) of horizontal frequencies as in a multi-scan display. That is, the capacitance value is switched according to the horizontal frequency switching so that the horizontal linearity is constant even if the horizontal frequency changes.

Further, the coupling capacitance is switched so that the dynamic focus output voltage does not fluctuate even when the capacitance value of the S-shaped correction capacitor is switched. The connection point of the horizontal deflection coil LH, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 is connected to the primary winding T11 of the step-up transformer T1 and the parallel circuit of the distributed capacitance C1 and the coupling capacitor C4 via the resistor R1. Connect to the parallel connection point of coupling capacitor C5, and
Is connected to the drain of the FET Q2, and the other end of the coupling capacitor C5 is connected to the reference potential point together with the source of the FET Q2. The capacitors C4 and C5 are connected to the second S
It has a very small capacity relative to the capacity of the character correction capacitor CS2. That is, the horizontal deflection coil L
The horizontal period parabolic voltage obtained at the connection point between H, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 is
It is divided by a voltage dividing circuit of the capacitor C1 and the parallel circuit of the capacitors C4 and C5, or the capacitor C1 and
Whether it is divided by the voltage dividing circuit with the capacitor C5
Q2 is switched on and off.

The horizontal period parabolic voltage obtained at the connection point of the horizontal deflection coil LH, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 is the step-up transformer T1.
The voltage is input to the primary winding T11, boosted by the transformer T1, passed through the coupling capacitor C2 from the secondary winding T12, and supplied as a horizontal dynamic focus voltage to the focus electrode of a CRT (not shown). A DC focus voltage from a DC focus voltage generating circuit (not shown) is applied to the focus electrode as in the case of FIG.
Further, a parabola voltage having a vertical cycle is supplied to the focus electrode from a vertical dynamic focus circuit (not shown).

Next, the operation of the circuit shown in FIG. 1 will be described. Normally, FETQ2 is off and the S-shaped correction capacitor is CS1.
When the FET Q2 is turned on, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 are in parallel.

At normal time (when Q2 is off), the parabolic voltage of the horizontal period generated across the S-shaped correction capacitor CS1 is ECS.
Set to 1. Further, when the voltage across the S-shaped correction capacitor CS1 in the Q2 on state is ECS2, ECS2 is obtained by the following equation. However, the capacitance values of the S-shaped correction capacitor CS2 and the coupling capacitors C4 and C5 are set to CS2, C4 and C5, respectively.
Then, it is assumed that there is a relationship of CS2 >> C4, C5.

[0025]

(Equation 1) Next, the voltage across the primary winding of the step-up transformer T1 (voltage across C1) will be considered. The voltage EC1 across C1 when Q2 is off is given by the following equation. When Q2 is off, the capacitance of the coupling capacitor C4 is much smaller than the capacitance of the second S-shaped correction capacitor CS2, so one end of CS2 is the same as the open state,

[0026]

(Equation 2) The voltage EC1 'across C1 when Q2 is on is given by the following equation. Substituting equation (1),

[0027]

(Equation 3) From equations (2) and (3), C4 and C are set so that Ec1 = Ec1 'is satisfied.
By selecting 5, it is possible to set so that the dynamic focus output voltage does not change even if the capacity of the S-shaped correction capacitor is switched.

FIG. 2 is a circuit diagram showing a dynamic focus circuit according to another embodiment of the present invention. The same parts as those in FIG.

2 differs from FIG. 1 in the configuration for switching the coupling capacitance so that the dynamic focus output voltage does not fluctuate even when the capacitance value of the S-shaped correction capacitor is switched. That is, the connection point of the horizontal deflection coil LH, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 is coupled to the primary winding T11 of the step-up transformer T1 and the parallel circuit formed by the distributed capacitance C1 and the resistor R1. Connected to the series circuit of C4 and coupling capacitor C5, coupling capacitor C4 and coupling capacitor C5
Connect the series connection point with 5 to the drain of FET Q2,
One end of the coupling capacitor C5 is connected to the reference potential point together with the source of the FET Q2. That is, the horizontal deflection coil LH
The parabolic voltage of the horizontal period obtained at the connection point between the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 is divided by the voltage dividing circuit of the capacitors C1 and C4, or the capacitors C1 and C4 are connected. Whether the voltage is divided by the voltage dividing circuit of the series circuit of C4 and capacitor C5 is switched by turning on / off the FET Q2. Other configurations are the same as those in FIG.

Next, the operation of the circuit shown in FIG. 2 will be described. Normally, FETQ2 is off and the S-shaped correction capacitor is CS1.
When the FET Q2 is turned on, the S-shaped correction capacitor CS1 and the second S-shaped correction capacitor CS2 are in parallel.

At normal time (when Q2 is off), the parabolic voltage of the horizontal period generated across the S-shaped correction capacitor CS1 is ECS.
Set to 1. Further, when the voltage across the S-shaped correction capacitor CS1 in the Q2 on state is ECS2, ECS2 is obtained by the above-mentioned equation (1) as in the case of FIG. However, if the capacitance values of the S-shaped correction capacitor CS2 and the coupling capacitors C4 and C5 are CS2, C4 and C5 respectively, then CS2 >> C4,
Assume that it has a relationship of C5.

Next, the voltage between the primary windings of the step-up transformer T1 (voltage across C1) will be considered. The voltage EC1 across C1 when Q2 is off is given by the following equation. When Q2 is off, the capacitance of the coupling capacitor C5 is much smaller than the capacitance of the second S-shaped correction capacitor CS2, so one end of CS2 is the same as in the open state.

[0033]

(Equation 4) The voltage EC1 'across C1 when Q2 is on is given by the following equation. Substituting equation (1),

[0034]

(Equation 5) From equations (4) and (5), C4 and C are set so that EC1 = EC1 'is satisfied.
By selecting 5, it is possible to set so that the dynamic focus output voltage does not change even if the capacity of the S-shaped correction capacitor is switched.

According to the embodiment described above, one switching FET Q2 and two capacitors C4 having a very small capacity relative to the S-shaped correction capacitor CS1.
Only by using C5, it is possible to set so that the dynamic focus output voltage does not change even if the S-shaped correction capacitor CS1 is switched. Therefore, the object can be achieved with a small number of parts.

[0036]

As described above, according to the present invention, the variation of the dynamic focus output voltage is reduced by using the voltage across the S-shaped correction capacitor, and the capacitance of the S-shaped correction capacitor is switched and at the same time the coupling capacitance is changed. By also switching, it becomes possible to set so as to eliminate the fluctuation of the dynamic focus output voltage. It has the advantage that it can be realized with a simple configuration.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a dynamic focus circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a dynamic focus circuit according to another embodiment of the present invention.

FIG. 3 is a circuit diagram showing a conventional dynamic focus circuit.

FIG. 4 is a circuit diagram showing another conventional dynamic focus circuit.

[Explanation of symbols]

Q1 ... Horizontal output transistor LH ... Horizontal deflection coil CS1 ... Horizontal S-shaped correction capacitor CS2 ... Second S-shaped correction capacitor C4, C5 ... Capacitor (however, CS2 >> C4, C5
) T1 ... Step-up transformer C1 ... Transformer distributed capacitance Q2 ... Horizontal S-shaped correction capacitor capacitance switching FET

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[Procedure amendment]

[Submission date] April 22, 1996

[Procedure amendment 1]

[Document name to be amended] Drawing

[Correction target item name] All figures

[Correction method] Change

[Correction contents]

FIG.

[Fig. 2]

[Figure 3]

FIG. 4

Claims (3)

[Claims] 1. A second S for a horizontal S-shaped correction capacitor.
Switch means for switching whether or not the S-shaped correction capacitors are connected in parallel, a transformer for boosting a horizontal period parabolic voltage generated at both ends of the horizontal S-shaped correction capacitor, and the horizontal S-shaped according to the switching of the switch means. A voltage dividing ratio for dividing the voltage across the correction capacitor is changed, which is connected in series to the primary winding of the transformer and has a capacitance very small relative to the capacitance of the second S-shaped correction capacitor. A dynamic focus circuit, comprising: a two-capacitor having a capacitor circuit, wherein a connection state of the two capacitors is switched according to switching of the switch means. 2. The two capacitors forming the capacitor circuit are connected in parallel to each other when the switch means is turned on, and the parallel circuit is connected in series to the primary winding of the transformer, 2. The dynamic focus circuit according to claim 1, wherein when the means is turned off, one of the two capacitors is connected in series to the primary winding of the transformer. 3. The two capacitors forming the capacitor circuit are such that, when the switch means is turned on, one of the two capacitors is connected in series to the primary winding of the transformer, and the switch means is turned off. The dynamic focus circuit according to claim 1, wherein the two capacitors are sometimes connected in series, and the series circuit is connected in series to the primary winding of the transformer.