JPH09275475A - Pictorial communication equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the producing cost and to accelerate the processing speed by providing an image data storage area for at least one line to be commonly referred to as preceding line data. SOLUTION: This equipment is provided with a gate array 7 consisting of a high picture quality reading processing means for performing high picture quality reading processing for reading a half tone image and a buffer memory 10 having the image data storage area for one line at least to be commonly referred to as the preceding line data by a CPU 1 as an encoding/decoding means and the gate array 7. Then, since the image data storage area for at least one line in the buffer memory 10 is shared by the CPU 1 and the gate array 7, the waste of the image data storage area can be saved and the producing cost can be reduced. Further, by synchronizing high picture quality reading processing and encoding processing, both the processes can be simultaneously executed only by accessing the same memory address at the time of transmission, and processing speed can be accelerated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image communication apparatus having an encoding / decoding means for performing two-dimensional encoding / decoding processing to suppress redundancy of image data and perform band compression. is there.

[0002]

2. Description of the Related Art Encoding for performing two-dimensional encoding / decoding processing to suppress redundancy of image data and perform band compression.
As an image communication device having a decoding means, for example, a facsimile device can be considered.

In such a facsimile machine,
Some have a high-quality reading function for reading a halftone image and a smoothing function for smoothing the outer edge of a recorded image.

By the way, in the two-dimensional encoding / decoding process, the high image quality reading process, and the smoothing process, it is necessary to refer to the image data of the previous line, and therefore the image data for one line is stored. Buffer memory was needed.

In a conventional facsimile apparatus, a two-dimensional encoding / decoding process, a high image quality reading process, and a smoothing process are individually processed by a dedicated LSI.
The buffer memories were also individually provided.

[0006]

However, in the conventional facsimile apparatus, the buffer memory for one line is individually provided for each of the two-dimensional encoding / decoding processing, the high image quality reading processing, and the smoothing processing. , Causing an increase in manufacturing cost. Further, although the high-quality image reading process and the encoding process, and the decoding process and the smoothing process are continuous processes, respectively, as a result of the separate provision of the buffer memories, the processes are divided, and the buffer memories are separated. Since the data transfer of
There is also a problem that the processing speed becomes slow.

The present invention has been proposed in view of the above points, and it is possible to reduce the manufacturing cost and increase the processing speed by sharing the buffer memory for referring to the previous line. An object is to provide an image communication device.

[0008]

In order to achieve the above object, the image communication apparatus of the invention described in claim 1 is a two-dimensional encoding / decoding for suppressing the redundancy of image data and performing band compression. An image communication device having an encoding / decoding means for performing an encoding process, comprising a high-quality reading process means for performing a high-quality reading process for reading a halftone image, an encoding / decoding means, and a high-quality reading process. Storage means having an image data storage area for at least one line commonly referred to as previous line data by the means.

According to this image communication device, since the image data storage area for at least one line of the storage means is shared by the encoding / decoding means and the high image quality reading processing means, waste of the image data storage area can be eliminated. The manufacturing cost can be reduced. Moreover, by synchronizing the high-quality image reading process and the encoding process, it is possible to simultaneously execute both the high-quality image reading process and the encoding process by simply accessing the same memory address during transmission. The speed can be increased. In addition, by synchronizing the decoding process and the high image quality reading process, it is possible to perform both the decoding process and the high image quality reading process at the same time only by accessing the same memory address when receiving. However, simultaneous operation can be realized, for example, high-quality reading of the transmitted document can be performed at high speed.

As the image communication apparatus, a facsimile apparatus can be considered, but the present invention is not limited to this, and the present invention can be applied to a copying machine or a personal computer having a built-in modem. The encoding / decoding processing method may be an MR encoding method or an MMR encoding method, but is not limited to this. An error diffusion process is conceivable as the high image quality reading process, but is not limited to this. The encoding / decoding means may be realized only by hardware, or a part thereof may be realized by software. When a part of the encoding / decoding means is implemented by software, the hardware may obtain the encoding mode from the image data string and the software may directly obtain the transmission code from the encoding mode. It is also possible to obtain a one-word intermediate code according to the encoding mode from the image data sequence and obtain the transmission code from the intermediate code by software. The high image quality reading processing means can be realized by a gate array, but is not limited to this.
The storage means may be SRAM or DRAM, but is not limited to this. Image data storage area
A storage area for encoding and / or decoding processing may be added to the storage area for high image quality reading processing by 1 bit for each pixel, or an empty portion of the storage area for high image quality reading processing may be encoded and It may be used as a storage area for decryption processing. That is, when the maximum readable original size is B4, an empty portion is created in the storage area for high-quality image reading processing when reading an A4 size original, and the empty portion is stored for encoding and / or decoding processing. It is used as an area.

Further, the image communication apparatus of the invention described in claim 2 has an encoding / decoding means for performing two-dimensional encoding / decoding processing in order to suppress the redundancy of image data and perform band compression. An image communication apparatus having the smoothing means for performing a smoothing process for smoothing the outer edge of a recorded image, and at least one line commonly referred to as previous line data by the encoding / decoding means and the smoothing means. And a storage unit having an image data storage area.

According to this image communication device, since the image data storage area for at least one line of the storage means is shared by the encoding / decoding means and the smoothing means, waste of the image data storage area can be eliminated and the image can be saved. Since the capacity of the data storage area may be small, the manufacturing cost can be reduced. Also, by synchronizing the decoding process and the smoothing process, it is possible to execute both the decoding process and the smoothing process at the same time by simply accessing the same memory address when receiving, thus increasing the processing speed. it can.

The smoothing means can be realized by a gate array, but is not limited to this.

Further, the image communication apparatus of the invention described in claim 3 comprises an encoding / decoding means for performing a two-dimensional encoding / decoding process in order to suppress the redundancy of image data and perform band compression. An image communication apparatus having the same, including a high-quality reading processing unit for performing a high-quality reading process for reading a halftone image, a smoothing unit for performing a smoothing process for smoothing an outer edge of a recorded image, and an encoding / decoding device. A storage unit having an image data storage area for at least one line that is commonly referred to as previous line data by the conversion unit, the high image quality reading processing unit, and the smoothing unit is provided.

According to this image communication device, since the image data storage area for at least one line of the storage means is shared by the encoding / decoding means, the high image quality reading processing means, and the smoothing means, the image data storage area Waste can be saved and manufacturing costs can be reduced. Moreover, by synchronizing the high image quality reading process and the encoding process, both the high image quality reading process and the encoding process can be simultaneously executed at the time of transmission by accessing the same memory address.
The processing speed can be increased. In addition, by synchronizing the decoding process and the smoothing process, it is possible to execute both the decoding process and the smoothing process at the same time by simply accessing the same memory address at the time of reception, which increases the processing speed. Can be converted.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a circuit block diagram of a main part of a facsimile apparatus as an example of an image communication apparatus according to the present invention. This facsimile apparatus has a CPU 1, an NCU 2, an R
AM3, modem 4, ROM 5, EEPROM 6, gate array 7, DMAC 9, buffer memory 10, reading unit 1
1, a recording unit 12, an operation unit 13, a display unit 14, and the like. CPU1, NCU2, RAM3, modem 4, ROM5, EEPROM6, gate array 7, DM
The AC 9 and the buffer memory 10 are connected to each other by a bus line. The bus lines include a data bus, an address bus, and a control signal line. A reading unit 11, a recording unit 12, an operation unit 13, and a display unit 14 are connected to the gate array 7. NCU2 is modem 4
And a telephone line 21.

The CPU 1 controls the entire facsimile apparatus and performs mutual conversion between the encoding mode and the transmission code and the reception code when encoding and decoding image data. The NCU 2 is connected to the telephone line 21 and performs network control. The RAM 3 stores various digital data such as image information. The modem 4 modulates a transmission code and demodulates a reception code. The ROM 5 stores various programs and code conversion tables. EEP
The ROM 6 stores registration data such as so-called one-touch dials and speed dials and flags. The gate array 7 functions as an input / output interface of the CPU 1 and performs high-quality image reading processing, encoding / decoding processing, and smoothing processing. DMAC9
Controls memory access to the RAM 3 and the like. The buffer memory 10 stores image data for high-quality reading processing, encoding / decoding processing, and smoothing processing. The reading unit 11 includes a light source, a CCD sensor, a document feed motor, and the like, reads a document, and outputs an image signal. The recording unit 12 includes a thermal transfer printer and the like, and records an image on a recording sheet based on image data. The operation unit 13 includes a key switch group and the like, and outputs an operation signal according to a user operation. The display unit 14
It is composed of an LCD and the like, and is controlled by the CPU 1 to perform various displays.

That is, the CPU 1 and the gate array 7
Constitutes an encoding / decoding means for performing a two-dimensional encoding / decoding process in order to suppress the redundancy of image data and perform band compression. The gate array 7 constitutes a high image quality reading processing means for performing a high image quality reading process for reading a halftone image. The gate array 7 constitutes a smoothing unit that performs a smoothing process for smoothing the outer edge of the recorded image. The buffer memory 10 is for encoding /
The decoding means, the high image quality reading processing means, and the smoothing means constitute a storage means having an image data storage area for at least one line commonly referred to as previous line data.

FIG. 2 is an explanatory diagram for explaining the structure of one pixel of the buffer memory 10. The buffer memory 10 is 3
SRAM3 to SRAM33, and SRAM3
1 is provided for 2048 addresses with 7 bits as one address unit.
2 is provided for 2048 addresses with 6 bits as one address unit. That is, the buffer memory 10
Is 2048, which corresponds to one line of a B4 size document.
Pixels can be processed, and for each address, 6 bits of SRAM 31 and 6 bits of SRAM 32 are used for two-dimensional filter processing in high image quality read processing, and 6 bits of SRAM 33 are used for high image quality read processing. Used for halftone processing in. In the high image quality reading process, image data of 6 bits, that is, 64 gradations is used as reference data. Also, for each address, the remaining 1 of SRAM 31
Bits are used in the encoding process. In the decryption process and the smoothing process, the SRAM 31 to SRAM 3
It is arbitrary which of the three bits is used and which bit is used. In the present embodiment, the SRA is used.
I am using M31.

Next, the operation of the facsimile apparatus thus constructed will be described.

At the time of transmission, the reading section 11 serially outputs an analog image signal corresponding to the image of the transmission original.
This image signal is subjected to high-quality reading processing by the gate array 7, encoded by the gate array 7 and the CPU 1, and sent to the telephone line 21 via the modem 4.

In the high image quality reading processing by the gate array 7, first, the image signal from the reading unit 11 is A / D converted and converted into 64 gradations, that is, 6-bit image data for each pixel. Then, shading processing, that is, distortion correction processing is applied to this image data, and further, 2
Dimension filtering is applied. For this two-dimensional filter processing, the image data one line before the line currently being processed is stored in the SRAM 31, and the image data one line after the line currently being processed is stored in the SRAM 32. At this time, the image data is 6 bits for each pixel, and SR
Since AM31 has 7 bits for each address unit, S
In the RAM 31, a 1-bit empty portion is generated for each address unit. This empty portion is used for the encoding process. Further, halftone processing is performed on the image data that has been subjected to the two-dimensional filter processing. For this halftone processing,
The image data one line before the line currently being processed is S
It is stored in the RAM 33. Further, binarization processing is performed on the image data subjected to the halftone processing. The binary image data thus obtained is used for detection of a change point by the gate array 7 and is sequentially stored in the bits for encoding processing of the SRAM 31.

That is, the gate array 7 and the CPU 1
In the encoding process by, first, the gate array 7
Detects the change point of the binary image data obtained by the high image quality reading process and generates the encoding mode. For this processing, the image data one line before the line currently being processed is stored in the SRAM 31. Since this image data is binary data, one bit may be used for each address unit of the SRAM 31. Then, the CPU 1 converts the coding mode generated by the gate array 7 into a transmission code by referring to a coding table stored in advance in the ROM 5, and outputs it to the modem 4.

Therefore, by synchronizing the two-dimensional filter process in the high image quality reading process and the encoding mode generating process in the encoding process, the high image quality reading process and the encoding process can be performed by accessing the same address of the SRAM 31. Can be run simultaneously.

At the time of reception, the modem 4 demodulates the carrier wave input via the telephone line 21 to take out the received code. Then, the CPU 1 refers to an encoding table stored in the ROM 5 in advance to convert the received code from the modem 4 into an encoding mode and outputs it to the gate array 7. This causes the gate array 7 to generate image data based on the encoding mode. For this processing, the image data one line before the line currently being processed is SR
The data is stored at a predetermined position in AM31 to SRAM33. Since this image data is binary data, one bit may be used for each address unit among the SRAM 31 to SRAM 33, but the SRAM 31 is used in this embodiment. Then, the gate array 7 performs a smoothing process on the binary image data and outputs it to the recording unit 12. For this processing, the image data one line before the line currently being processed is stored in the SRAM 31.
Of the image data two lines before the line currently being processed is stored at a predetermined position of the SRAM 32, and one line after the line currently being processed. The image data is stored in the SRAM 33 at a predetermined position. Since this image data is binary data, one bit may be used for each address unit of the SRAM 31 to SRAM 33. The recording unit 12, which receives the image data smoothed by the gate array 7, records the received image on a recording sheet based on the image data.

Therefore, by synchronizing the decoding process and the smoothing process, the decoding process and the smoothing process can be simultaneously executed by accessing the same address of the SRAM 31.

Since the encoding process and the decoding process are unnecessary at the time of copying, the high image quality reading process and the smoothing process are performed by using the bit of the SRAM 31 used for the encoding process at the time of transmission for the smoothing process. Can be done at the same time. In this case, since the previous line reference data in the smoothing process is only for one line, the smoothing performance is slightly reduced as compared with the case of referring to a plurality of lines, but it is sufficiently high as compared with the case where the smoothing process is not performed. It is possible to record quality.

In the above embodiment, the SRAM
Although 31 is set to 7 bits for each address unit, SRAM
Like the 32 and the SRAM 33, the SRAM 31 may have 6 bits for each address unit. By doing so, the cost of the SRAM 31 can be reduced. In this case, 1
Since the bits of the SRAM 31 used for the encoding process are exhausted when the high-quality image reading process of the image data of the B4 size document in which the number of pixels per line is 2048 is performed,
Two-dimensional encoding is not possible, but one-dimensional encoding is possible, so transmission is not lost. Also, A
Two-dimensional encoding is possible when high-quality reading processing is performed on image data of a 4-size document.
Today, where size-based manuscripts are the mainstream, there is no particular inconvenience even if this is done.

Further, in the above embodiment, the SRAM 31 to SRAM 33 are shared by the two-dimensional encoding / decoding process, the high image quality reading process and the smoothing process. However, the two-dimensional encoding / decoding process and the high image quality reading process are performed. SRA only with processing
The M31 to SRAM 33 may be shared, and the SRAM 3 can be formed only by two-dimensional encoding / decoding processing and smoothing processing.
1 to SRAM 33 may be shared. Two-dimensional encoding
The SRAMs 31 to 31 only need to be decrypted and smoothed.
When the SRAM 33 is shared, the number of bits required is small, so the number of bits per address of the SRAM 31 to SRAM 33 is reduced, or one SRAM is used.
May be used.

[0031]

As described above, according to the image communication apparatus of the invention described in claim 1, at least one of the storage means is provided.
Since the image data storage area for lines is shared by the encoding / decoding means and the high-quality image reading processing means, the image data storage area can be saved and the manufacturing cost can be reduced. Moreover,
By synchronizing the high-quality image reading process and the encoding process, it is possible to execute both the high-image quality reading process and the encoding process at the same time only by accessing the same memory address at the time of transmission. Can speed up. Also,
By synchronizing the decoding process and the high image quality reading process, it is possible to execute both the decoding process and the high image quality reading process at the same time by simply accessing the same memory address when receiving. Simultaneous operations can be realized, such as high-quality reading of the transmitted document at high speed.

According to the image communication apparatus of the invention described in claim 2, since the image data storage area for at least one line of the storage means is shared by the encoding / decoding means and the smoothing means, the image data Since the waste of the storage area can be eliminated and the capacity of the image data storage area can be small, the manufacturing cost can be reduced. Also, by synchronizing the decoding process and the smoothing process, when receiving,
Only by accessing the same memory address, both the decoding process and the smoothing process can be executed at the same time, and the processing speed can be increased.

Further, according to the image communication apparatus of the invention described in claim 3, the image data storage area for at least one line of the storage means is composed of the encoding / decoding means, the high image quality reading processing means and the smoothing means. Since it is shared, the waste of the image data storage area can be eliminated and the manufacturing cost can be reduced. Moreover, by synchronizing the high image quality reading process and the encoding process, both the high image quality reading process and the encoding process can be simultaneously executed at the time of transmission by accessing the same memory address. The processing speed can be increased.
In addition, by synchronizing the decoding process and the smoothing process, it is possible to execute both the decoding process and the smoothing process at the same time by simply accessing the same memory address at the time of reception, which increases the processing speed. Can be converted.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a main part of a facsimile apparatus as an example of an image communication apparatus according to the present invention.

FIG. 2 is an explanatory diagram illustrating a configuration of one pixel of a buffer memory included in the facsimile device shown in FIG.

[Explanation of symbols]

 1 CPU 2 NCU 3 RAM 4 Modem 5 ROM 6 EEPROM 7 Gate Array 9 DMAC 10 Buffer Memory 11 Reading Unit 12 Recording Unit

Claims (3)

[Claims] 1. A coding method for performing two-dimensional coding / decoding processing to suppress redundancy of image data and perform band compression.
An image communication device having a decoding means, comprising: a high-quality reading processing means for performing a high-quality reading processing for reading a halftone image; a front line including the encoding / decoding means and the high-quality reading processing means. An image communication apparatus comprising: a storage unit having an image data storage area for at least one line commonly referred to as data. 2. Encoding for performing two-dimensional encoding / decoding processing to suppress the redundancy of image data and perform band compression.
An image communication apparatus having a decoding means, wherein a smoothing means for performing a smoothing process for smoothing an outer edge of a recorded image, and the encoding / decoding means and the smoothing means are commonly referred to as previous line data. At least 1
An image communication device, comprising: a storage unit having an image data storage area for a line. 3. Encoding for performing a two-dimensional encoding / decoding process to suppress the redundancy of image data and perform band compression.
An image communication apparatus having a decoding means, comprising: a high quality reading processing means for performing a high quality reading processing for reading a halftone image; a smoothing means for performing a smoothing processing for smoothing an outer edge of a recorded image; Storage means having an image data storage area for at least one line which is commonly referred to as previous line data by the encoding / decoding means, the high image quality reading processing means and the smoothing means. Image communication device.