JPH0927515A - Semiconductor mounting method - Google Patents

Semiconductor mounting method

Info

Publication number
JPH0927515A
JPH0927515A JP7176327A JP17632795A JPH0927515A JP H0927515 A JPH0927515 A JP H0927515A JP 7176327 A JP7176327 A JP 7176327A JP 17632795 A JP17632795 A JP 17632795A JP H0927515 A JPH0927515 A JP H0927515A
Authority
JP
Japan
Prior art keywords
semiconductor
semiconductor element
mounting
circuit board
mounting method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7176327A
Other languages
Japanese (ja)
Inventor
Yasuo Nakatsuka
康雄 中塚
Kazumi Azuma
一美 東
Shu Mochizuki
周 望月
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP7176327A priority Critical patent/JPH0927515A/en
Publication of JPH0927515A publication Critical patent/JPH0927515A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor mounting method capable of obtaining the improved electric conduction of a semiconductor element on a mounting circuit substrate by uniform external-pressure connection in a semiconductor mounting field in a semiconductor package or a semiconductor module (for instance, a multichip module). SOLUTION: In a mounting method of electrically connecting a gold bump or a surface layer gold bump formed on the electrode of a semiconductor element 3 to a wiring connection part formed on a mounting circuit substrate 1, the semiconductor element 3 is temporarily fixed on the mounting circuit substrate 1 and after that, electric conduction is obtained by utilizing uniform shrinkage force from the outside of a tube-like thermal contractive molding body 8 containing a polycarbodiimide resin as a main component. The exchange and the replacement of the semiconductor element 3 can be easily and repeatedly performed by using the thermal contractive molding body 8.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体パッケージや半
導体モジュール(例えばマルチチップモジュール)にお
ける半導体実装分野において、実装回路基板上の半導体
素子を均一な外部加圧接続により良好な電気的導通を得
ることを可能にした半導体実装方法に関する。さらに好
ましい態様は、半導体素子の交換、取替えを容易に繰り
返し行うことが可能な半導体実装方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention, in the field of semiconductor mounting in a semiconductor package or a semiconductor module (for example, a multi-chip module), obtains good electrical continuity by uniform external pressure connection of semiconductor elements on a mounting circuit board. The present invention relates to a semiconductor mounting method that makes it possible. A more preferable aspect relates to a semiconductor mounting method that allows easy exchange and replacement of semiconductor elements.

【0002】[0002]

【従来の技術】半導体実装方式として、金属接合を用い
たワイヤーボンディング法、TAB法、半田バンプを用
いたフリップチップ法が知られているが、金属の固相−
固相拡散機構あるいは固相−液相反応機構を利用してい
るため、その接合温度は一般に200℃以上の高温領域
となり、微細線幅化している半導体素子に対して熱スト
レスによる損傷を与えやすいという問題が潜在してい
る。また、これらの金属接合は永久接合のため、接続不
良発生時に不良半導体素子の交換ができない。
2. Description of the Related Art As a semiconductor mounting method, a wire bonding method using metal bonding, a TAB method, and a flip chip method using solder bumps are known.
Since the solid phase diffusion mechanism or the solid phase-liquid phase reaction mechanism is used, the bonding temperature is generally in a high temperature region of 200 ° C. or higher, and a semiconductor element having a fine line width is likely to be damaged by thermal stress. There is a potential problem. Further, since these metal joints are permanent joints, a defective semiconductor element cannot be replaced when a connection failure occurs.

【0003】また、金属接合法では、液晶表示板のIT
O(インジウムチタンオキサイド)透明電極に対しては
半導体素子を実装することが出来ないため、最近ではメ
カニカル接合法として、異方導電膜や導電性粒子を混入
した樹脂接着法が用いられているが、これらの方法は半
導体素子と実装基板との間に熱硬化あるいは光硬化性樹
脂を充填して用いる方法のため、樹脂の経時劣化による
接着力低下によって導通不良が生じやすく、また、使用
時の熱応力や機械的外部応力によっても部分的な剥離に
よる導通不良が生じやすいという欠点がある。さらに、
これらの方法は半導体素子と実装基板との間に熱硬化あ
るいは光硬化性樹脂が充填されているため、不良半導体
素子の交換が困難であり交換、取替え性に難点がある。
Further, in the metal joining method, IT of the liquid crystal display panel is used.
Since a semiconductor element cannot be mounted on an O (indium titanium oxide) transparent electrode, an anisotropic conductive film or a resin bonding method in which conductive particles are mixed is recently used as a mechanical bonding method. Since these methods are used by filling a thermosetting or photo-curable resin between the semiconductor element and the mounting substrate, conduction failure is likely to occur due to a decrease in adhesive strength due to deterioration of the resin over time. There is a drawback in that conduction failure is likely to occur due to partial peeling due to thermal stress or mechanical external stress. further,
In these methods, since a thermosetting or photocurable resin is filled between the semiconductor element and the mounting substrate, it is difficult to replace the defective semiconductor element, and there is a problem in replacement and replaceability.

【0004】[0004]

【発明が解決しようとする課題】本発明は、従来の金属
接合法や樹脂接着法による永久接合を目的としたものと
は異なり、実装回路基板上の半導体素子を均一な外部加
圧接続により良好な電気的導通を得ることを可能にした
半導体実装方法、さらに好ましい態様は、半導体素子の
交換、取替えを容易に繰り返し行うことが可能な半導体
実装方法を提供することを目的とするものである。
SUMMARY OF THE INVENTION The present invention is different from the conventional one for the purpose of permanent bonding by metal bonding method or resin bonding method, and is preferable for uniform external pressure connection of semiconductor elements on a mounting circuit board. It is an object of the present invention to provide a semiconductor mounting method capable of obtaining excellent electrical continuity, and a more preferable aspect is to provide a semiconductor mounting method capable of easily and repeatedly exchanging and exchanging semiconductor elements.

【0005】[0005]

【課題を解決するための手段】本発明者らは、従来技術
の有する問題点を解決するために鋭意検討を行った結
果、実装回路基板上にIC、LSI、VLSI等の半導
体素子を電気的接続の位置合わせのための仮固定をした
後、ポリカルボジイミド樹脂を主成分とするチューブ状
の熱収縮性成形体で外周部から被覆し、先ず120℃以
下の加熱により成形体を収縮させて、その収縮力によっ
て半導体素子と実装回路基板との電気的導通をとり、更
にこれを熱硬化させ永久硬化成形体皮膜とすることによ
り、耐熱性、耐湿性などの各種信頼性に優れる半導体実
装方法を見出し、本発明を完成するに至ったものであ
る。
DISCLOSURE OF THE INVENTION As a result of intensive studies to solve the problems of the prior art, the inventors of the present invention have electrically mounted semiconductor elements such as IC, LSI and VLSI on a mounting circuit board. After temporary fixing for connection positioning, the tube-shaped heat-shrinkable molded article containing polycarbodiimide resin as a main component is coated from the outer peripheral portion, and the molded article is first shrunk by heating at 120 ° C. or lower, The contraction force provides electrical continuity between the semiconductor element and the mounting circuit board, and by further thermosetting this into a permanent-cured molded body film, a semiconductor mounting method with excellent reliability such as heat resistance and moisture resistance is provided. It was found that the present invention has been completed.

【0006】即ち、本発明は半導体素子の電極上に形成
された金バンプ又は表層金バンプと実装回路基板上に形
成された配線接続部とを電気的に接続する実装方法にお
いて、半導体素子を実装回路基板上に仮固定した後、チ
ューブ状のポリカルボジイミド樹脂を主成分とする熱収
縮性成形体の外部からの均一な収縮力を利用して電気的
導通を得ることを特徴とする半導体実装方法に関するも
のであり、仮固定の手段としては通常の接着剤であって
もよいが、導電性接着剤により上記バンプと配線接続部
を仮固定するのが好ましい。また、導電性接着剤は金属
粉末、金属メッキ樹脂ボール等の導電性材料とエチレン
−酢酸ビニル共重合体、ポリアミド、ポリアクリレー
ト、ポリエステル、ポリウレタンなどの熱可塑性接着樹
脂からなるものがより好ましい。
That is, the present invention is a mounting method for electrically connecting a gold bump or a surface layer gold bump formed on an electrode of a semiconductor element and a wiring connection portion formed on a mounting circuit board to mount the semiconductor element. A semiconductor mounting method characterized in that, after being temporarily fixed on a circuit board, electrical conduction is obtained by utilizing a uniform shrinking force from the outside of a heat-shrinkable molded body containing a tubular polycarbodiimide resin as a main component. The adhesive may be an ordinary adhesive as a temporary fixing means, but it is preferable to temporarily fix the bump and the wiring connecting portion with a conductive adhesive. Further, the conductive adhesive is more preferably composed of a conductive material such as metal powder or metal plated resin balls and a thermoplastic adhesive resin such as ethylene-vinyl acetate copolymer, polyamide, polyacrylate, polyester or polyurethane.

【0007】次に、本発明を図面を参照して具体的に説
明する。図1は半導体素子を実装回路基板上に仮固定し
た状態を示す斜視図、図2は図1のA−A’線により切
断して矢印方向から見た断面図であり、実装回路基板1
上の配線接続部(接続端子)2には、半導体素子3の電
極4上に設けられた金バンプ又は銅、ニッケルなどの金
属をコアとする表層金バンプ5が導電性接着剤6により
電気的接続の位置合わせのために仮固定されている。7
は回路パターンを示す。図3は、図2の如く半導体素子
を実装回路基板上に仮固定したユニットをポリカルボジ
イミド樹脂を主成分とするチューブ状の熱収縮性成形体
8に装填した状態を示す断面図であり、図4は上記のチ
ューブ状の熱収縮性成形体8を加熱してユニットに密着
させ、更にこれを熱硬化させ永久硬化成形体皮膜とした
半導体実装状態を示す断面図である。なお、上記の説明
では、実装回路基板上に一個の半導体素子を実装する例
を示しているが、半導体素子は複数個であってもよい。
Next, the present invention will be specifically described with reference to the drawings. FIG. 1 is a perspective view showing a state in which a semiconductor element is temporarily fixed on a mounting circuit board, and FIG. 2 is a sectional view taken along the line AA ′ of FIG.
In the upper wiring connection portion (connection terminal) 2, a gold bump provided on the electrode 4 of the semiconductor element 3 or a surface gold bump 5 having a metal such as copper or nickel as a core is electrically connected by a conductive adhesive 6. Temporarily fixed to align the connection. 7
Indicates a circuit pattern. FIG. 3 is a cross-sectional view showing a state in which the unit in which the semiconductor element is temporarily fixed on the mounting circuit board as shown in FIG. 2 is loaded in the tubular heat-shrinkable molded body 8 whose main component is polycarbodiimide resin. 4 is a cross-sectional view showing a semiconductor mounting state in which the above-mentioned tube-shaped heat-shrinkable molded body 8 is heated and brought into close contact with the unit, and further, this is thermally cured to form a permanent-cured molded body film. In the above description, one semiconductor element is mounted on the mounting circuit board, but a plurality of semiconductor elements may be mounted.

【0008】本発明に使用するポリカルボジイミド樹脂
を主成分とするチューブ状の熱収縮性成形体としては、
ポリカルボジイミド樹脂に必要により着色剤、充填剤等
を添加した溶液を公知の方法(例えばキャスティング
法)によりフィルムとし、その後40〜120℃の温度
で150〜400%に均一に延伸して熱収縮性フィルム
を作製し、そのフィルムをチューブ状に加工して熱収縮
性チューブとしたものが使用される。或いは、先にフィ
ルムをチューブ状に加工またはチューブ状のフィルムを
作製しておいて、その後チューブラー延伸法等公知の方
法で延伸してもよい。本フィルムはヒートシールなどの
方法によって加工できる。チューブ状に加工する際の寸
法は、完全収縮時の寸法が実装回路基板の寸法よりも1
0〜50%程度小さくなるように設計するのが好まし
い。また、収縮前のチューブの面積は、実装回路基板よ
りも10〜50%大きくするのが好ましい。
The tube-shaped heat-shrinkable molded article containing the polycarbodiimide resin as the main component used in the present invention is as follows:
A solution obtained by adding a colorant, a filler, etc. to a polycarbodiimide resin as needed is formed into a film by a known method (for example, a casting method), and then uniformly stretched to 150 to 400% at a temperature of 40 to 120 ° C to be heat-shrinkable. A film is produced, and the film is processed into a tube shape to obtain a heat-shrinkable tube. Alternatively, the film may be first processed into a tube or a tube-shaped film may be prepared, and then stretched by a known method such as a tubular stretching method. The film can be processed by a method such as heat sealing. When processing into a tube shape, the size when completely contracted is 1 more than the size of the mounting circuit board.
It is preferable to design so as to be reduced by about 0 to 50%. The area of the tube before contraction is preferably 10 to 50% larger than that of the mounted circuit board.

【0009】次に、半導体素子を仮固定した実装回路基
板を上記の熱収縮性成形体(チューブ)内に装填し、4
0〜120℃に加熱する。この時チューブは収縮して、
実装回路基板と密着し仮封止される。この時点では、チ
ューブは実装回路基板とは完全接着していないので、導
通検査の結果、不良の半導体素子が見つかれば、チュー
ブを裁断すれば不良半導体素子の交換が可能である。導
通検査の結果、良好であれば、前記チューブを加熱収縮
させた仮封止済みの実装回路基板を、更に150〜30
0℃好ましくは200〜250℃の温度で、1分〜2時
間好ましくは5分〜1時間の加熱処理を施すことによ
り、ポリカルボジイミド樹脂は架橋硬化して、信頼性に
優れた永久硬化皮膜となる。以上の操作で封止が完了
し、その皮膜は半導体実装基板全体を保護するものであ
る。
Next, the mounted circuit board on which the semiconductor element is temporarily fixed is loaded into the heat-shrinkable molded body (tube), and 4
Heat to 0-120 ° C. At this time the tube shrinks,
It is in close contact with the mounting circuit board and is temporarily sealed. At this point, the tube is not completely bonded to the mounted circuit board, so if a defective semiconductor element is found as a result of the continuity test, the defective semiconductor element can be replaced by cutting the tube. If the result of the continuity test is good, the heat-shrinkable mounted circuit board that has been temporarily sealed is further added to 150 to 30.
By subjecting the polycarbodiimide resin to a heat treatment at 0 ° C., preferably 200 to 250 ° C. for 1 minute to 2 hours, preferably 5 minutes to 1 hour, the polycarbodiimide resin is crosslinked and cured to form a highly reliable permanent cured film. Become. The sealing is completed by the above operation, and the film protects the entire semiconductor mounting substrate.

【0010】[0010]

【発明の効果】本発明の半導体実装方法は、半導体素子
の電極上に形成された金バンプ又は表層金バンプと実装
回路基板上に形成された配線接続部とを電気的に接続す
るに際して、半導体素子を実装回路基板上に仮固定した
後、チューブ状の熱収縮性成形体の外部からの均一な収
縮力を利用して電気的導通を得る外部加圧による接続方
式であるため、半導体素子が大型化しても均一な加圧が
可能であり、接続不良の発生が少ない特徴を有する。ま
た、チューブ状の熱収縮性成形体として、ポリカルボジ
イミド樹脂を使用しているので、架橋硬化前の状態では
容易に回路基板から成形体皮膜を取り除くことが出来る
ため、半導体素子の着脱や交換も可能であり、経済的に
も優れる実装方法である。さらに、架橋硬化後の成形体
皮膜は、外部環境保護用被覆材として使え、耐湿性等の
高い信頼性を得ることが出来る。
According to the semiconductor mounting method of the present invention, when the gold bumps or surface layer gold bumps formed on the electrodes of the semiconductor element and the wiring connecting portions formed on the mounting circuit board are electrically connected, After the element is temporarily fixed on the mounting circuit board, the semiconductor element is connected because it is a connection method by external pressurization to obtain electrical continuity by utilizing the uniform shrinking force from the outside of the tubular heat-shrinkable molded body. Even if the size is increased, uniform pressurization is possible, and there is a feature that connection failures are less likely to occur. In addition, since the polycarbodiimide resin is used as the tube-shaped heat-shrinkable molded product, the molded product coating can be easily removed from the circuit board in the state before cross-linking and curing, so it is also possible to attach and detach and replace the semiconductor element. It is possible and economically superior. Furthermore, the molded film after cross-linking and curing can be used as a coating material for protecting the external environment, and high reliability such as moisture resistance can be obtained.

【0011】[0011]

【実施例】次に、本発明を実施例により具体的に説明す
る。なお、以下の文中において部とあるのは重量部を意
味する。 実施例1 4,4’−ジフェニルメタンジイソシアネート100部
をカルボジイミド化触媒(3−メチル−1−フェニルホ
スホレン)0.06部と共にトルエン500部中で10
0℃、6時間反応させて、ポリカルボジイミド樹脂溶液
を得た。この溶液をガラス板上にキャスティングし、1
10℃の熱風乾燥機にて20分間乾燥して、厚さ70μ
mのポリカルボジイミドフィルムを得た。このフィルム
を80℃で2倍に延伸し、その状態で室温まで冷却し熱
収縮性フィルムとした後、直径3.5cmとなるように
チューブ状にして端部をヒートシーラーにて接合し、熱
収縮性チューブを作製した。
EXAMPLES Next, the present invention will be specifically described by way of examples. In the following text, "parts" means "parts by weight". Example 1 10 parts of 4,4'-diphenylmethane diisocyanate in 100 parts of toluene together with 0.06 part of a carbodiimidization catalyst (3-methyl-1-phenylphosphorene).
The reaction was carried out at 0 ° C for 6 hours to obtain a polycarbodiimide resin solution. Cast this solution onto a glass plate and
Dry for 20 minutes with a hot air dryer at 10 ° C to a thickness of 70μ
A polycarbodiimide film of m was obtained. This film was stretched twice at 80 ° C, cooled to room temperature in that state to form a heat-shrinkable film, then formed into a tube having a diameter of 3.5 cm, and the ends were joined with a heat sealer, followed by heat treatment. A shrinkable tube was made.

【0012】この熱収縮性チューブを4cmの長さに切
断し、マッシュルーム型金バンプ120個を有する半導
体素子を導電性接着剤(直径10μmのニッケル粒子を
分散させたエチレン−酢酸ビニル共重合体樹脂)で配線
接続部に仮固定した4cm×4cmで高さ3mmのセラ
ミック回路基板を上記チューブ内に装填し、100℃で
2分間加熱してチューブを収縮させ、フィルム面を回路
基板に完全密着させた。さらに、この回路基板を230
℃で1時間加熱処理してフィルムを硬化させ、永久硬化
皮膜とした。この回路基板の半導体素子の接続特性を評
価した結果、良好な電気的導通が得られ、剥離による導
通不良は生じなかった。また、この基板について150
℃で1000時間の高温放置試験を行ったが、皮膜に何
ら変化は見られなかった。
This heat-shrinkable tube was cut into a length of 4 cm, and a semiconductor element having 120 mushroom-type gold bumps was made into a conductive adhesive (ethylene-vinyl acetate copolymer resin in which nickel particles having a diameter of 10 μm were dispersed). ), The ceramic circuit board of 4 cm × 4 cm and 3 mm in height temporarily fixed to the wiring connection part is loaded into the tube, and heated at 100 ° C. for 2 minutes to shrink the tube to completely adhere the film surface to the circuit board. It was In addition, this circuit board
The film was cured by heating at 1 ° C for 1 hour to obtain a permanent cured film. As a result of evaluating the connection characteristics of the semiconductor element of this circuit board, good electrical conduction was obtained, and no conduction failure due to peeling occurred. Also, regarding this substrate, 150
A high temperature storage test was performed at 1000C for 1000 hours, but no change was observed in the film.

【0013】実施例2 実施例1と同一の手法にて熱収縮性チューブを作製し、
実施例1と同様に半導体素子を仮固定した同サイズのセ
ラミック回路基板を装填し、100℃で2分間加熱して
チューブを収縮させ、フィルム面を回路基板に完全密着
させた。ここで半導体素子の接続特性を評価した結果、
この半導体素子は不良であることが判った。そこで、フ
ィルムをカッターで切断して除去して、再度、実施例1
と同様にして熱収縮性チューブを用いてフィルム面を回
路基板に完全密着させた。この回路基板の半導体素子の
接続特性と剥離を評価した結果、良好な電気的導通が得
られ、剥離による導通不良は生じなかった。その後、こ
の基板を230℃で1時間加熱処理してフィルムを硬化
させ、永久硬化皮膜とした。この基板について150℃
で1000時間の高温放置試験を行ったが、皮膜に何ら
変化は見られなかった。
Example 2 A heat-shrinkable tube was prepared in the same manner as in Example 1,
A ceramic circuit board of the same size to which a semiconductor element was temporarily fixed was loaded as in Example 1, and heated at 100 ° C. for 2 minutes to shrink the tube, and the film surface was brought into complete contact with the circuit board. Here, as a result of evaluating the connection characteristics of the semiconductor element,
This semiconductor element was found to be defective. Then, the film is cut with a cutter and removed, and the film of Example 1 is again used.
Using the heat-shrinkable tube, the film surface was brought into complete contact with the circuit board in the same manner as in. As a result of evaluating the connection characteristics and peeling of the semiconductor element of this circuit board, good electrical conduction was obtained, and no conduction failure due to peeling occurred. Then, this substrate was heat-treated at 230 ° C. for 1 hour to cure the film, thereby forming a permanent cured film. About this substrate 150 ℃
After conducting a high temperature storage test for 1000 hours, no change was observed in the film.

【0014】比較例1 実施例1のポリカルボジイミド樹脂の代わりにポリプロ
ピレン製の直径3.5cmの熱収縮性チューブを用い
た。この熱収縮性チューブを4cmの長さに切断し、実
施例1と同様に半導体素子を仮固定した同サイズのセラ
ミック回路基板を装填し、100℃で2分間加熱してチ
ューブを収縮させ、フィルム面を回路基板に完全密着さ
せた。この回路基板の半導体素子の接続特性と剥離を評
価した結果、良好な電気的導通が得られ、剥離による導
通不良は生じなかった。しかし、この基板について15
0℃で高温放置試験を行ったところ、数時間でフィルム
が劣化してしまった。
Comparative Example 1 Instead of the polycarbodiimide resin of Example 1, a polypropylene heat shrinkable tube having a diameter of 3.5 cm was used. This heat-shrinkable tube was cut into a length of 4 cm, a ceramic circuit board of the same size in which a semiconductor element was temporarily fixed was loaded in the same manner as in Example 1, and the tube was shrunk by heating at 100 ° C. for 2 minutes to form a film. The surface was completely attached to the circuit board. As a result of evaluating the connection characteristics and peeling of the semiconductor element of this circuit board, good electrical conduction was obtained, and no conduction failure due to peeling occurred. However, about this board 15
When a high temperature storage test was performed at 0 ° C., the film deteriorated within several hours.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明において半導体素子を実装回路基板上に
仮固定したユニットの一実施例を示す斜視図である。
FIG. 1 is a perspective view showing an embodiment of a unit in which a semiconductor element is temporarily fixed on a mounting circuit board according to the present invention.

【図2】図1のA−A’線により切断して矢印方向から
見た断面図である。
FIG. 2 is a cross-sectional view taken along the line AA ′ of FIG. 1 and viewed in the direction of the arrow.

【図3】図2の半導体素子を実装回路基板上に仮固定し
たユニットをポリカルボジイミド樹脂を主成分とするチ
ューブ状の熱収縮性成形体に装填した状態を示す断面図
である。
FIG. 3 is a cross-sectional view showing a state in which the unit in which the semiconductor element of FIG. 2 is temporarily fixed on a mounting circuit board is loaded into a tubular heat-shrinkable molded body containing a polycarbodiimide resin as a main component.

【図4】図3のチューブ状の熱収縮性成形体を加熱して
ユニットに密着させ、更にこれを熱硬化させ永久硬化成
形体皮膜とした半導体実装状態を示す断面図である。
FIG. 4 is a cross-sectional view showing a semiconductor mounted state in which the tube-shaped heat-shrinkable molded body of FIG. 3 is heated and brought into close contact with a unit, and further this is heat-cured to form a permanent-cured molded body film.

【符号の説明】[Explanation of symbols]

1 実装回路基板 2 配線接続部 3 半導体素子 5 金バンプ 6 導電性接着剤 8 チューブ状の熱収縮性成形体 DESCRIPTION OF SYMBOLS 1 Mounted circuit board 2 Wiring connection part 3 Semiconductor element 5 Gold bump 6 Conductive adhesive 8 Tube-shaped heat-shrinkable molded body

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子の電極上に形成された金バン
プ又は表層金バンプと実装回路基板上に形成された配線
接続部とを電気的に接続する実装方法において、半導体
素子を実装回路基板上に仮固定した後、ポリカルボジイ
ミド樹脂を主成分とするチューブ状の熱収縮性成形体の
外部からの均一な収縮力を利用して電気的導通を得るこ
とを特徴とする半導体実装方法。
1. A mounting method for electrically connecting a gold bump or a surface layer gold bump formed on an electrode of a semiconductor element and a wiring connection portion formed on the mounting circuit board, wherein the semiconductor element is mounted on the mounting circuit board. After being temporarily fixed to, a semiconductor mounting method characterized in that electrical conduction is obtained by utilizing a uniform shrinking force from the outside of a tubular heat-shrinkable molded body containing a polycarbodiimide resin as a main component.
【請求項2】 導電性接着剤により仮固定することを特
徴とする請求項1記載の半導体実装方法。
2. The semiconductor mounting method according to claim 1, wherein the semiconductor mounting method is temporary fixing with a conductive adhesive.
【請求項3】 導電性接着剤が、導電性材料と熱可塑性
接着樹脂からなることを特徴とする請求項2記載の半導
体実装方法。
3. The semiconductor mounting method according to claim 2, wherein the conductive adhesive comprises a conductive material and a thermoplastic adhesive resin.
JP7176327A 1995-07-12 1995-07-12 Semiconductor mounting method Pending JPH0927515A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7176327A JPH0927515A (en) 1995-07-12 1995-07-12 Semiconductor mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7176327A JPH0927515A (en) 1995-07-12 1995-07-12 Semiconductor mounting method

Publications (1)

Publication Number Publication Date
JPH0927515A true JPH0927515A (en) 1997-01-28

Family

ID=16011655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7176327A Pending JPH0927515A (en) 1995-07-12 1995-07-12 Semiconductor mounting method

Country Status (1)

Country Link
JP (1) JPH0927515A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7257001B2 (en) * 2004-04-23 2007-08-14 Shmuel Erez Device and method for fastener-free connection via a heat-shrinkable insert
CN102516093A (en) * 2011-12-08 2012-06-27 江苏博特新材料有限公司 Gemini type asphalt emulsifier and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7257001B2 (en) * 2004-04-23 2007-08-14 Shmuel Erez Device and method for fastener-free connection via a heat-shrinkable insert
CN102516093A (en) * 2011-12-08 2012-06-27 江苏博特新材料有限公司 Gemini type asphalt emulsifier and preparation method thereof

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