JPH09275155A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH09275155A JPH09275155A JP8081219A JP8121996A JPH09275155A JP H09275155 A JPH09275155 A JP H09275155A JP 8081219 A JP8081219 A JP 8081219A JP 8121996 A JP8121996 A JP 8121996A JP H09275155 A JPH09275155 A JP H09275155A
- Authority
- JP
- Japan
- Prior art keywords
- base
- semiconductor device
- case
- groove
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体装置に関す
る。TECHNICAL FIELD The present invention relates to a semiconductor device.
【０００２】[0002]
【従来の技術】一般に素子の発熱量が大きい半導体装置
では、放熱用のベースの上に素子を搭載し、素子を外界
から守るためベースにケースを被せ、素子を封止する構
造になっている。この構造で問題となるのは、ケースと
ベースの密着性である。もしケースとベースのあいだに
すき間があると、ここから水分が浸入し、素子の信頼性
が低下することになる。2. Description of the Related Art Generally, in a semiconductor device in which a large amount of heat is generated from an element, the element is mounted on a base for heat radiation, and a case is put on the base to protect the element from the outside, and the element is sealed. . The problem with this structure is the adhesion between the case and the base. If there is a gap between the case and the base, water will infiltrate from here and the reliability of the device will be reduced.
【０００３】そこで、従来よりケースとベースの接着に
は工夫が施されている。例えば、特開平4−342158 号，
特開平5−267484 号，特開平5−304248 号公報に記載の
半導体装置では、ケースをベースの側面にて接着した構
造となっている。一般にケースの材料は電気絶縁性の高
い樹脂が用いられ、ベースの材料は熱伝導率の高い金属
が用いられる。したがって、ケースをベースの側面にて
高温で接着すると、樹脂の線膨張係数は金属の線膨張係
数より大きいので、ケースが冷却時に収縮し、ベースの
側面を締め付けることになり、密着性がよくなる。Therefore, conventionally, a device has been devised for bonding the case and the base. For example, JP-A-4-342158,
The semiconductor devices described in JP-A-5-267484 and JP-A-5-304248 have a structure in which the case is bonded to the side surface of the base. Generally, a resin having a high electric insulation property is used as a material of the case, and a metal having a high thermal conductivity is used as a material of the base. Therefore, when the case is adhered to the side surface of the base at a high temperature, the linear expansion coefficient of the resin is larger than the linear expansion coefficient of the metal, so that the case contracts during cooling and tightens the side surface of the base, resulting in good adhesion.
【０００４】これらの構造の欠点は、ベースの寸法をケ
ースより小さくしなければならないことにある。ところ
が、放熱性の向上やベース取り付けベースをねじ孔に設
置のため、ベースをケースの周囲にはみ出させなければ
ならない場合がある。このような場合、ケースの取り付
け方法として、三つの方法が考えられる。The disadvantage of these structures is that the dimensions of the base must be smaller than the case. However, in order to improve heat dissipation and to install the base in the screw hole, it may be necessary to extend the base around the case. In such a case, there are three possible methods for attaching the case.
【０００５】第１の方法は、図５に示すように、ケース
の縁の先端をベース表面に突き当て、接着剤で固定する
方法である。この方法ではケースとベースの密着が接着
剤のみに依存しているので、熱応力などにより接着剤が
剥離すると、たちまち水分がパッケージ内に浸入する。The first method, as shown in FIG. 5, is a method of abutting the tip of the edge of the case against the surface of the base and fixing it with an adhesive. In this method, since the adhesion between the case and the base depends only on the adhesive, when the adhesive peels off due to thermal stress or the like, moisture immediately enters the package.
【０００６】第２の方法は、図６に示すように、ベース
に貫通孔を設け、これにケースを差し込む方法である。
このような構造が特開平6−188335 号公報に記載されて
いる。しかしこの方法は、ケース先端の全ての部分に孔
をあけるわけいにはいかないので（全てにあけるとベー
スは中心部と周辺部に分断されてしまう）、結局はケー
スとベースの突き合わせ部分が生じ、第１の方法と同じ
理由で水分の浸入が防げない。The second method is to provide a through hole in the base and insert the case into the through hole, as shown in FIG.
Such a structure is described in JP-A-6-188335. However, with this method, it is not possible to make holes in all parts of the case tip (if it is opened in all, the base will be divided into the central part and the peripheral part), so the case and the butted part of the base will eventually occur. For the same reason as the first method, infiltration of water cannot be prevented.
【０００７】第３の方法は、図７に示すように、ベース
に溝を設けこれにケースを嵌め込む方法である。図７の
ようなＶ字型の溝であれば、プレス加工で簡単に形成で
き、生産性に優れている。しかし、図７に示した溝は、
温度変化が生じると、ケースとベースにすき間が生じや
すい。このことを図８により説明する。図８は図７の左
側のケースとベースの嵌め合い部分を示したものであ
る。高温で接着した後の冷却過程で、ケース（樹脂製）
の線膨張係数はベース（金属製）の線膨張係数より大き
いので、ケースの収縮により（ａ）に示した方向の力が
働く。この時、溝の形状がＶ字型であると、ケースは
（ｂ）に示したように溝の面を滑り上がり、すき間が生
じてしまう。そしてすき間が発生する。The third method, as shown in FIG. 7, is a method in which a groove is provided in the base and a case is fitted into the groove. The V-shaped groove as shown in FIG. 7 can be easily formed by press working and is excellent in productivity. However, the groove shown in FIG.
A gap between the case and the base easily occurs when the temperature changes. This will be described with reference to FIG. FIG. 8 shows a fitting portion between the case and the base on the left side of FIG. Case (made of resin) in the cooling process after bonding at high temperature
Since the linear expansion coefficient of is larger than that of the base (made of metal), the force in the direction shown in (a) acts due to the contraction of the case. At this time, if the shape of the groove is V-shaped, the case slides up the surface of the groove as shown in (b) and a gap is generated. And a gap is generated.
【０００８】これを防ぐには、溝の形を図９のように矩
型にすればよいが、この形状を得るには機械加工が必要
であり、生産性に問題がある。To prevent this, the groove may be formed in a rectangular shape as shown in FIG. 9, but machining is required to obtain this shape, and there is a problem in productivity.
【０００９】以上の問題は、ケースにより封止した半導
体装置ばかりでなく、モールド樹脂で封止した半導体装
置についても同様な問題が生じる。The above problems occur not only in the semiconductor device sealed by the case but also in the semiconductor device sealed by the mold resin.
【００１０】[0010]
【発明が解決しようとする課題】本発明は、ベースをパ
ッケージの周囲にはみ出させた構造の半導体装置で、封
止信頼性を向上させ、しかも生産性に優れた構造を提供
することを課題とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device having a structure in which a base is protruded around a package, which has improved sealing reliability and is excellent in productivity. To do.
【００１１】[0011]
【課題を解決するための手段】上記課題は、ベースに溝
を設け、この溝にケースの縁を嵌め込み、この溝の断面
形状が、溝のパッケージ中心に近い方の面がベース面に
対して垂直であり、パッケージ中心から遠い方の面とベ
ース面のなす角が鈍角であるように形成することで解決
する。ベースの溝をこのような形状にするとケースの収
縮によってケースの内面と溝の垂直面が密着し、封止信
頼性が向上する。しかもこのような形状の溝は、プレス
加工により容易に形成できるので、生産性にも優れてい
る。[Means for Solving the Problems] The above problem is that a groove is provided in a base, and an edge of a case is fitted into the groove, and the cross-sectional shape of the groove is closer to the package center than the base surface. The problem is solved by forming the surface that is vertical and that is far from the center of the package and the base surface to form an obtuse angle. When the groove of the base has such a shape, contraction of the case brings the inner surface of the case into close contact with the vertical surface of the groove, thereby improving the sealing reliability. Moreover, since the groove having such a shape can be easily formed by press working, it is excellent in productivity.
【００１２】[0012]
【発明の実施の形態】以下、本発明の実施例について図
を用いて説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００１３】図１は本発明の第１実施例の半導体装置の
断面図である。二つの半導体素子１が絶縁板１０に接続
されている。絶縁板１０に設けられた内部配線板３と素
子１はワイヤ２により電気的に接続されている。内部配
線板３には外部端子４が接続されている。絶縁板１０は
ベース６に接続されており、素子１や絶縁板１０などは
ケース５に覆われて封止されている。ベースに半導体装
置取り付け孔９を設けるため、ベースはケースからはみ
出た構造になっている。FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention. Two semiconductor elements 1 are connected to the insulating plate 10. The internal wiring board 3 provided on the insulating plate 10 and the element 1 are electrically connected by a wire 2. External terminals 4 are connected to the internal wiring board 3. The insulating plate 10 is connected to the base 6, and the element 1 and the insulating plate 10 are covered with the case 5 and sealed. Since the semiconductor device mounting hole 9 is provided in the base, the base has a structure protruding from the case.
【００１４】本実施例では、ベース６にケース固定溝８
が設けられており、この溝にケース５の縁が嵌め込まれ
ている。この溝の断面形状は、溝のパッケージ中心に近
い方の面がベース面に対して垂直であり、パッケージ中
心から遠い方の面とベース面のなす角が鈍角である。さ
らにこの溝はベース表面に閉ループ状に設けられてい
る。ケース５の縁の先端は、ケース固定溝８と同一の形
状になっている。さらにケース５とベース６は接着剤７
により接着されている。この接着剤として加熱硬化型の
接着剤を用いると、硬化後の冷却時にケースが収縮し、
ケースの内面と溝の垂直面が密着するので、封止信頼性
が向上する。ケース固定溝８は、刃状の加工治具を用い
てプレス加工で簡単に形成することができる。In this embodiment, the base 6 has a case fixing groove 8 formed therein.
Is provided, and the edge of the case 5 is fitted into this groove. In the cross-sectional shape of the groove, the surface of the groove closer to the package center is perpendicular to the base surface, and the angle formed by the surface farther from the package center and the base surface is an obtuse angle. Furthermore, this groove is provided in a closed loop shape on the surface of the base. The edge of the case 5 has the same shape as the case fixing groove 8. Further, the case 5 and the base 6 are adhesive 7
It is adhered by. When a heat-curable adhesive is used as this adhesive, the case shrinks during cooling after curing,
Since the inner surface of the case and the vertical surface of the groove are in close contact with each other, the sealing reliability is improved. The case fixing groove 8 can be easily formed by press working using a blade-shaped working jig.
【００１５】本発明の第２実施例の半導体装置の断面図
を図２に示す。本実施例では、パッケージ内部にコーテ
ィング樹脂１１が封入されている。この樹脂は、ケース
５をベース６に接着後、ケースに設けられた注入孔から
注入される。この時、第１実施例の場合と同様にケース
がベースに密着しているので、コーティング樹脂がケー
スとベースのすき間から流出する恐れがなくなる。コー
ティング樹脂注入後、ベーキングを行ってコーティング
樹脂を硬化させる。FIG. 2 is a sectional view of the semiconductor device according to the second embodiment of the present invention. In this embodiment, the coating resin 11 is enclosed inside the package. This resin is injected through the injection hole provided in the case after the case 5 is bonded to the base 6. At this time, since the case is in close contact with the base as in the case of the first embodiment, there is no fear that the coating resin will flow out from the gap between the case and the base. After injecting the coating resin, baking is performed to cure the coating resin.
【００１６】本発明の第３実施例の半導体装置の断面図
を図３に示す。本実施例では、ケースの代わりに封止樹
脂１２で半導体素子１などが封止されている。ベース６
には、樹脂固定溝１３が設けられており、この溝の形状
は第１実施例と同様の形状である。封止樹脂１２は、ト
ランスファモールドにより所定の形状に形成される。し
たがって、樹脂の硬化収縮と熱収縮により、溝の垂直面
と樹脂が密着するので気密性に優れ、さらに図８で示し
たような変形も生じないので樹脂と他の部分との剥離を
防ぐことができる。FIG. 3 is a sectional view of a semiconductor device according to the third embodiment of the present invention. In this embodiment, the semiconductor element 1 and the like are sealed with the sealing resin 12 instead of the case. Base 6
The resin fixing groove 13 is provided in the groove, and the shape of this groove is the same as that of the first embodiment. The sealing resin 12 is formed in a predetermined shape by transfer molding. Therefore, due to the curing shrinkage and heat shrinkage of the resin, the vertical surface of the groove is in close contact with the resin, so that the airtightness is excellent, and the deformation as shown in FIG. 8 does not occur. You can
【００１７】本発明の第４実施例の半導体装置の断面図
を図４に示す。本実施例でもケースの代わりに封止樹脂
１２を用いており、ベースには樹脂固定溝１３が設けら
れている。溝の断面は、流れ込んだ樹脂の上下方向の動
きを係止する形状になっている。したがって、本実施例
では封止樹脂とベースとのせん断方向の動きばかりでな
く、垂直方向の動きも拘束することができ、さらに封止
信頼性が向上する。この溝は、一旦第３実施例の形状の
溝を形成した後に、溝の垂直部分の頂点を再度プレスす
ることにより得ることができる。FIG. 4 is a sectional view of a semiconductor device according to the fourth embodiment of the present invention. Also in this embodiment, the sealing resin 12 is used instead of the case, and the resin fixing groove 13 is provided in the base. The cross section of the groove is shaped to lock the vertical movement of the resin that has flowed in. Therefore, in this embodiment, not only the movement of the sealing resin and the base in the shearing direction but also the movement in the vertical direction can be restrained, and the sealing reliability is further improved. This groove can be obtained by once forming the groove having the shape of the third embodiment and then pressing the apex of the vertical portion of the groove again.
【００１８】[0018]
【発明の効果】本発明によると、ベースをパッケージの
周囲にはみ出させた構造の半導体装置の封止信頼性を向
上させる。According to the present invention, the sealing reliability of the semiconductor device having a structure in which the base is protruded around the package is improved.
【図１】本発明の第１実施例の半導体装置の断面図。FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.
【図２】本発明の第２実施例の半導体装置の断面図。FIG. 2 is a sectional view of a semiconductor device according to a second embodiment of the present invention.
【図３】本発明の第３実施例の半導体装置の断面図。FIG. 3 is a sectional view of a semiconductor device according to a third embodiment of the present invention.
【図４】本発明の第４実施例の半導体装置の断面図。FIG. 4 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.
【図５】従来の半導体装置の断面図。FIG. 5 is a cross-sectional view of a conventional semiconductor device.
【図６】従来の半導体装置の断面図。FIG. 6 is a sectional view of a conventional semiconductor device.
【図７】従来の半導体装置の断面図。FIG. 7 is a cross-sectional view of a conventional semiconductor device.
【図８】従来の半導体装置の不具合を説明するための半
導体装置の一部の断面図。FIG. 8 is a partial cross-sectional view of a semiconductor device for explaining a defect of a conventional semiconductor device.
【図９】従来の半導体装置の断面図。FIG. 9 is a cross-sectional view of a conventional semiconductor device.
【符号の説明】 １…半導体素子、２…ワイヤ、３…内部配線板、４…外
部端子、５…ケース、６…ベース、７…接着剤、８…ケ
ース固定溝、９…半導体装置取り付け孔、１０…絶縁
板。[Description of Reference Signs] 1 ... Semiconductor element, 2 ... Wire, 3 ... Internal wiring board, 4 ... External terminal, 5 ... Case, 6 ... Base, 7 ... Adhesive agent, 8 ... Case fixing groove, 9 ... Semiconductor device mounting hole 10 ... Insulating plate.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 丹波 昭浩 茨城県日立市大みか町七丁目１番１号 株 式会社日立製作所日立研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akihiro Tanba 7-1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Hitachi Research Laboratory
Claims (16)
たベースと、外部端子と、前記半導体素子の電極と前記
外部端子とを電気的に接続する手段を有し、ケースを前
記ベースに被せることにより前記素子を外界から封止し
た構造の半導体装置において、前記ベースに溝を設け、
前記溝に前記ケースの縁を嵌め込み、前記溝の断面形状
が、前記溝のパッケージ中心に近い方の面が前記ベース
面に対して垂直であり、前記パッケージ中心から遠い方
の面と前記ベース面のなす角が鈍角であることを特徴と
する半導体装置。1. A semiconductor element, a base to which the semiconductor element is connected, an external terminal, and means for electrically connecting an electrode of the semiconductor element and the external terminal, and a case is covered on the base. Thus, in the semiconductor device having a structure in which the element is sealed from the outside, a groove is provided in the base,
The edge of the case is fitted into the groove, and the cross-sectional shape of the groove is such that the surface of the groove closer to the package center is perpendicular to the base surface, and the surface farther from the package center and the base surface. A semiconductor device having an obtuse angle.
ベースを加熱硬化型接着剤で接着した半導体装置。2. The semiconductor device according to claim 1, wherein the edge of the case and the base are bonded to each other with a thermosetting adhesive.
数が前記ベースの線膨張係数より大きい半導体装置。3. The semiconductor device according to claim 1, wherein the linear expansion coefficient of the case is larger than the linear expansion coefficient of the base.
ベースとの間に絶縁板が挿入されている半導体装置。4. The semiconductor device according to claim 1, wherein an insulating plate is inserted between the semiconductor element and the base.
個設けられている半導体装置。5. The semiconductor device according to claim 4, wherein a plurality of the semiconductor elements are provided.
なくとも半導体素子を覆うように樹脂が充填されている
半導体装置。6. The semiconductor device according to claim 1, wherein the case is filled with a resin so as to cover at least the semiconductor element.
前記ベースが金属製である半導体装置。7. The case according to claim 1, wherein the case is made of resin,
A semiconductor device in which the base is made of metal.
形状が前記ベースに設けた溝の断面形状に概略一致して
いる半導体装置。8. The semiconductor device according to claim 1, wherein a cross-sectional shape of an edge of the case is substantially the same as a cross-sectional shape of a groove provided in the base.
面において閉ループをなしている半導体装置。9. The semiconductor device according to claim 1, wherein the groove forms a closed loop on the surface of the base.
れたベースと、外部端子と、前記半導体素子の電極と前
記外部端子とを電気的に接続する部材を有し、前記素子
と、前記外部端子の一部と、電気的接続部材を樹脂によ
り外界から封止した構造の半導体装置において、前記ベ
ースに溝を設け、前記溝に前記封止樹脂を流し込み、前
記溝の断面形状が、前記溝のパッケージ中心に近い方の
面が前記ベース面に対して垂直であり、前記パッケージ
中心から遠い方の面とベース面のなす角が鈍角であるこ
とを特徴とする半導体装置。10. A semiconductor element, a base to which the semiconductor element is connected, an external terminal, and a member for electrically connecting an electrode of the semiconductor element and the external terminal, the element and the external element. In a semiconductor device having a structure in which a part of a terminal and an electrical connection member are sealed from the outside with a resin, a groove is provided in the base, the sealing resin is poured into the groove, and the cross-sectional shape of the groove is the groove. The surface closer to the package center is perpendicular to the base surface, and the angle formed by the surface farther from the package center and the base surface is an obtuse angle.
膨張係数がベースの線膨張係数より大きい半導体装置。11. The semiconductor device according to claim 10, wherein the linear expansion coefficient of the sealing resin is larger than the linear expansion coefficient of the base.
化収縮する材料である半導体装置。12. The semiconductor device according to claim 10, wherein the sealing resin is a material that cures and shrinks.
前記ベースとの間に絶縁板が挿入されている半導体装
置。13. The semiconductor device according to claim 10, wherein an insulating plate is inserted between the semiconductor element and the base.
複数個設けられている半導体装置。14. The semiconductor device according to claim 13, wherein a plurality of the semiconductor elements are provided.
製である半導体装置。15. The semiconductor device according to claim 10, wherein the base is made of metal.
れたベースと、外部端子と、前記半導体素子の電極と前
記外部端子とを電気的に接続する部材を有し、前記素子
と、前記外部端子の一部と、電気的接続部材を樹脂によ
り外界から封止した構造の半導体装置において、前記ベ
ースに溝を設け、前記溝に前記封止樹脂を流し込み、前
記溝の断面が、流れ込んだ樹脂の上下方向の動きを係止
する形状であることを特徴とする半導体装置。16. A semiconductor element, a base to which the semiconductor element is connected, an external terminal, and a member for electrically connecting the electrode of the semiconductor element and the external terminal, the element and the external element. In a semiconductor device having a structure in which a part of a terminal and an electrical connection member are sealed from the outside with a resin, a groove is provided in the base, the sealing resin is poured into the groove, and a cross section of the groove is filled with resin. A semiconductor device having a shape that locks the vertical movement of the.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8081219A JPH09275155A (en) | 1996-04-03 | 1996-04-03 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8081219A JPH09275155A (en) | 1996-04-03 | 1996-04-03 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09275155A true JPH09275155A (en) | 1997-10-21 |
Family
ID=13740378
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8081219A Pending JPH09275155A (en) | 1996-04-03 | 1996-04-03 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09275155A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007036014A (en) * | 2005-07-28 | 2007-02-08 | Sanyo Electric Co Ltd | Circuit device |
| WO2008102674A1 (en) * | 2007-02-22 | 2008-08-28 | Sanden Corporation | Electric compressor with integral inverter |
| JP2012204366A (en) * | 2011-03-23 | 2012-10-22 | Mitsubishi Electric Corp | Semiconductor device |
| JP6399272B1 (en) * | 2017-09-05 | 2018-10-03 | 三菱電機株式会社 | Power module, manufacturing method thereof, and power conversion device |
| WO2019049400A1 (en) * | 2017-09-05 | 2019-03-14 | 三菱電機株式会社 | Power module, production method therefor, and power conversion device |
| JP2020053545A (en) * | 2018-09-27 | 2020-04-02 | アール・ビー・コントロールズ株式会社 | Electronic unit |
-
1996
- 1996-04-03 JP JP8081219A patent/JPH09275155A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007036014A (en) * | 2005-07-28 | 2007-02-08 | Sanyo Electric Co Ltd | Circuit device |
| WO2008102674A1 (en) * | 2007-02-22 | 2008-08-28 | Sanden Corporation | Electric compressor with integral inverter |
| JP2008202564A (en) * | 2007-02-22 | 2008-09-04 | Sanden Corp | Electric compressor with built-in inverter |
| JP2012204366A (en) * | 2011-03-23 | 2012-10-22 | Mitsubishi Electric Corp | Semiconductor device |
| JP6399272B1 (en) * | 2017-09-05 | 2018-10-03 | 三菱電機株式会社 | Power module, manufacturing method thereof, and power conversion device |
| WO2019049400A1 (en) * | 2017-09-05 | 2019-03-14 | 三菱電機株式会社 | Power module, production method therefor, and power conversion device |
| JP2020053545A (en) * | 2018-09-27 | 2020-04-02 | アール・ビー・コントロールズ株式会社 | Electronic unit |
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