JPH09271173A - Fault sensing circuit of inverters with parallel connection structure - Google Patents

Fault sensing circuit of inverters with parallel connection structure

Info

Publication number
JPH09271173A
JPH09271173A JP8103739A JP10373996A JPH09271173A JP H09271173 A JPH09271173 A JP H09271173A JP 8103739 A JP8103739 A JP 8103739A JP 10373996 A JP10373996 A JP 10373996A JP H09271173 A JPH09271173 A JP H09271173A
Authority
JP
Japan
Prior art keywords
current
output
cross
fault
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8103739A
Other languages
Japanese (ja)
Inventor
Hiroki Kubo
洋記 久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Electric Manufacturing Ltd
Original Assignee
Toyo Electric Manufacturing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Electric Manufacturing Ltd filed Critical Toyo Electric Manufacturing Ltd
Priority to JP8103739A priority Critical patent/JPH09271173A/en
Publication of JPH09271173A publication Critical patent/JPH09271173A/en
Pending legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)
  • Protection Of Static Devices (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

PROBLEM TO BE SOLVED: To sense surely a fault of unverters with a parallel connection structure, by providing a low-pass filter whereto the output of a computer for the cross current of the inverters is inputted so that it feeds a fault sensing level top a competitor. SOLUTION: The respective output currents of inverters 11, 12, 13 which are sensed respectively by current sensors 31, 32, 33 are inputted to a cross-current sensing circuit 41 to sense three-phase cross currents I41 U-I41 W of the inverter 11. Then, summing the cross currents I41 U-I41 W, the absolute value of the summed current is computed by a computer 51 to give a sensing level FL51' in its output. Further, the sensing level FL51' is inputted to a low-pass filter 71 to output a sensing level FL71 to a comparator 61'. The conspirator 61' comports the sensing level FL71 with a set level FL* to output a fault signal Sf'. Therefore, even in the case of the short-circuit fault of a dummy resistor, the fault can be sensed surely without raising the set level FL* for the fault signal Sf'.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、大容量の電源装置
等に用いられる並列接続構成インバ−タに係わり、特に
横流検出に基づき故障検出する並列接続構成インバ−タ
の故障検出回路に、関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a parallel connection configuration inverter used for a large-capacity power supply device or the like, and more particularly to a parallel connection configuration inverter failure detection circuit for detecting a failure based on cross current detection. It is a thing.

【0002】[0002]

【従来の技術】無停電電源装置(いわゆるUPS)など
大容量の電源装置等に、複数台のインバ−タが並列接続
された並列接続構成のインバ−タが用いられている。さ
らには、かような並列接続構成インバ−タには、横流検
出に基づき故障検出する故障検出回路が、採用されてい
る。これは、図3および図4の如くである。
2. Description of the Related Art Inverters having a parallel connection configuration in which a plurality of inverters are connected in parallel are used for large-capacity power supply devices such as uninterruptible power supply devices (so-called UPS). Furthermore, such a parallel connection type inverter employs a failure detection circuit that detects a failure based on cross current detection. This is as in FIGS.

【0003】図3は従来技術の説明のため示したもので
あって、11,12,13は3台並列運転例のインバ−タ、2
はインバ−タ11,12,13に共通接続された負荷装置、31
は電流検出器、41は横流検出回路、51は演算器、61はコ
ンパレ−タである。また、図4は横流検出回路の説明の
ため示し、32,33は電流検出器31と同様にインバ−タ1
2,13の出力側に配された電流検出器、4は横流検出部
である。横流検出部4において、 411, 421, 431はダ
ミ−抵抗、 412, 422, 432は電流検出器である。ただ
し、u,v,wはそれぞれ三相の各相分を示している。
FIG. 3 is shown for the purpose of explaining the prior art. Reference numerals 11, 12, and 13 are inverters of a parallel operation example of three units, and 2.
Is a load device commonly connected to the inverters 11, 12 and 13, 31
Is a current detector, 41 is a cross current detection circuit, 51 is a calculator, and 61 is a comparator. Further, FIG. 4 is shown for explaining the cross current detection circuit, and 32 and 33 are the same as the current detector 31 and the inverter 1
Current detectors 4 arranged on the output side of 2 and 13 are cross current detectors. In the cross current detector 4, 411, 421 and 431 are dummy resistors and 412, 422 and 432 are current detectors. However, u, v, and w represent the respective three phases.

【0004】すなわち、インバ−タ11について説明する
と、電流検出器31で検出したインバ−タ11の出力電流
と、電流検出器32,33で検出したインバータ12,13の出
力電流とを、横流検出回路41に入力して、インバータ11
の三相の横流I41u,I41v,I41wを検出する。その
横流検出回路41は、図4に示した横流検出部4の如く、
インバータ11の電流検出器31u,31v,31wの出力側そ
れぞれにダミ−抵抗 411u, 411v, 411wが設けられ
てなり、並列運転している他のインバータと同じ相を共
通に接続されたものである。さらには、このように接続
することで、電流検出器 412u, 412v, 412wにより
前述の横流I41u,I41v,I41wを、得るものであ
る。そして演算器51にて、この横流I41u,I41v,I
41wを加算してその絶対値を演算し、検出レベルFL51
を発生する。またコンパレ−タ61にて、検出レベルFL
51を故障設定信号の設定レベルFL*と比較して判定
し、故障信号Sfを出力する。
That is, the inverter 11 will be explained. The output current of the inverter 11 detected by the current detector 31 and the output currents of the inverters 12 and 13 detected by the current detectors 32 and 33 are detected as cross current detection. Input to circuit 41, inverter 11
The three-phase cross currents I41u, I41v, and I41w are detected. The cross current detection circuit 41 is similar to the cross current detection unit 4 shown in FIG.
Dummy resistors 411u, 411v, 411w are provided on the output sides of the current detectors 31u, 31v, 31w of the inverter 11, respectively, and are connected in common with the same phase as other inverters operating in parallel. . Furthermore, by connecting in this way, the above-mentioned cross currents I41u, I41v, I41w are obtained by the current detectors 412u, 412v, 412w. Then, in the calculator 51, the cross currents I41u, I41v, I
41w is added and the absolute value is calculated, and the detection level FL51
Occurs. Also, with the comparator 61, the detection level FL
51 is compared with the set level FL * of the failure setting signal to make a determination, and the failure signal Sf is output.

【0005】ここで、電流検出器 412u, 412v, 412
wが正常に電流検出をしているときには、横流I41u,
I41v,I41wの和は零となる。しかし、どれか一つが
故障して正常な電流検出ができなくなると、三相横流の
和は零にならない。したがって、三相の横流I41u,I
41v,I41wの和の絶対値である検出レベルFL51と、
検出誤差等を考慮にいれて設定した設定レベルFL*と
を比較することにより、電流検出器31,32,33の故障を
検出することができる。
Here, the current detectors 412u, 412v, 412
When the current is normally detected by w, the cross current I41u,
The sum of I41v and I41w becomes zero. However, if one of them fails and normal current detection cannot be performed, the sum of the three-phase cross currents does not become zero. Therefore, the three-phase cross currents I41u, I
A detection level FL51 which is the absolute value of the sum of 41v and I41w,
The failure of the current detectors 31, 32, 33 can be detected by comparing with the set level FL * set in consideration of the detection error and the like.

【0006】[0006]

【発明が解決しようとする課題】この種の従来技術にお
いては、定常状態でインバ−タ11,12,13の出力電流は
同じになり、横流は流れない。いま、u相の出力電流を
(I sinωt)とする。また、インバ−タ11のu相のダ
ミ−抵抗 411uが短絡故障したとすると、故障した瞬間
の各インバ−タ11,12,13の横流は、つぎの式(1),
(2),(3)のようになる。したがって、インバ−タ
11,12,13の三相横流の和の絶対値が、出力電流の位相
によっては、それぞれ故障設定信号を越えてしまう可能
性がある。
In the prior art of this kind, the output currents of the inverters 11, 12, 13 are the same in the steady state, and no cross current flows. Now, let the output current of the u phase be (I sin ωt). If the u-phase dummy resistor 411u of the inverter 11 has a short-circuit fault, the cross current of each of the inverters 11, 12, 13 at the moment of the fault is expressed by the following equation (1),
It becomes like (2) and (3). Therefore, the inverter
The absolute value of the sum of the three-phase cross currents of 11, 12, and 13 may exceed the failure setting signal depending on the phase of the output current.

【0007】 I41u=(−2)(I sinωt),I41v=I41w=0 ───(1) I42u=(I sinωt),I42v=I42w=0 ───(2) I43u=(I sinωt),I43v=I43w=0 ───(3)I41u = (− 2) (I sinωt), I41v = I41w = 0, (1) I42u = (I sinωt), I42v = I42w = 0, (2) I43u = (I sinωt), I43v = I43w = 0 ─── (3)

【0008】かくの如くに電流検出器 412u〜電流検出
器 412wの故障検出を、このように行っていると、ダミ
−抵抗が短絡故障したときに、故障したインバータ11と
正常なインバ−タ12,13を、同時に故障と判定してしま
う。また、これを避けるために故障設定信号のレベルを
あげると、本来の目的である電流検出器 412u〜電流検
出器 412wの故障が検出できなくなる可能性がある、と
いう問題があった。
As described above, when the failure detection of the current detector 412u to the current detector 412w is carried out in this manner, when the dummy resistor has a short-circuit failure, the failed inverter 11 and the normal inverter 12 are activated. , 13 are judged to be faulty at the same time. Further, if the level of the failure setting signal is raised to avoid this, there is a problem that the original purpose of the failure of the current detector 412u to the current detector 412w may not be detected.

【0009】しかして本発明の目的とするところは、横
流検出用電流検出器の故障を検出しかつダミ−抵抗短絡
の場合も故障検出し得る格別な並列接続構成インバ−タ
の故障検出回路を提供する、ことにある。
An object of the present invention is, therefore, to provide a special parallel-connection-type inverter failure detection circuit capable of detecting a failure of a current detector for detecting cross current and detecting a failure even in the case of a dummy resistance short circuit. There is something to offer.

【0010】[0010]

【課題を解決するための手段】本発明は上述したような
点に鑑みなされたものであって、つぎの如くに構成した
ものである。すなわち、3台以上並列に接続されたイン
バ−タの出力電流を検出する電流検出器と、電流検出器
出力より横流を検出する横流検出回路と、横流検出回路
出力の三相横流を加算して絶対値を演算する演算器と、
演算器出力に基づく検出レベルと故障設定レベルとより
故障信号を得るコンパレ−タとを具備してなる並列接続
構成インバ−タの故障検出回路において、演算器出力を
入力としてコンパレ−タに検出レベルを発生するロ−パ
スフィルタを設けて成るものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has the following structure. That is, a current detector that detects the output current of three or more inverters connected in parallel, a cross current detection circuit that detects a cross current from the current detector output, and a three-phase cross current output from the cross current detection circuit are added. An arithmetic unit that calculates absolute values,
In a failure detection circuit of a parallel connection configuration inverter having a detection level based on the output of a computing unit, a comparator that obtains a failure signal and a comparator that obtains a failure signal, the detection level is input to the comparator using the output of the computing unit. Is provided with a low-pass filter for generating.

【0011】[0011]

【発明の実施の形態】具体的には、並列接続されたイン
バ−タの出力電流を検出する電流検出器と、この電流検
出器出力より横流を検出する横流検出回路と、この横流
検出回路出力の三相横流を加算して絶対値を演算する演
算器と、この演算器出力を入力とするロ−パスフィルタ
と、このロ−パスフィルタ出力の検出レベルが故障設定
レベル以上になったとき故障信号を発生するコンパレ−
タとを、備えて成る。さらに、実施例図面に基づいて、
詳細説明する。
Specifically, a current detector for detecting an output current of an inverter connected in parallel, a cross current detection circuit for detecting a cross current from the current detector output, and a cross current detection circuit output. An arithmetic unit that calculates the absolute value by adding the three-phase cross currents, a low-pass filter that receives the output of this arithmetic unit, and a fault when the detection level of this low-pass filter output exceeds the fault setting level. A comparator that generates a signal
And are provided. Furthermore, based on the example drawings,
Details will be described.

【0012】[0012]

【実施例】図1は本発明が適用された一実施例を図3に
類して示し、51’は演算器、61’はコンパレ−タ、71は
ロ−パスフィルタである。図1においては、特に、横流
検出回路41出力の横流I41u,I41v,I41wを入力し
て検出レベルFL51’を与える演算器51’と、検出レベ
ルFL51’を入力して検出レベルFL51’を与えるロ−
パスフィルタ71’と、検出レベルFL51’および設定レ
ベルFL*を入力して故障信号Sf’を発生するコンパ
レ−タ61’とを、具備した構成をなす。ここで、演算器
51’およびコンパレ−タ61’は、図3に示される演算器
51およびコンパレ−タ61と同様に効用されるものであ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment to which the present invention is applied, similar to FIG. 3, in which 51 'is an arithmetic unit, 61' is a comparator, and 71 is a low-pass filter. In FIG. 1, in particular, an arithmetic unit 51 'which inputs the cross currents I41u, I41v, I41w of the cross current detection circuit 41 to give a detection level FL51' and a logic unit 51 'which inputs the detection level FL51' to give a detection level FL51 '. −
A pass filter 71 'and a comparator 61' for inputting the detection level FL51 'and the set level FL * to generate a failure signal Sf' are provided. Where the calculator
51 'and the comparator 61' are the arithmetic units shown in FIG.
It has the same effect as 51 and the comparator 61.

【0013】すなわち、横流検出回路41は、電流検出器
31で検出したインバ−タ11の出力電流と、電流検出器3
2,33で検出したインバータ12,13の出力電流とを入力
し、インバータ11の三相の横流I41u,I41v,I41w
を検出する。これは、図3および図4と同じであってよ
い。そして演算器51’により、この横流I41u,I41
v,I41wを加算してその絶対値を演算し、検出レベル
FL51’が与えられる。さらに、この検出レベルFL5
1’を入力とするロ−パスフィルタ71を介して、検出レ
ベルFL71がコンパレ−タ61’に得られる。またコンパ
レ−タ61’は、検出レベルFL71と設定レベルFL*と
を比較し、故障信号Sf’を出力する。
That is, the cross current detection circuit 41 is a current detector.
The output current of the inverter 11 detected in 31 and the current detector 3
Input the output currents of the inverters 12 and 13 detected by 2 and 33, and the three-phase cross currents I41u, I41v, and I41w of the inverter 11
Is detected. This may be the same as in FIGS. 3 and 4. Then, by the calculator 51 ′, the cross currents I41u, I41
v and I41w are added and the absolute value thereof is calculated to give a detection level FL51 '. Furthermore, this detection level FL5
The detection level FL71 is obtained by the comparator 61 'through the low-pass filter 71 which receives 1'as an input. Further, the comparator 61 'compares the detection level FL71 with the set level FL * and outputs a failure signal Sf'.

【0014】つぎに、かかる構成の動作を、図2を参照
して説明する。いまu相の出力電流を(I sinωt)と
し、また、インバ−タ11のu相のダミ−抵抗 411uが短
絡故障したとする。ここで、故障した瞬間の各インバ−
タ11,12,13の横流が、式(1),(2),(3)のよ
うになることは、前述した通りである。よって、インバ
−タ11の三相横流の和の絶対値は(2I sinωt)とな
り、インバ−タ12,13の三相横流の和の絶対値はそれぞ
れ(I sinωt)となる。これは、図2の如く示され
る。図2においては、FL51’,FL52’は演算器5
1’,52’出力の検出レベルすなわちインバ−タ11,12
それぞれの三相横流の和の絶対値波形であり、また、F
L71,FL72はロ−パスフィルタ71,72出力の検出レベ
ルである。図示の如く、特に、検出レベルFL71,FL
72が設定レベルFL*に達する時点T1 ,T2 が、異な
るものとなる。
Next, the operation of this structure will be described with reference to FIG. It is now assumed that the u-phase output current is (I sin ωt) and the u-phase dummy resistor 411u of the inverter 11 is short-circuited. Here, each inverter at the moment of failure
As described above, the cross currents of the data 11, 12, and 13 are expressed by the equations (1), (2), and (3). Therefore, the absolute value of the sum of the three-phase cross currents of the inverter 11 is (2I sinωt), and the absolute value of the sum of the three-phase cross currents of the inverters 12 and 13 is (I sinωt). This is shown as in FIG. In FIG. 2, FL51 'and FL52' are arithmetic units 5
Detection level of 1 ', 52' output, that is, inverters 11, 12
It is the absolute value waveform of the sum of each three-phase cross current, and F
L71 and FL72 are detection levels of the outputs of the low pass filters 71 and 72. As shown in the figure, in particular, the detection levels FL71, FL
The times T1 and T2 at which 72 reaches the set level FL * are different.

【0015】かようにして、ロ−パスフィルタを通すこ
とにより、インバ−タ11の故障が検出される時点T1
と、インバ−タ12の故障が検出される時点T2 との間
に、時間差を有して故障信号Sf’が得られるものとな
る。したがって、ダミ−抵抗が短絡故障したときでも、
故障設定信号のレベルをあげることなく故障したインバ
−タを確実に検出することができる。なお、インバ−タ
の3台並列接続例で説明したが、3台以上の並列の場合
でも同様な作用効果が得られる。
By thus passing the low-pass filter, the time T1 at which the failure of the inverter 11 is detected.
And a time T2 at which the failure of the inverter 12 is detected, the failure signal Sf 'is obtained with a time difference. Therefore, even when the dummy resistor is short-circuited,
It is possible to reliably detect a failed inverter without raising the level of the failure setting signal. Although an example of parallel connection of three inverters has been described, similar effects can be obtained even when three or more inverters are connected in parallel.

【0016】[0016]

【発明の効果】以上詳述したように本発明にかかる故障
検出装置によれば、横流検出用の電流検出器の故障検出
が可能なまま、ダミ−抵抗の短絡故障の場合も故障した
インバ−タを確実に検出し得る簡便な構成の装置を提供
できる。
As described above in detail, according to the fault detecting device of the present invention, the fault of the current detector for detecting the cross current can be detected, and the fault of the dummy resistor is caused even when the fault occurs. It is possible to provide a device having a simple structure that can reliably detect the data.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本発明が適用された一実施例を示す回路
図である。
FIG. 1 is a circuit diagram showing an embodiment to which the present invention is applied.

【図2】図2は図1の動作説明のため示した波形図であ
る。
FIG. 2 is a waveform diagram shown for explaining the operation of FIG.

【図3】図3は従来技術の説明のため示した回路図であ
る。
FIG. 3 is a circuit diagram shown for explaining the prior art.

【図4】図4は横流検出回路の説明のため示した回路図
である。
FIG. 4 is a circuit diagram shown for explaining a cross current detection circuit.

【符号の説明】[Explanation of symbols]

11 インバ−タ 2 負荷装置 31 電流検出器 41 横流検出回路 4 横流検出部 411 ダミ−抵抗 412 電流検出器 51 演算器 51’ 演算器 61 コンパレ−タ 61’ コンパレ−タ 71 ロ−パスフィルタ I41u 横流 I42u 横流 I43u 横流 FL* 設定レベル FL51 検出レベル FL51’ 検出レベル FL71 検出レベル Sf 故障信号 Sf’ 故障信号 11 Inverter 2 Load device 31 Current detector 41 Cross current detection circuit 4 Cross current detection unit 411 Dummy resistance 412 Current detector 51 Operator 51 'Operator 61 Comparator 61' Comparator 71 Low pass filter I41u Cross current I42u Cross current I43u Cross current FL * Setting level FL51 Detection level FL51 'Detection level FL71 Detection level Sf Failure signal Sf' Failure signal

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 3台以上並列に接続されたインバ−タの
出力電流を検出する電流検出器と、該電流検出器出力よ
り横流を検出する横流検出回路と、該横流検出回路出力
の三相横流を加算して絶対値を演算する演算器と、演算
器出力に基づく検出レベルと故障設定レベルとより故障
信号を得るコンパレ−タとを具備してなる並列接続構成
インバ−タの故障検出回路において、 前記演算器出力を入力としてコンパレ−タに検出レベル
を発生するロ−パスフィルタを設けて成ることを特徴と
する並列接続構成インバ−タの故障検出回路。
1. A current detector for detecting an output current of three or more inverters connected in parallel, a cross current detection circuit for detecting a cross current from the output of the current detector, and a three-phase output of the cross current detection circuit. Fault detection circuit for parallel-connected inverter having a computing unit for computing an absolute value by adding cross currents and a comparator for obtaining a fault signal from a detection level based on the output of the computing unit and a fault setting level 2. A failure detection circuit for a parallel-connection inverter, characterized in that a low-pass filter for generating a detection level is provided to a comparator by using the output of the arithmetic unit as an input.
JP8103739A 1996-03-29 1996-03-29 Fault sensing circuit of inverters with parallel connection structure Pending JPH09271173A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8103739A JPH09271173A (en) 1996-03-29 1996-03-29 Fault sensing circuit of inverters with parallel connection structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8103739A JPH09271173A (en) 1996-03-29 1996-03-29 Fault sensing circuit of inverters with parallel connection structure

Publications (1)

Publication Number Publication Date
JPH09271173A true JPH09271173A (en) 1997-10-14

Family

ID=14361997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8103739A Pending JPH09271173A (en) 1996-03-29 1996-03-29 Fault sensing circuit of inverters with parallel connection structure

Country Status (1)

Country Link
JP (1) JPH09271173A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109245166A (en) * 2018-10-29 2019-01-18 国网甘肃省电力公司 A kind of doubly-fed wind turbine transient oscillation suppressing method based on rotor string virtual impedance

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109245166A (en) * 2018-10-29 2019-01-18 国网甘肃省电力公司 A kind of doubly-fed wind turbine transient oscillation suppressing method based on rotor string virtual impedance

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