JPH09270495A - Capacity element and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively reduce electric field concentration of a capacity element using a high dielectric material. SOLUTION: A lower electrode 504 formed on a substrate 501 is fully covered with a dielectric thin film 505, and an upper electrode 507 is formed in opposite to a lower electrode 504 through the dielectric thin film 505. A side edge portion of the lower electrode 504 is widened with a slope toward the substrate side 501, and the angle of said inclination is restricted to a size which can effectively reduce the electric field concentration at the side edge portion.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitive element and its manufacturing method.

[0002]

2. Description of the Related Art A storage element of a DARM is usually composed of one transistor and one "capacitance element".
The “capacitance film” sandwiched between the lower electrode and the upper electrode in a capacitive element is conventionally formed of a nitride-based thin film sandwiched between upper and lower polycrystalline films, but the nitride-based thin film is the limit of thinning. Therefore, the development of a capacitive element using a “high-dielectric material or ferroelectric material” having a high dielectric constant for a capacitive film has been activated.

Film formation using a high dielectric material or a ferroelectric material can be performed relatively well by the "sputtering method", but there is a problem that the "step coverage" is poor. Therefore, if the capacitance film of the capacitance element is formed of a high dielectric material or a ferroelectric material by the sputtering method, the following problems occur.

In FIG. 3, reference numeral 100 indicates a substrate. A lower electrode 101 having a rectangular cross section is formed on the substrate 100, and the lower electrode 101 is completely covered with a capacitance film 102. The capacitance film 102 is covered with the upper electrode 103.

The capacitance film 102 is formed of a high dielectric material or a ferroelectric material by a sputtering method. However, since the above-mentioned "step coverage" is poor, the thickness: d of the upper surface of the lower electrode 101 is covered. The thickness d'which covers the side end of the lower electrode 101 is small. The thickness: d'is 4 when the film is formed by maximizing the step coverage described above.
The limit is about 0%.

In the capacitive element having the structure shown in FIG. 3, when a voltage is applied between the lower electrode 101 and the upper electrode 103, the electric field generated between the electrodes 101 and 103 causes the thickness of the capacitive film 102: d. Is small in the area of, and large in the area of thickness: d ', and "electric field concentration" occurs in the area of thickness: d'. Therefore, when the rated voltage between the electrodes 101 and 103 is applied, the leak current of the capacitance film 102 becomes large at the portion where the electric field concentration occurs, and the area where the electric field effectively acts on the capacitance film becomes small. The problem of "reduction of area" arises.

As a method of solving this problem, as shown in FIG. 4, a sidewall 104 having a wedge-shaped cross section is formed of silicon dioxide on the "thin portion where the film thickness becomes thin" of the capacitance film 102 formed by the sputtering method. The method to do is proposed (Tech
nical Digest of IEEE International Electron Device
s Meeting 1991 P.174).

Although this method is effective in avoiding electric field concentration, deposition of the silicon dioxide film and processing by etching back are required to form the sidewall 104,
The number of steps of manufacturing the capacitive element increases, and there is a possibility that the capacitive film 102 may be impacted by ions and deteriorate in film quality during etching back processing.

In Japanese Patent Laid-Open No. 7-193136, a side wall portion having a wedge-shaped cross section is formed in contact with a side end portion of a lower electrode so that its upper end projects above the upper surface of the lower electrode. Although a capacitive element formed with a film is disclosed, there is a problem that the number of steps for manufacturing the capacitive element is increased as in the case of the structure of FIG.

[0010]

In view of the above-mentioned circumstances, the present invention has an object to realize a novel capacitive element capable of effectively reducing the electric field concentration (claims 1 to 1).
4).

Another object of the present invention is to realize a novel method of manufacturing a capacitive element which enables simple and reliable manufacture of the novel capacitive element (claims 5 to 7).

[0012]

The capacitance element of the present invention comprises:
It has a lower electrode, a dielectric thin film, and an upper electrode (claim 1). The "lower electrode" is formed on the substrate. The substrate is, for example, an interlayer film between a memory element and a transistor which forms a memory element together with a capacitor. The "dielectric thin film" is a thin film of a high dielectric material or a ferroelectric material, and is formed so as to completely cover the lower electrode. The term “cover up” means that the dielectric thin film is formed so as to cover not only the upper surface portion of the lower electrode but also the side edge portion (thickness portion) of the lower electrode. The "upper electrode" is formed so as to face the lower electrode via the dielectric thin film. The side edge of the lower electrode is formed so as to “spread toward the substrate side with an inclination”, but the inclination angle of the inclination of the side edge is a size that “electric field concentration at the side edge is effectively reduced. ”. The size of such an inclination angle is preferably about 20 to 80 degrees.

Since the side edges of the lower electrode are inclined and spread toward the substrate side, the lower electrode has a "conical pyramid shape" formed on the substrate. The upper electrode faces not only the upper surface portion of the lower electrode but also the inclined portion of the lower electrode side edge portion.

The lower electrode may be directly formed on the substrate, but may be "formed on the substrate through the barrier thin film" (claim 2).

The lower electrode can be formed of an appropriate conductive material, but platinum or a metal material containing platinum as a main component is suitable for manufacturing a capacitive element (claim 3). In addition, the lower electrode may be “composed of a layer of platinum or a metal material containing platinum as a main component formed on the substrate side and a metal oxide thin film formed on this layer” (claim 4). It is suitable for manufacturing a capacitive element.

In the capacitive element of the present invention, the side edge portion of the lower electrode spreads toward the substrate side with an inclination, and "the side edge portion is not a side end surface which is steep with respect to the upper surface".
Therefore, even if a capacitive film (dielectric thin film) made of a high dielectric material or a ferroelectric material is formed by sputtering, the material is likely to be deposited on the slope of the side edge portion. Therefore, by appropriately adjusting the inclination angle of the inclination, it is possible to form a capacitor film having a "thickness that effectively reduces electric field concentration" on the inclination of the side edge portion as a dielectric thin film. .

Like the conventional capacitive element, the capacitive element of the present invention can be combined with a transistor to form a memory element.

A method for manufacturing a capacitive element according to claim 5
Is a method for manufacturing the capacitive element according to claim 1 or 2, which is as follows. That is, a conductive layer to be a lower electrode is formed directly on a substrate or via a barrier thin film, and a resist film such as a photoresist is patterned on the conductive layer to have a "lower electrode shape including side edges". That is, the patterned shape becomes the shape of the bottom surface of the lower electrode.

The lower electrode is processed by reactive ion etching using the patterned resist film as a mask. During this processing, oxygen was introduced into the reaction gas,
The edge portion of the resist film is burned with oxygen to gradually recede, thereby forming a slope of the side edge portion of the lower electrode.

That is, the resist film initially covers the shape (patterned shape) corresponding to the above-mentioned bottom surface, but when its edge gradually recedes due to combustion, it should become the side edge of the lower electrode. The part is gradually exposed. Therefore, the etching time becomes “shorter” from the side edge portion closer to the substrate to the side closer to the lower electrode upper surface portion, and a slope is formed at the side edge portion.

The method for manufacturing a capacitive element according to claim 6
Is a method for manufacturing the capacitive element according to claim 3,
It is as follows. That is, a metal oxide thin film is formed on a layer of platinum or a metal material containing platinum as a main component. The layer of the metal material is a portion to be the lower electrode.

Lithographically on the metal oxide thin film,
Top surface shape of the lower electrode (the shape of the part that is parallel to the substrate,
A pattern smaller than the shape of the bottom surface) is patterned as a processing pattern, and the metal oxide thin film is processed by chemical dry etching using the patterned photoresist or other resist as a mask.

Using the processed metal oxide thin film as a mask, the "metal material layer" is sputter-etched with argon at an energy in the vicinity of the threshold value of the sputter energy to form a slope on the side edge of the lower electrode, and thereafter, The metal oxide thin film is removed by the same chemical dry etching as the above to form the lower electrode.

The resist removal may be performed before the argon sputter etching or before the last chemical etching.

The method for manufacturing a capacitive element according to claim 7
Is a method of manufacturing the capacitive element according to claim 4,
It has the following features. Forming a metal oxide thin film on a layer of platinum or a metal material whose main component is platinum,
The metal oxide thin film is patterned on the metal oxide thin film by lithography using the upper surface shape of the lower electrode as a processing pattern, and the metal oxide thin film is processed by chemical dry etching using the patterned photoresist or other resist as a mask.

While performing reactive ion etching using the patterned resist film as a mask, oxygen is introduced into the reaction gas, and the edge portion of the resist film is burned with oxygen to gradually recede. A slope is formed on the side edge of the oxide thin film.

Using the metal oxide thin film as a mask, the layer of the metal material is subjected to argon sputter etching with an energy in the vicinity of the threshold value of the sputter energy to form a side edge slope of the layer of the metal material. Either the reactive ion etching for the metal oxide thin film or the argon sputtering etching for the metal material layer may be performed first.

[0028]

1 is a sectional view showing an embodiment of a capacitive element according to the first aspect of the present invention. A contact hole 502 is opened in a substrate 501 made of silicon dioxide, and a plug 503 made of polycrystalline silicon is filled and formed. A barrier thin film 506 made of titanium oxide is formed so as to close the contact hole 502, and a lower electrode 504 is formed thereon.

As shown in the figure, the lower electrode 504 has a "trapezoid with a large base" as shown in the figure, and the portions forming the oblique sides on both sides are the "side edges of the lower electrode". Has a shape that spreads with an inclination toward the substrate 501.

A dielectric thin film 505 made of a high dielectric material or a ferroelectric material is formed on the lower electrode 504 so as to cover the lower electrode, and the upper electrode 5 is further formed thereon.
07 is formed so as to “face the lower electrode 504 including the side edge portion” via the dielectric thin film 505.

FIG. 2 is a sectional view showing one embodiment of the capacitive element according to the present invention.

A layer 602 of platinum or a metal material containing platinum as a main component is formed on a substrate 601 made of silicon dioxide, and a metal oxide thin film 603 is further formed thereon to form a lower electrode. . The lower electrode having a layered structure of the metal material layer 602 and the metal oxide thin film 603 has its side edge portion extending toward the substrate 601 with an inclination.

A dielectric thin film 604 made of a high dielectric material or a ferroelectric material is formed so as to completely cover the lower electrode, and the upper electrode 605 formed on the dielectric thin film 604 is formed on the lower electrode via the dielectric thin film 604. Opposite, including the side edges.

When a capacitive element using a dielectric thin film of a ferroelectric material as the capacitive film is used as a non-volatile capacitive element having the structure shown in FIG. 1, the ferroelectric material fatigues with the number of polarization inversions and the dielectric thin film is formed. Although there is a problem of deterioration, fatigue of the ferroelectric material can be effectively reduced by forming the metal oxide thin film 603 at the boundary between the lower electrode and the dielectric thin film 603 as shown in FIG.

In FIGS. 1 and 2, substrates 501 and 6
Reference numeral 01 is an “interlayer film” that separates the capacitor and the transistor that forms the memory element together with the capacitor.

[0036]

【Example】

Example 1 Example 1 is a specific example of the manufacturing method according to the fifth aspect of the present invention, in which the capacitive element as shown in FIG. 1 is formed. A contact hole 502 is opened in a substrate 501 made of silicon dioxide, a plug 503 made of polycrystalline silicon is filled in this portion, and a barrier thin film 50 made of titanium nitride is formed.
6 was thinly formed, and a ruthenium oxide film was deposited thereon as a layer for forming the lower electrode. Photoresist is applied on this ruthenium oxide film, and photolithography is applied to this to pattern "lower electrode shape including side edges",
The ruthenium oxide film was etched by ECR plasma etching (a kind of reactive ion etching) using the patterned photoresist film as an etching mask. The etching gas is chlorine gas.

Oxygen was introduced into the reaction gas while the lower electrode was processed by etching. When the partial pressure of introduced oxygen (O ₂ / {Cl ₂ + O ₂ }%) is 20%, the ruthenium oxide film is etched at a rate of 70 nm / min to form a base silicon dioxide (substrate). Selection ratio: 2
was gotten.

The introduced oxygen burns the edges of the photoresist, and the photoresist layer gradually shrinks,
The gradually exposed ruthenium oxide film was etched with an inclination to form a lower electrode 504 with an inclined side edge as shown in FIG. The inclination angle of the side edge portion (angle formed by the normal line standing on the substrate and the side edge portion) was 25 to 45 degrees. The diameter of the lower electrode is 0.6μ including the side edges.
m and the thickness is 300 nm.

A dielectric thin film 505 made of a high dielectric material is formed so as to completely cover the lower electrode 504 thus formed.
Was formed by a sputtering method so that the film thickness on the upper surface of the lower electrode 504 was 30 nm. As a result, the thickness of the dielectric thin film 505 shown in FIG. 1 is: t (thickness on the upper surface of the lower electrode = 3
0 nm) as 100%, and the thickness t'of the dielectric thin film formed on the inclined portion of the side edge portion is 7% from the conventional 40%.
8% (inclination angle: corresponding to 25 degrees) to 82% (inclination angle: 45
It was possible to thicken it. Dielectric thin film 505
On top, facing the bottom electrode through the dielectric thin film,
The upper electrode 507 was formed of an aluminum / titanium nitride film.

In the above structure, when no inclination is formed on the side edge of the lower electrode (in the case of FIG. 3), when a rated voltage is applied between the electrodes, the electric field concentration occurs on the "lower electrode side end surface portion". In order to prevent the dielectric thin film from being damaged by the leakage current, the thickness of the dielectric thin film on the upper surface of the lower electrode is set to 50 n.
Although it had to be set to m or more, in Example 1, the thickness of the dielectric thin film on the slope of the side edge was 23 nm to 2 nm.
Since 4 nm can be secured, even if the thickness on the upper surface of the lower electrode is 30 nm as described above, the leakage current due to the electric field concentration is small, the dielectric thin film is not destroyed, and 1 Gb
It was possible to obtain a capacitive element having characteristics equivalent to that of an it memory cell with a high yield.

Example 2 Example 2 is a specific example of the manufacturing method according to the sixth aspect of the present invention, in which the capacitive element as shown in FIG. 1 is formed. As in Example 1, a barrier thin film 506 made of titanium nitride was thinly formed on a substrate 501 made of silicon dioxide, and a platinum layer as a layer for forming a lower electrode was deposited thereon with a thickness of 300 nm. A tantalum oxide film as a metal oxide thin film for a hard mask has a thickness of 30 thereon.
nm, a resist was applied to the tantalum oxide film, and a processing pattern (top surface shape of the lower electrode) was patterned by electron beam lithography.

The tantalum oxide film was processed by "chemical dry etching with carbon tetrafluoride" using the patterned resist as a mask, and then the resist was removed. Using the processed tantalum oxide film as a mask, the platinum layer was subjected to argon sputter etching with an energy near the threshold value of the sputter energy. That is, using a normal magnetron sputtering device, an RF power source is turned on to the substrate side where the workpiece (the platinum layer) is grounded, the chamber and the counter electrode are grounded, and a magnetic field by a magnet exists on the counter side, As described above, argon sputter etching was performed with "energy near the threshold value of sputter energy".

Platinum (or a layer of a metal material containing platinum as a main component) has a high sputtering yield, and when argon sputter etching is performed at an energy in the vicinity of the threshold of sputtering energy, the incident angle of sputtered particles has etching anisotropy. Therefore, an inclination can be formed at the side edge portion. The slope is formed in conformity with the shape of the tantalum oxide film, and the upper end of the slope matches the peripheral edge of the tantalum oxide film.

Etching pressure: 0.001 Torr, plasma power density: 0.28 W / cm ² , substrate temperature: room temperature. As a result, the etching rate was 4 nm / min.
Then, it was possible to reproducibly achieve the inclination angle of 30 degrees on the side edge portion.

Thereafter, the tantalum oxide film is removed by the chemical etching to obtain a lower electrode made of a platinum layer, a dielectric thin film and an upper electrode similar to those in the first embodiment are formed, and the same function as in the first embodiment is obtained. It was possible to obtain a good capacitive element having a high yield.

Example 3 Example 3 is a specific example of the manufacturing method according to the seventh aspect of the present invention, in which the capacitive element as shown in FIG. 2 is formed. In a DARM memory element, a platinum layer 6 is formed as a metal material layer on a substrate 601 made of silicon dioxide, which is an “interlayer film” that separates a transistor and a capacitor element.
02 is deposited to a thickness of 300 nm, and a thin film 603 of ((LaSr) CoO ₃ ) as a metal oxide thin film is deposited thereon to a thickness of ₃₀ n.
m, the resist was applied to the thin film 603, and the processing pattern (top surface shape of the lower electrode) was patterned by electron beam lithography.

The thin film 603 was processed by "chemical dry etching with carbon tetrafluoride" using the patterned resist as a mask. Using the processed thin film 603 as a mask, the platinum layer 602 was subjected to argon sputter etching with an energy in the vicinity of the threshold value of the sputter energy as in Example 2. As a result, a slope whose upper end matched the peripheral portion of the thin film 602 was formed on the side edge portion of the platinum layer 602. The inclination angle of the inclined portion is 70 degrees.

The conditions of the argon sputter etching are as follows: etching pressure: 0.001 Torr, plasma power density:
0.28 W / cm ² , substrate temperature: room temperature.

Then, as in Example 1, the thin film 603 was etched by ECR plasma etching.
The etching gas is chlorine gas. During the etching, oxygen was introduced into the reaction gas to burn the edge portion of the resist to gradually reduce the resist layer and form a slope on the side edge portion of the thin film 603.

On the lower electrode thus formed, a thin film of lead zirconate titanate (PZT) is formed so as to cover the lower electrode, and a dielectric thin film 604 is formed. The electrode 605 was formed.

As a result, it is possible to obtain a capacitive element having good performance with a good yield, and the dielectric thin film 6 according to the number of polarization inversions.
04 deterioration was effectively reduced.

The above description has been made by taking one capacitance element as an example, but it goes without saying that a large number of capacitance elements of the present invention can be manufactured simultaneously by the above method.

[0053]

As described above, according to the present invention, a novel capacitive element can be realized. In the capacitive element of the present invention, the side edge portion of the lower electrode has an inclination, and the dielectric thin film of the high dielectric material or the ferroelectric material deposited by the sputtering method has a sufficient thickness at the inclination portion. It is possible to effectively prevent an increase in leak current and damage to the dielectric thin film due to leak current. Further, the capacitance element according to the fourth aspect can effectively reduce the deterioration of the dielectric thin film due to the number of polarization inversions.

The capacitor element according to the present invention can be reliably manufactured by the manufacturing method according to the present invention.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a capacitive element according to claim 1;

FIG. 2 is a diagram for explaining the capacitive element according to claim 4;

FIG. 3 is a diagram for explaining a problem to be solved by the invention.

FIG. 4 is a diagram for explaining a conventional technique.

[Explanation of symbols]

 501 substrate 504 lower electrode 505 dielectric thin film 507 upper electrode

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification number Agency reference number FI Technical indication H01L 21/822

Claims (7)

[Claims] 1. A lower electrode formed on a substrate, a dielectric thin film made of a high dielectric material or a ferroelectric material formed so as to completely cover the lower electrode, and opposed to the lower electrode via the dielectric thin film. And a side electrode of the lower electrode spreads toward the substrate side with an inclination, and an inclination angle of the inclination is such that an electric field is concentrated at the side edge. Capacitor element characterized in that the size is effectively reduced. 2. The capacitive element according to claim 1, wherein the lower electrode is formed on the substrate via a barrier thin film. 3. The capacitive element according to claim 1, wherein the lower electrode is formed of platinum or a metal material containing platinum as a main component. 4. The capacitive element according to claim 1, wherein the lower electrode has a layer of platinum or a metal material containing platinum as a main component formed on the substrate side, and a metal oxide layer formed on the layer. A capacitive element comprising a thin film. 5. A method of manufacturing a capacitive element according to claim 1, wherein a conductive layer to be a lower electrode is formed directly on the substrate or via a barrier thin film, and a resist layer is formed on the conductive layer. The membrane
The lower electrode shape including the side edges is patterned, and the lower electrode is processed by reactive ion etching using the patterned resist film as a mask. During this processing, oxygen is introduced into the reaction gas to A method for manufacturing a capacitive element, comprising forming an inclination of a side edge portion of a lower electrode by burning the edge portion of the film with oxygen and gradually retreating. 6. The method of manufacturing a capacitive element according to claim 3, wherein a metal oxide thin film is formed on a layer of platinum or a metal material whose main component is platinum, and the metal oxide thin film is formed on the metal oxide thin film. Then, the upper surface shape of the lower electrode is patterned by lithography as a processing pattern, the metal oxide thin film is processed by chemical dry etching using the patterned resist as a mask, and the platinum or A slope of the lower electrode side edge is formed by performing argon sputter etching of a layer of a metal material containing platinum as a main component at an energy in the vicinity of the threshold value of the sputter energy, and then performing the chemical dry etching similar to the above to oxidize the metal. A method of manufacturing a capacitive element, which comprises removing a thin film of a material to form a lower electrode. 7. The method of manufacturing a capacitive element according to claim 4, wherein a metal oxide thin film is formed on a layer of platinum or a metal material whose main component is platinum, and the metal oxide thin film is formed on the metal oxide thin film. Then, the upper surface of the lower electrode is patterned by lithography as a processing pattern, the metal oxide thin film is processed by chemical dry etching using the patterned resist as a mask, and the reactive ion etching is performed using the patterned resist film as a mask. Introducing oxygen into the reaction gas while performing the above, to form a slope at the side edge of the metal oxide thin film by gradually retreating by burning the edge of the resist film with oxygen, the metal oxide thin film As a mask, the layer of the above-mentioned platinum or a metal material containing platinum as a main component is used as an algorithm with an energy near the threshold value of the sputtering energy. A method of manufacturing a capacitive element, characterized in that a side edge of the metal material layer is formed to have a slope by sputter etching.