JPH09263499A - Production of semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate grown-in defects and to improve the non-defective rate of the pressure resistance of an oxidized film considered to be necessary for a front end DRAM, etc., by holding a semiconductor single crystal ingot grown from a melt for a specified time at a specific temp., then cooling the ingot under specific cooling conditions. SOLUTION: The semiconductor single crystal ingot 10 formed by growing and pulling up from the melt heated by a main heater 8A and melted in a quartz crucible 7 by a CZ method or MCZ method is is succession pulled up and is subjected to a high temp. soln. heat treatment for holding the ingot for the specified time at the temp. (1273 deg.C in the case of an oxygen concn. 1×110<18> /cm<3> ) at which the oxygen solid solubility attains the concn. of the oxygen included in the ingot or above by using a sub-heater 8B in a furnace. The cooling until 400 deg.C is attained from 1080 deg.C is then executed within two hours by Ar introduced from an Ar introducing pipe 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor, and more particularly, to a method for heat-treating a silicon single crystal manufactured by a CZ method and an MCZ method.

[0002]

2. Description of the Related Art A DZIG wafer has been known as a silicon wafer for improving the characteristics of a semiconductor integrated circuit, for example, the holding characteristics of a DRAM and the white scratches of a CCD. The DZIG wafer is described in detail, for example, from page 211 of “Super LSI Process Control Engineering” (Hideki Tsuya, Maruzen 1995). The manufacturing process of DZIG wafer after wafer processing is basically
(1) Defect-free layer (denuded zone) by solution of growth-in defects (structural defects due to vacancies, impurities, etc. existing as crystals are grown) at a high temperature
e: hereinafter referred to as a DZ layer), (2) formation of oxygen precipitate nuclei at low temperatures, and (3) growth of oxygen precipitate nuclei at medium and high temperatures. In this, step (1) is performed in CZ (Czochrals).
ki) The purpose is to dissolve and eliminate oxygen precipitates and precipitate nuclei existing in the silicon in a grown-in manner. Steps (2, 3) are performed in order to obtain a gettering effect (Internal Gettering: hereinafter referred to as IG) for removing heavy metal impurities from the device active region and capturing the impurities inside the wafer. This effect is achieved by the process (2,
Oxygen precipitates (generally Bu) deposited inside the wafer in 3)
lk Micro-Defect, abbreviated as BMD). Step (3) often also serves as a device process.

In the manufacturing process of a DZIG wafer, the process (1) needs to be performed at a high temperature of 1100 ° C. or more in order to form a sufficient DZ layer. However, when such a high-temperature heat treatment is performed on a wafer having a large diameter, the occurrence of slip due to thermal stress or its own weight becomes a serious problem. Regarding this issue, for example, the Japan Society for the Promotion of Science
It is described in detail in the material of the 8th meeting (December 21, 1994).

In a heat treatment corresponding to a DZ layer forming process usually performed at a temperature of 1100 to 1200 ° C., there are grown-in defects which disappear easily, but there are also grown-in defects which are hard to disappear. Known (for example, the above-mentioned document “Super LSI process control engineering”)
On page 149). In any case, g
Although the low-in defect has not been a problem so far because of its low density, it has become a problem with higher integration of devices. Especially such a grown-in
Defects degrade the withstand voltage of the gate oxide film, which is an important basic characteristic for LSIs, and thus its reduction is essential. Therefore, the gate oxide breakdown voltage deterioration factor, grow,
For the purpose of reducing n-in defects, a method of performing heat treatment for forming a DZ layer in a wafer state at a high temperature of 1200 ° C. in a highly reductive hydrogen atmosphere has been considered [for example, Extended Abstract of the Ateance Conference on Solids]. State Device and Materials (Extended Abst
racts of the 18th Confere
nice on Solid Devices and
Materials) Tokyo, 1986, pp. 139-157. 5
29-532].

[0005] However, even with this method, the problem of slippage caused by heat treatment at 1100 ° C. or more in the state of processing a wafer is inevitable. As a method for avoiding this problem, Japanese Patent Application Laid-Open No. 4-298 is related to the prior art relating to heat treatment in an ingot state before processing a wafer.
No. 042 is disclosed.

The method described in Japanese Patent Application Laid-Open No. H4-298042 was originally invented to solve the problem of variations in BMD density required for IG in the case of the aforementioned DZIG wafer. The content is that the difference in the thermal donor concentration generated in the longitudinal direction of one ingot due to the difference in the heat history at the time of pulling is cut into a plurality of short ingots, and 400 to 500 ° C. according to the heat history of the partial portion. Correct by heat treatment. Thereafter, the wafer is processed, and the steps (1, 2) in the above-mentioned DZIG wafer manufacturing process are performed.
Alternatively, only the step (2) is performed to provide a wafer having a uniform BMD density over the entire wafer manufactured from one ingot.

[0007]

As described above, the method described in Japanese Patent Application Laid-Open No. H4-298042 discloses a method for correcting a difference in thermal donor concentration in a crystal longitudinal direction caused by a difference in heat history at the time of pulling. A heat treatment at 400 to 500 ° C. is performed in an ingot shape, and then a wafer shape is formed, and a heat treatment for forming a DZ layer and controlling a BMD density is performed.

After applying a heat treatment at 1280 ° C. for 4 hours for forming a DZ layer to a wafer, the wafer was processed by applying this method to an ingot-shaped wafer.
In this case, no occurrence of slip was confirmed by X-ray topography (XRT) observation. Thereafter, the breakdown voltage of the gate oxide film of the MOS capacitor formed on the 200 mm diameter wafer manufactured by this method was measured.
Met. Although this result is improved as compared with the non-defective rate of 72% when a wafer which is not subjected to high-temperature heat treatment in an ingot state is used, it is required for manufacturing advanced DRAMs.
% (In the case of a DRAM, since a very large number of MOS capacitors are formed in one chip, a non-defective product rate of at least 98% is required when a test MOS capacitor is formed on a wafer for evaluation). Did not. At this time, the gate oxide film thickness was 20 nm, and the area of the capacitor was 55 mm ² . 0.1 mA / cm ^{2 for non-} defective products
The electric field strength through which the current flows was 8 MV / cm or more.

As described above, the application of the conventional method can solve the problem of the occurrence of slip, but cannot solve the problem of the grown-in defect, which is a factor of deterioration of the breakdown voltage of the gate oxide film.
There is a problem that the non-defective rate of oxide film breakdown voltage required for advanced DRAMs and the like cannot be satisfied.

It is an object of the present invention to provide a method of manufacturing a semiconductor which eliminates a grown-in defect and can obtain a non-defective product having a withstand voltage of an oxide film required for a leading DRAM or the like.

[0011]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. The present invention is directed to a method of manufacturing a semiconductor single crystal ingot grown from a melt in a quartz crucible by a CZ method or an MCZ method, and then growing the oxygen contained in the ingot. A heat treatment method for a semiconductor, characterized in that the semiconductor is cooled from 1080 ° C. to 400 ° C. within 2 hours after holding at a temperature at which the oxygen solid solubility increases to a concentration higher than the concentration for a certain period of time.

[0012]

As described in the description of the prior art, in order to form a DZ layer in a DZIG wafer manufacturing process, it is important to outwardly diffuse oxygen in the surface layer of the wafer at a high temperature and to form a solution of a grown-in defect. . The solid solubility [O] [/ cm ³ ] of oxygen is represented by the following equation (1). Here, k is a Bolman constant.

[O] = 9 × 10 ²² exp (−1.52 eV / kT) (1) Since the oxygen concentration at room temperature of CZ silicon used for normal LSI production is of the order of 10 ¹⁸ / cm ³ , When the temperature is maintained at a higher temperature where the solid solubility of oxygen is higher, the dissolution and disappearance of oxygen precipitates and precipitate nuclei proceed. Naturally, this dissolution
The annihilation effect is more pronounced at higher temperatures than at higher oxygen solid solubility. The reason why the solid solubility of oxygen becomes 1 × 10 ¹⁸ / cm ³ or more is 1273 ° C. according to the equation (1). However, in the case of a wafer, the high-temperature heat treatment in a reducing atmosphere causes oxygen on the surface of the wafer to diffuse outward, and the oxygen concentration decreases to a solid solubility or less. Therefore, the melting of the grown-in defect caused by oxygen is facilitated. Oxygen diffusion coefficient D [cm ² /
sec] is expressed as in the following equation (2).

D = 0.13 exp (−2.53 eV / kT) (2) From this equation, for example, the diffusion length (D · t) ^1/2 of oxygen at 1200 ° C. for 5 hours is about 20 μm and 1100 ° C. , 5 hours, it is about 10 μm. In other words, oxygen can diffuse outward from the wafer surface to the depth of these diffusion lengths and become less than the solid solubility. Therefore, the oxygen concentration is 1 × 10 ¹⁸ /
In the case of a wafer shape of cm ³ , in the range of the diffusion length of oxygen from the wafer surface, the heat treatment temperature is set so that the solid solubility limit of oxygen is 1 × 1.
Even at 1273 ° C. or lower of 0 ¹⁸ / cm ³ , the dissolution and disappearance of oxygen precipitates and precipitate nuclei proceed.

However, when the high-temperature heat treatment is performed on a wafer having a large diameter, it is not easy to apply this method since slip due to its own weight and warpage poses a serious problem.

To avoid such a problem, it is conceivable to perform a high-temperature heat treatment in an ingot state before forming the wafer shape. In the ingot state, since there is no effect due to the outward diffusion of oxygen, 1273 ° C. (oxygen concentration 1 × 10 ¹⁸ / cm
³ ) The above high temperature heat treatment is required. As described in the section of the problem to be solved by the invention, even if this method is simply applied, the problem of the occurrence of slip can be avoided,
The yield rate of the wafer oxide film breakdown voltage does not satisfy the requirements of advanced devices, and the problem was not solved.

The present inventor considered that this was caused by the crystal cooling process, particularly the cooling condition of about 1000 ° C. or less, and improved the cooling condition after the heat treatment of the ingot. Generally, 400-
The temperature region of 1000 ° C. is a region where formation of oxygen precipitation nuclei proceeds. Since the heat capacity is larger in the ingot state than in the wafer state, especially when the time is spent in the cooling process in this temperature range, the history of the solution treatment performed at a temperature higher than the solid solubility of the contained oxygen cannot be maintained. It will be lost.

Next, a brief description will be given of how the cooling conditions of the ingot of the present invention are determined. The heat treatment conditions are shown in Table 1. The heat treatment was performed in two ways. The first is a heat treatment performed after the 200 mmφ diameter ingot is cut into a thickness of 50 cm. The second is a method in which a sub-heater different from a normal heater is provided in a pulling furnace, and the silicon single crystal once pulled up from the melt is again subjected to high-temperature heat treatment and cooled. They were ingots, and sample Nos. In Table 1 below. After being subjected to various heat treatments as shown in a to k, the wafer was processed to form the above-described MOS capacitor, and the gate oxide film breakdown voltage was measured. In addition, sample No. Re in
f. 1 and ref. 2 is a wafer which has not been subjected to the high-temperature solution heat treatment before the MOS capacitor formation process mentioned in the section of the problem to be solved by the present invention, and a wafer which is simply ingot-treated as an ingot heat treatment without being particularly limited to cooling conditions.
The heat treatment is applied at 0 ° C. for 4 hours.

Of the two heat treatments, the first heat treatment performed after the ingot was cut was the sample No. 1 in Table 1. ref. 2 and e ~
Performed only for k. On the other hand, in the second heat treatment, the sample No. a to k were performed. ref. 1 does neither. Here, the oxygen concentration of the single crystal silicon used for evaluation is (0.9 to 1.0) × 10 ¹⁸ / cm ³ (former A
STM display).

[0020]

[Table 1]

The cooling temperature range in Table 1 is 400 ° C. to 1
The reason why the temperature is 080 ° C. is that, first, the oxygen precipitation nuclei are considered to be generated in the region of 400 ° C. to 1000 ° C. as described above. Second, as described in the embodiments below, the oxygen concentration of 2 × 10 ¹⁷ / cm ^{3 of the} ultra-low oxygen concentration single crystal silicon which can be pulled up by the MCZ method has a solid solubility of about 1080 ° C. Therefore, the lower limit of the practical high-temperature solution heat temperature is limited to 1080 ° C.

As shown in Table 1, the solution temperature was 128
At 0 ° C. or higher, if the cooling time from the solution temperature to 400 ° C. is 2 hours or less, the yield rate of the gate oxide film breakdown voltage is 98%.
%. In addition, it was confirmed by XRT observation that no slip dislocation occurred.

The diffusion constant D and the solid solubility [O] of oxygen used in the equations (1) and (2) are described in MATERIAL RE.
SEARCH SOCIETY SYMPOSIA P
ROCEEDINGS Volume 59-Oxyg
en, Carbon, Hydrogen and Ni
trogen in Crystalline Sil
icon, J.M. C. Mikkelesen, Jr. ,
S. J. W. Corbett, S .; J. Penycoo
k, 1986, pp. 19-30.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. In this embodiment, all the operations were performed on a wafer having a diameter of 200 mm.

FIG. 1 is a perspective view of a heat treatment furnace for illustrating a first embodiment of the present invention. In the bell jar 1, a quartz support plate 6 having an Ar introduction pipe 3 penetrated in the center is provided, and a pedestal 4 is provided thereon. The high-frequency induction coil 5 is provided on the back surface of the support plate 6. An exhaust port 2 is provided below the bell jar.

First, after inspecting the resistivity and the like of a silicon single crystal ingot whose oxygen concentration pulled up by the ordinary CZ method is controlled to 0.9 to 1.0 × 10 ¹⁸ / cm ³ ,
Outer diameter grinding and orientation notch. Next, after dividing into blocks of 50 cm in length, the process proceeds to the heat treatment step of the present invention. The heat treatment of the first embodiment was performed by an apparatus as shown in FIG. As shown in FIG. 1, a receiver (pedestal) 4 formed by processing a silicon plate so that a silicon block can be installed is provided in the heat treatment furnace. The divided block is placed on the pedestal 4, and the inside of the heat treatment furnace is 1 mt.
Exhaust to about orr. Next, as shown in Table 1 with the heater, while flowing argon gas from the Ar introduction pipe 3 having the ejection hole so that the inside of the furnace becomes about 1 torr (ref. 2 and e).
Ｋk) and hold for a predetermined time. After a lapse of a predetermined time, cooling is performed by turning off the heater and increasing the flow rate of the argon gas. The cooling speed was controlled by the flow rate of argon gas. However, ref. In No. 2, no special treatment for cooling was performed. The pedestal 4 on which the divided blocks are installed is made of silicon in order to minimize non-uniform heat distribution of the ingot to be annealed. After the completion of the heat treatment, the mirror wafer is manufactured through a normal wafer manufacturing process (slicing, chamfering, lapping, chemical etching, polishing, cleaning, etc.).

A MOS capacitor was formed on the silicon wafer manufactured according to the first embodiment, and an oxide film initial withstand voltage test was performed. The results are shown in Table 1 under "Divided into ingots" of the gate oxide film non-defective rate (%). Among them, Sample No. e, f, and g are the results of applying the cooling conditions of the present invention by the method of the first embodiment, and the desired oxide film initial withstand voltage non-defective rate is obtained. Sample No. ref. 2 and h, i, k
Are those that do not satisfy the conditions of the present invention, such as a low cooling rate from 1080 ° C. to 400 ° C. or a low high-temperature solution treatment temperature.

Another possible method is to perform heat treatment while rotating the ingot in order to avoid uneven heat distribution. If you want to cool as quickly as possible, there is a method of immersing the ingot in an oil bath to cool it.

FIG. 2 is a sectional view of a CZ furnace for explaining the second embodiment of the present invention. The second embodiment described here is a method of annealing a single crystal once pulled in a pulling furnace. The pulling furnace shown in FIG. 2 is provided with a main heater 8A for melting the polycrystalline silicon put in the quartz crucible 6, and a sub-heater 8B for annealing the whole of the single crystal silicon 10 once pulled up at a high temperature.

As shown in FIG. 2, a quartz crucible 6 is formed by the CZ method.
The silicon single crystal ingot 10 once pulled up and separated from the silicon melt is heated again to a high temperature by the sub-heater 8B. The high temperature solution heat treatment of a to k was performed. The crystalline silicon 10 is cooled by Ar introduced from the upper Ar introducing pipe 9. afterwards,
The silicon single crystal ingot is processed from the pulling furnace through the same steps as the normal wafer manufacturing process (outside diameter grinding, orientation notch formation, slicing, chamfering, lapping, chemical etching, polishing, cleaning, etc.).

The wafer manufactured in this manner is subjected to MO
An S capacitor was formed, and an initial withstand voltage test of an oxide film was performed. The results are shown in Table 1. These are shown in b, c, d, e, f and g. As described above, it can be seen that the target yield rate of the initial breakdown voltage of the oxide film is obtained by applying the present invention. Sample No. a, h, i, j and k are 10
If the cooling rate from 80 ° C. to 400 ° C. is low or the solution treatment temperature is low, a sufficient effect has not been obtained.

The method of the second embodiment is not easy to apply to the heat treatment after measuring the oxygen concentration of the grown single crystal silicon, but generally the growth conditions (crystal orientation, crystal orientation, In the mass production of single crystal silicon in which the oxygen concentration and the resistance value are fixed and controlled, the actual oxygen concentration does not largely deviate. Therefore, even if the oxygen concentration cannot be measured in advance, the application of the present invention is sufficiently effective. is there.

FIG. 3 is a sectional view of an MCZ furnace for explaining a third embodiment of the present invention, in which a magnet 11 is provided in the CZ furnace shown in FIG. In the third embodiment, the method of the second embodiment is applied to an MCZ pulling furnace. As described in the section of the operation, the present invention is more effective when performed at a higher temperature, in which the solid solubility of oxygen is high. When the MCZ method is used for pulling, the oxygen concentration can be reduced to 3.0 × 10 ¹⁷ / cm ³ or less. Oxygen concentration3.
In the case of 0 × 10 ¹⁷ / cm ³ , a sufficient annealing effect can be expected at 1125 ° C. or more from the oxygen solid solubility equation (1). That is, when the present invention is applied to a silicon single crystal having a low oxygen concentration, the effect can be obtained at a lower temperature. As a result, heat treatment time and energy consumption can be saved.

The oxygen concentration of the single crystal silicon used in the third embodiment was 2.5 to 2.9 × 10 ¹⁷ / cm ³ . After the heat treatment under the conditions shown in Table 2, as shown in FIG. 3, wafers from the top portion 10A and the bottom portion 10B of the ingot were selected, and the oxide film breakdown voltage non-defective rate was examined. Table 2 shows the results. Sample No. A to D are the results according to the present invention, and the conventional method is one in which the high temperature solution heat treatment using the sub-heater is not performed after the pulling up once.
Sample No. E and F have a cooling rate from 1080 ° C. to 400 ° C. which is lower than the range of the present invention, though the high-temperature solution heat treatment is performed. Sample No. T in parentheses in the parentheses indicates that the wafer from the top 10A of the ingot after heat treatment was evaluated, and B indicates that the wafer from the bottom 10B was evaluated.

[0035]

[Table 2]

According to the third embodiment in which the sub-heater is provided in the MCZ furnace, the high-temperature solution heat treatment is performed after reducing the oxygen concentration. Almost the same as in the case of the oxidation treatment, the object of improving the oxide film breakdown voltage non-defective rate was achieved. As described above, the sample Nos. E and F were obtained by performing a high-temperature solution heat treatment, but cooling them from 1080 ° C. to 400 ° C. for a relatively long time. Sample N
o. The condition that the yield rate of the oxide film initial withstand voltage of E and F is 98% or more cannot be satisfied, but the yield rate is considerably improved, and the difference between the top part and the bottom part, so-called variation, is smaller than that of the conventional method. ing. In other words, it can be seen that quality improvement and uniformization in the longitudinal direction of the ingot are progressing.
This is due to the fact that the high-temperature solution heat treatment has a function of correcting the difference in the crystal heat history generated at the time of pulling.

[0037]

As described above, according to the present invention, after maintaining for a certain period of time at a temperature at which the oxygen solid solubility exceeds the oxygen concentration contained in the ingot, cooling from 1080 ° C. to 400 ° C. is performed for 2 hours. Within this range, it is possible to dissolve and eliminate the grown-in defect, which is a factor that deteriorates the gate oxide breakdown voltage, which already exists at the time when the pulling is completed by the CZ method or the MCZ method. Could be improved. In the present invention, since the heat treatment is performed in the form of an ingot or a block obtained by dividing the ingot into a plurality of pieces, slip dislocation does not occur as in the case where similar processing is performed on a wafer. It is also possible to keep the temperature higher than when processing in a wafer shape. In particular, when the present invention is applied to the MCZ method with a low oxygen concentration, the temperature of the high-temperature solution heat treatment is set to the normal CZ temperature.
The effect can be obtained even if it is lower than when applied to the law.
Further, the high temperature solution heat treatment has an effect of correcting the difference in crystal heat history due to the portion of the ingot generated during pulling.

The effect of performing the solution treatment at a temperature equal to or higher than the solid solubility of the contained oxygen concentration described in the present invention and rapidly cooling to 400 ° C. is not unique to the ingot heat treatment, but is applied to the case of a wafer shape. That is also true.

[Brief description of drawings]

FIG. 1 is a perspective view of a heat treatment furnace for explaining a first embodiment of the present invention.

FIG. 2 is a CZ for describing a second embodiment of the present invention.
Sectional view of the furnace.

FIG. 3 is a diagram illustrating an MC for explaining a third embodiment of the present invention;
Sectional drawing of a Z furnace.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Bell jar 2 Exhaust port 3 Ar introduction pipe 4 Pedestal 5 High frequency induction coil 6 Support plate 7 Quartz crucible 8A Main heater 8B Sub heater 9 Ar introduction pipe 10 Single crystal silicon 10A Top part 10B Bottom part 11 Magnet

Claims (3)

[Claims] 1. A CZ method or an M method from a melt in a quartz crucible.
After keeping the semiconductor single crystal ingot grown by the CZ method at a temperature at which the oxygen solid solubility exceeds the oxygen concentration contained in the ingot for a certain period of time, the temperature is changed from 1080 ° C. to 4 ° C.
A method for manufacturing a semiconductor, wherein cooling to 00 ° C. is performed within 2 hours. 2. A CZ method or a MZ method from a melt in a quartz crucible.
The semiconductor single crystal ingot grown by the CZ method is divided into a plurality of blocks, and each block is maintained at a temperature at which the oxygen solid solubility is higher than the oxygen concentration contained in the ingot for a certain period of time, and then the temperature is reduced from 1080 ° C. to 400 ° C. A method for manufacturing a semiconductor, comprising: performing cooling up to two hours. 3. The CZ method or the MZ method from a melt in a quartz crucible.
The semiconductor single crystal ingot grown and pulled up by the CZ method is continuously held in a pulling furnace at a temperature at which oxygen solid solubility is higher than the oxygen concentration contained in the ingot for a certain period of time, and then from 1080 ° C. to 400 ° C. Cooling the semiconductor device within 2 hours.