JPH09261468A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To compactly and inexpensively perform the image processing of multilevel image data into binary image data and the magnification processing of binary image data while sharing a circuit. SOLUTION: In the case of fixed thresholding processing, a thresholding part 4 processes the mutilevel image data from an MTF correction part 2, afterwardsm a 3×3 matrix 9 forms matrix data corresponding to image data in the past from an external RAM, and an isolate point removal part 10 removes an isolate point and outputs fixed binary image data. In the case of error diffusion mode processing, an error diffusion part 7 performs the error diffusion processing of multi-level image data from the MTF correction part 2 corresponding to preceding line thresholding error data and a error from the thresholding part 4, and the thresholding part 4 processes these data and outputs binary image data. In the case of magnification mode processing, the 3×3 matrix 9 forms the matrix data from the binary image data from a multiplexer 8 and the external RAM, a multilevel part 11 makes the data into multilevel data, and an interpolation part 12 performs the magnification processing of multi-level image data. After the execution of addition correction at the error diffusion part 7 and thresholding at the thresholding part 4, magnified binary image data are outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus, and more particularly to a compact image processing of binary image data of multi-valued image data obtained by reading an original and scaling processing of the binary image data. The present invention relates to an image processing device that can be performed at low cost.

[0002]

2. Description of the Related Art Conventionally, various methods have been proposed as a scaling method for binarized image data. this is,
The thinning method, which is the simplest scaling method, has a problem that the image is significantly deteriorated with respect to a halftone image such as a dither image or an error diffusion image, and it has been proposed to improve such image deterioration. .

Recently, a facsimile apparatus is equipped with an image memory, and image data obtained by reading an original is temporarily stored in the image memory and then transmitted. However, image data obtained by reading an image of the original is stored in the image memory. At the stage of
Since the recording paper size, linear density, etc. of the other party are unknown, it is read under the conditions specified by the transmitting side and stored as binary image data. However, at the stage when the function of the other party is checked by the protocol at the time of transmission, if the facsimile machine of the other party cannot receive the original under the condition that the original is stored, the stored binary image data is scaled. hand,
Although it is necessary to transmit the data, in this case, there has been a problem that the image quality is deteriorated because the scaling processing is conventionally performed by the thinning method.

As a method of compensating for the drawbacks of such a thinning method, there is a linear interpolation method. In the linear interpolation method, binary image data is converted into a multi-valued image by calculation with peripheral pixels in the same manner as the smoothing processing. The sampling point of the original image is a method in which the densities of virtual pixels (variable-magnification pixels) at different points are estimated and binarized again to obtain a variable-magnification binary image. In this linear interpolation method, in addition to a multi-value conversion unit that multi-values binary data, a linear interpolation unit, and a re-binarization unit, an external RAM and its I / F,
Dedicated scaling hardware such as the address section is required,
The circuit scale becomes large.

Therefore, the present applicant has previously proposed an image scaling method (see Japanese Patent Application Laid-Open No. 4-314265) in which moire for dither images is reduced and the scaling image processing device is composed of simple hardware. The proposed image scaling method is an image scaling method that performs scaling processing on a binarized image signal, and is an original image corresponding to a pixel position of interest on a converted image that has been scaled. A means for calculating the upper pixel position, a means for randomly selecting 3 pixels for taking in the target pixel from the calculated 4 pixels in the vicinity of the target pixel on the original image, and the selected 3 pixels And means for calculating the density value of the pixel of interest using the density value of. According to this image scaling method, the original pixels can be randomly selected,
By eliminating the periodicity of the pixel selection processing, it is possible to prevent moire or the like from occurring in the dither image.

Further, the present applicant has previously proposed an image scaling method (see Japanese Patent Laid-Open No. 4-314264) for performing a scaled image processing with a simple hardware configuration and with little deterioration in image quality. The image scaling method is an image scaling method that performs scaling processing on a binarized image signal, and calculates a pixel position on an original image corresponding to a target pixel position on a converted image subjected to scaling processing. Means, a means for selecting three pixels in the vicinity of the pixel of interest on the calculated original image, and a means for calculating the density value of the pixel of interest using the densities of the selected three pixels. It is characterized by that. According to this image scaling method, the conversion pixel density calculation only involves sign inversion and addition, and the hardware configuration is simplified.

[0007]

However, in such a conventional image processing apparatus, since the image scaling processing and the normal image processing are performed by independent circuit configurations, the image scaling processing is performed. There is a limit to how simple the circuit can be. Especially, in an image processing apparatus such as a facsimile machine that has severe restrictions on the scale and cost of hardware, the image processing unit for normal image data is Separately, it was difficult to configure the hardware as a variable-magnification processing unit for binary image data completely independently.

Therefore, according to the first aspect of the invention, the binarization unit of the image processing unit for binarizing normal read multi-valued image data and the binary image data are once multi-valued and then scaled, Image processing of read multi-valued image data having a scaling function of binary image data by sharing the binarization unit of the scaling processing means for binarizing the scaled multi-valued image data. It is an object of the present invention to provide a small-sized and inexpensive image processing device that can be manufactured.

According to a second aspect of the present invention, the error diffusion section and the binarization section of the image processing means for binarizing the ordinary read multi-valued image data after the error diffusion processing, and the binary image data are once stored. The error diffusion unit and the binarization unit of the scaling processing unit for converting the image data into the value image data, scaling the scaled image, performing error diffusion on the scaled multivalued image data with surrounding pixels, and then binarizing the shared image are shared. Thus, it is an object of the present invention to provide a small-sized and inexpensive image processing apparatus that can perform high-quality image scaling processing and high-quality image processing of read multi-valued image data.

According to a third aspect of the present invention, the error diffusion section of the image processing means for performing the error diffusion processing on the normal read multi-valued image data using the error data of the preceding line stored in the memory, and binarizing it. The binarization unit and the binary image data are once converted into multi-valued image data, and the multi-valued image data of the previous line stored in the memory are referred to for interpolation calculation to perform scaling and scaling. By performing error diffusion of the value image data with the surrounding pixels stored in the memory and then binarizing it, the error diffusion unit and the binarization unit of the scaling processing unit share the scaling process with higher image quality. It is an object of the present invention to provide a small-sized and inexpensive image processing apparatus capable of performing high-quality image processing of read multivalued image data.

According to a fourth aspect of the present invention, after the normal read multi-valued image data is binarized, the matrix portion of the image processing means for removing isolated points based on the matrix data with a predetermined number of surrounding pixels, By forming matrix data with a predetermined number of surrounding pixels centering on the binary image data,
By sharing the central pixel with surrounding pixels for multi-valued smoothing, and for scaling the smoothed multi-valued image data, and then for binarizing the same,
To provide a small-sized and inexpensive image processing apparatus capable of performing variable-magnification processing with higher image quality and removing isolated points of read multi-valued image data to perform higher-quality image processing. It is an object.

[0012]

According to a first aspect of the present invention, there is provided an image processing apparatus, wherein image processing means for processing read multi-valued image data into binary image data and binary image data at a predetermined magnification. In the image processing apparatus including a scaling unit that scales, the image processing unit includes at least a binarizing unit that binarizes the multi-valued image data, and the scaling unit includes at least the binary unit. A multivalued unit for converting the multivalued image data into multivalued image data, a scaling unit for scaling the multivalued multivalued image data to a predetermined magnification, and the scaled multivalued image data And a binarizing unit for binarizing the binarizing unit and sharing the binarizing unit of the image processing unit and the binarizing unit of the scaling unit.

Here, the binarizing unit of the image processing means binarizes the multi-valued image data by comparing it with a predetermined threshold value, for example. The binarizing unit of the scaling processing unit compares the scaled multi-valued image data with a predetermined threshold value different from that of the binarizing unit of the image processing unit to obtain 2
Value.

According to the above construction, the binarizing unit of the image processing unit for binarizing the ordinary read multi-valued image data, the binarized image data once being multi-valued and then scaled, the scaling is performed. Since the binarizing unit of the scaling processing unit that binarizes the multivalued image data is shared, an image for processing the read multivalued image data having the scaling processing function for the binary image data is also used. The processing device can be made small and inexpensive.

According to a second aspect of the present invention, there is provided image processing means for image-processing the read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. In the image processing device, the image processing means includes at least an error diffusion unit that error-diffuses the multi-valued image data, and a binarization unit that binarizes the error-diffused multi-valued image data. At least, the scaling means includes a multi-value conversion unit that multi-values the binary image data into multi-valued image data, and a scaling unit that scales the multi-valued multi-valued image data. An error diffusion unit that performs error correction on a binarization error with surrounding pixels by using the scaled multivalued image data as a target pixel, and performs addition correction; and the addition-corrected multivalued image data is binary image data. And a binarization unit for binarizing
According to the above configuration, the error diffusing unit and the binarizing unit of the scaling unit and the error diffusing unit and the binarizing unit of the image processing unit are shared.

Here, the image processing means binarizes the read multi-valued image data after performing error diffusion processing.
The scaling processing unit temporarily converts the binary image data into multi-valued image data, scales it, and error-diffuses the scaled multi-valued image data with surrounding pixels, and then binarizes it.

According to the above construction, the error diffusion section and the binarization section of the image processing means for binarizing the ordinary read multi-valued image data after performing the error diffusion processing, and the binary image data are once converted into the multi-valued image. The error diffusion unit and the binarization unit of the scaling processing unit for converting the data into data, scaling, and scaling the scaled multi-valued image data with the surrounding pixels for error diffusion are shared. So
It is possible to reduce the size and cost of an image processing apparatus that can perform high-quality image scaling processing and high-quality image processing of read multivalued image data.

According to a third aspect of the present invention, there is provided image processing means for image-processing the read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. In the image processing apparatus described above, the image processing means includes at least an error diffusion unit that performs error diffusion of the multi-valued image data using error data of the previous line stored in a memory, and the error-diffused multi-valued image data. And a binarization unit for binarizing,
A multi-value conversion unit that multi-values the binary image data into multi-valued image data, and an interpolation calculation with reference to the multi-valued image data of the previous line that stores the multi-valued multi-valued image data in a memory. A scaling unit that scales by doing so, and an error diffusion unit that performs error correction on a binarization error between the scaled multivalued image data and surrounding pixels stored in a memory as a pixel of interest to perform addition correction. A binarization unit that binarizes the addition-corrected multivalued image data into binary image data, a memory used in the error diffusion unit of the image processing unit, and the scaling unit. The above object is achieved by sharing the memory used in the variable power unit and the error diffusion unit.

Here, the image processing means binarizes the read multi-valued image data after performing error diffusion processing using the error data of the previous line stored in the memory. The scaling processing unit converts the binary image data into multi-valued image data once, and performs interpolation calculation by referring to the multi-valued image data of the previous line stored in the memory to perform scaling and scaling. The value image data is binarized after error diffusion with the surrounding pixels stored in the memory.

According to the above-mentioned structure, the normal read multi-valued image data is subjected to error diffusion processing using the error data of the previous line stored in the memory, and then binarized. The conversion unit and the binary image data are once converted into multi-valued image data, and the multi-valued image data of the previous line stored in the memory is referred to for interpolation calculation to perform scaling.
Since the error diffusion unit and the binarization unit of the scaling processing unit for binarizing the scaled multi-valued image data with the surrounding pixels stored in the memory after the error diffusion are shared, it is further improved. It is possible to reduce the size and cost of an image processing apparatus that can perform variable-magnification processing with image quality and can perform high-quality image processing of read multivalued image data.

According to a fourth aspect of the present invention, there is provided image processing means for image-processing the read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. In the image processing device, the image processing means has at least a binarizing unit that binarizes the multi-valued image data into binary image data, and the binarized binary image data as a central pixel. The scaling section includes at least a matrix section that forms matrix data of a predetermined number of peripheral binary pixels, and an isolated point removal section that removes isolated points of the binary image data based on the matrix data. A matrix section for forming matrix data of a predetermined number of peripheral binary pixels with the binary image data as a central pixel, and smoothing the central pixel of the matrix data with peripheral pixels. A multi-valued conversion unit for converting the multi-valued image data into a multi-valued image, a scaling unit for changing the size of the multi-valued multi-valued image data, and a binarization of the scaled multi-valued image data into binary image data 2 The above-described object is achieved by including a binarizing unit and sharing the matrix unit of the scaling unit and the matrix unit of the image processing unit.

Here, the image processing means binarizes the read multi-valued image data and then removes isolated points based on the matrix data with a predetermined number of surrounding pixels. The scaling processing means forms matrix data with a predetermined number of surrounding pixels with the binary image data as a central pixel, and smoothes the central pixel with the surrounding pixels into a multi-valued, and the smoothed into a multi-valued. The multi-valued image data is scaled and then binarized.

According to the above construction, after the normal read multi-valued image data is binarized, the matrix portion of the image processing means for removing the isolated points based on the matrix data of the predetermined number of surrounding pixels and the binary value. Matrix data is formed with a predetermined number of surrounding pixels with the image data as the central pixel, the central pixel is smoothed with the surrounding pixels to be multi-valued, and the smoothed multi-valued image data is scaled and then binarized. Since it also shares the matrix part of the scaling processing means for changing the size, it is possible to perform scaling processing with higher image quality, and remove isolated points in the read multi-valued image data to perform image processing with higher quality. The image processing apparatus that can be used can be made small and inexpensive.

[0024]

Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Note that the embodiments described below are preferred specific examples of the present invention,
Although various technically preferable limits are given, the scope of the present invention is not limited to these embodiments unless otherwise specified in the following description.

FIG. 1 is a circuit block diagram of a main part of an image processing apparatus to which an embodiment of the image processing apparatus of the present invention is applied.

In FIG. 1, the image processing apparatus 1 is an MTF.
Correction unit 2, multiplexer (MPX) 3, binarization unit 4,
Multiplexer (MPX) 5, Multiplexer (MP
X) 6, error diffusion unit 7, multiplexer (MPX) 8,
3 × 3 matrix 9, isolated point removal unit 10, multi-value conversion unit 1
1, an interpolation unit 12, a RAM interface 13, and the like. The image processing apparatus 1 shares the error diffusion unit 7, the binarization unit 4, the 3 × 3 matrix 9 of peripheral binary image data, and the external RAM for read image data processing and variable-magnification image data processing, and Processing is performed in each of the image processing modes of the fixed binary mode, the error diffusion mode and the variable magnification mode.

Multivalued image data read by a scanner unit (not shown) and multivalued by an A / D conversion circuit (not shown) is input to the MTF correction unit 2.
Performs image enhancement correction on multi-valued image data,
Output to the multiplexer 3 and the multiplexer 6.

The multiplexer 3 further receives the image data that has been subjected to addition correction from the error diffusion unit 7, and the multiplexer 3 receives one of the input data from the MTF correction unit 2 and the error diffusion unit 7 according to the processing mode. Is output to the binarization unit 4.

Further, one of the read data threshold and the scaling data threshold is input from the multiplexer 5 to the binarization unit 4, and the binarization unit 4 uses the multiplexer 3
By comparing the image data input from the with the threshold value input from the multiplexer 5, the image data is binarized,
The binary image data is output as it is to a selection circuit (not shown), and is also output to the multiplexer 8 and the error diffusion unit 7. The selection circuit receives the binary image data from the binarization unit 4 and also receives the binary image data from the isolated point removal unit 10 to be described later, and the selection circuit operates according to the image processing mode. Binary image data input from the binary image data unit 4 and 2 input from the isolated point removing unit 10.
One of the value image data is selected and then transferred to the encoding / decoding unit or the image memory when the subsequent circuit, for example, the image processing apparatus 1 is applied to a facsimile apparatus.

To the multiplexer 5, a read data threshold for binarizing image data read by a scanner and a scaling data threshold for binarizing the scaled image data are input. The multiplexer 5 selects one of the reading threshold and the scaling threshold according to each image processing mode of the fixed binary mode, the error diffusion mode and the scaling mode, and outputs the selected threshold to the binarization unit 4.

The multiplexer 8 is supplied with the binary image data from the binarizing section 4 and the binary image data stored in an image memory (not shown) or the like.
Selects binary image data input according to the image processing mode and outputs it to the 3 × 3 matrix 9. That is, when the image processing mode is the scaling processing mode, the multiplexer 8 selects the binary image data from the image memory or the like and outputs it to the 3 × 3 matrix 9, and the image processing mode is the fixed binary mode and the error diffusion mode. In the processing mode, the binary image data from the binarization unit 4 is selected and output to the 3 × 3 matrix 9.

Binary image data is input from the multiplexer 8 to the 3 × 3 matrix 9, and the 3 × 3 matrix 9 stores the binary image data of the preceding line and the preceding-preceding line of the binary image data in a RAM interface. 13 is read from the external RAM to form 3 × 3 matrix data, and the isolated point removing unit 10 and the multi-value quantization unit 1 are formed.
Output to 1.

When the image processing mode is the fixed binary mode, the isolated point removing unit 10 determines that the pixel of interest of the matrix data input from the 3 × 3 matrix 9 is based on the image data of the adjacent pixel adjacent to the pixel of interest. Then, it is determined whether or not it is an isolated point, the isolated point is removed, and the fixed binary image data is output to a selection circuit (not shown).

The multi-value quantization unit 11 smoothes the binary image data of the central pixel of the matrix by taking the sum of all the pixels of the matrix data input from the 3 × 3 matrix 9 using the uniform weight filter. Then, 4-bit multi-valued image data of 0 to 9 is obtained and output to the interpolation unit 12. The smoothing method of the multi-value quantization unit 11 is not limited to the one using the above uniform weight filter, and may be, for example, a smoothing method using a filter in which weighting is changed for each pixel. Whether or not to use the smoothing method is selected according to the scaling factor.

The interpolating unit 12 reads the multi-valued image data of the previous line from the external RAM via the RAM interface 13, and refers to the multi-valued image data of the previous line for the multi-valued image data input from the multi-value conversion unit 11. Then, the multi-valued image data is subjected to a scaling process to be converted into scaled image data, and output to the multiplexer 6.

The multiplexer 6 selects one of the binary image data input from the MTF correction unit 2 and the multivalued image data input from the interpolation unit 12 according to the image processing mode, and the error diffusion unit 7 is selected. Output to.

The error diffusion unit 7 takes in the binarized error data of the previous line stored in the external RAM via the RAM interface 13, and inputs it from the MTF correction unit 2 or the interpolation unit 12 via the multiplexer 6. The input image data and the previous pixel input from the binarization unit 4,
The addition correction value of the pixel of interest is calculated together with the binarization error of the pixel before the pixel and output to the multiplexer 3.

An external RAM (not shown) is connected to the RAM interface 13, and the RAM facsimile machine 13 performs interface processing of this external RAM.

Next, the operation will be described. Image processing device 1
The image processing mode includes a fixed binary mode for reading image data processing, an error diffusion mode, and a scaling mode for scaling image data processing. These scanning image data processing and scaling image data processing Quantization unit 4, error diffusion units 7, 3
Processing is performed by sharing the × 3 matrix 9 and the external RAM.

First, a description will be given of image processing in a fixed binary mode in which multi-valued image data read by a scanner (not shown) is simply binarized with a fixed threshold value and output.

As described above, the analog signal read by the scanner or the like is converted into multi-valued image data by the A / D conversion circuit (not shown) and input to the MTF correction section 2.
The MTF correction unit 2 performs image enhancement correction on the input multi-valued image data and outputs it to the multiplexer 3 and the multiplexer 6.

The multiplexer 3 selects the multivalued image data from the MTF correction unit 2 and outputs it to the binarization unit 4,
The threshold for read data selected by the multiplexer 5 is further input to the binarization unit 4. Binarization unit 4
Binarizes the MTF-corrected multi-valued image data input through the multiplexer 3 by the read data threshold, and outputs the binary image data as it is to the selection circuit (not shown) and the multiplexer 8. .

In the fixed binary mode, the multiplexer 8 selects the binary image data binarized by the binarizing unit 4 and outputs it to the 3 × 3 matrix 9, and the 3 × 3 matrix 9 , The binary image data input from the multiplexer 8 and the binary image data of the preceding line and the preceding line of this binary image data (current binary image data) are input to form an adjacent block of 9 pixels to form matrix data. Is output to the isolated point removing unit 10. In the fixed binary mode, the multi-value quantization unit 11 does not operate, and the isolated point removal unit 10 does not
The isolated points are removed based on the adjacent image data formed by the × 3 matrix 9, and the binary image data from which the isolated points have been removed are output as fixed binary image data to the selection circuit. In the fixed binary mode, the selection circuit selects the image data input from the isolated point removal unit 10 and transfers it to the subsequent circuits.

That is, in the fixed binary mode processing, the MTF correction unit 2, the multiplexer 3, the binarization unit 4,
Image processing is performed using the multiplexer 5, the multiplexer 8, the 3 × 3 matrix 9 and the isolated point removing unit 10.

Next, a case where the read image data is processed in the error diffusion mode will be described. In the error diffusion mode process, as in the fixed binary mode, the MTF correction unit 2 performs MTF correction on the input multi-valued image data and outputs it to the multiplexer 6, and the multiplexer 6 causes the MTF.
The MTF-corrected multivalued image data input from the correction unit 2 is selected and output to the error diffusion unit 7.

The error diffusion unit 7 fetches the binarized error data of the previous line from the external RAM through the RAM interface 13, and the 2 of the previous line read from the external RAM.
Addition correction of the pixel of interest, which is MTF-corrected multi-valued image data input via the multiplexer 6, by combining the binarization error and the binarization error of the previous pixel and the previous pixel input from the binarization unit 4. The value is calculated and output to the multiplexer 3. The multiplexer 3 selects the addition correction value input from the error diffusion unit 7 and outputs it to the binarization unit 4, and the binarization unit 4 binarizes the read data threshold input from the multiplexer 5. Turn into. However, this threshold is a matrix threshold weighted for each pixel, unlike the threshold in the fixed binary mode. The binarization unit 4 outputs the binary image data as it is to the selection circuit and feeds it back to the error diffusion unit 7 for calculating the binarization error of the pixel of interest. In the error diffusion mode process, the selection circuit inputs the 2 input from the binarization unit 4.
The value image data, that is, the error diffusion binary image data is selected and transferred to the subsequent circuit.

That is, in the error diffusion mode processing, image processing is performed using the MTF correction unit 2, the multiplexer 6, the error diffusion unit 7, the multiplexer 3, the binarization unit 4 and the multiplexer 5.

Next, the case where the binary image data is subjected to the scaling mode processing by interpolation will be described. In the variable magnification mode process, the image was stored in an image memory (not shown)
The value image data (original image data) is selected by the multiplexer 8 and input to the 3 × 3 matrix 9, and the 3 × 3 matrix 9 is a binary image of the previous line and the two lines before the line stored in the external RAM. The data is read to form matrix data in which the binary image data from the image memory and the previous line and the previous line from the external RAM are combined, and the matrix data is output to the multi-value quantization unit 11. The multi-value quantization unit 11 calculates and generates multi-value quantization of the central pixel of the matrix by smoothing,
The generated multi-valued image data is output to the interpolation unit 12.

The interpolating unit 12 reads the multi-valued image data of the previous line from the external RAM via the RAM interface 13, and refers to the multi-valued image data of the previous line for the multi-valued image data input from the multi-value conversion unit 11. Then, the multi-valued image data is subjected to a scaling process to be converted into scaled multi-valued image data and output to the multiplexer 6.
The multiplexer 6 outputs the scaled multi-valued image data input from the interpolation unit 12 to the error diffusion unit 7, and the error diffusion unit 7
Takes in the binarized error data of the previous line stored in the external RAM via the RAM interface 13, and uses the scaled image data input from the interpolation unit 12 via the multiplexer 6 as the pixel of interest. The binarization errors of the pixels surrounding the pixel are integrated to calculate addition-corrected multi-valued image data in which the variable magnification pixel of interest is added and corrected. The error diffusion unit 7 outputs the calculated addition-correction multi-valued image data to the binarization unit 4 via the multiplexer 3, and the binarization unit 4 inputs the threshold for variable-magnification data input via the multiplexer 5. The addition-corrected multivalued image data is binarized by. The threshold at this time is a predetermined fixed value as in the fixed binarization mode. That is, the binarization unit 4 binarizes the addition-correction multivalued image data input from the error diffusion unit 7 via the multiplexer 3 with the threshold for scaling data input from the multiplexer 5 to perform scaling binarization. The image data is output to the selection circuit and fed back to the error diffusion unit 7 for calculating the binarization error. At this time, the selection circuit selects the scaled binary image data input from the binarization unit 4 and outputs it to the subsequent circuit.

That is, in the scaling mode processing, the multiplexer 8, the 3 × 3 matrix 9, the multi-value conversion unit 1
Image processing is performed using 1, the interpolation unit 12, the multiplexer 6, the error diffusion unit 7, the multiplexer 3, and the binarization unit 4.

As described above, according to the present embodiment, in order to perform the fixed binarization or the error diffusion binarization of the read image data, the MTF correction unit 2, the multiplexer 3, the binarization unit 4, the multiplexer 5, By using the multiplexer 8, the 3 × 3 matrix 9, the isolated point removing unit 10, the multiplexer 6 and the error diffusion unit 7, the binary image data is multivalued,
A multiplexer 8, a 3 × 3 matrix 9, a multi-value quantization unit 11, an interpolation unit 12, a multiplexer 6, an error diffusion unit 7, a multiplexer 3, a binarization unit 4, and a multiplexer 5 are used for the scaling process. .

Therefore, the binarization unit 4 is shared in the fixed binarization process of the read image data, the error diffusion binarization process, and the scaling process of the binary image data, and the number of parts of the image processing apparatus 1 is increased. Can be reduced, the image processing apparatus 1 can be downsized, and the cost can be reduced.

Further, the 3 × 3 matrix 9 forming a matrix for referring to the peripheral pixels is used to remove isolated points when the read data is subjected to the fixed binarization process, and the binary image is used in the process of the data to be scaled. It is used to make data multi-valued and shared, and also shares an external RAM.
The number of parts of the image processing apparatus 1 can be reduced, and the image processing apparatus 1 that can perform high-quality image processing can be further downsized and can be made more inexpensive.

Further, in the error diffusion binarization processing and the variable magnification data processing of the read data, the binarization unit 4 and the error diffusion unit 7
In addition, the external RAM is shared for storing the binarized error data of the previous line used by the error diffusion unit 7, so that the number of parts of the image processing apparatus 1 is reduced and a high quality image is obtained. The image processing apparatus 1 capable of performing the processing can be further downsized and can be further inexpensive.

Although the invention made by the present inventor has been specifically described based on the preferred embodiments, the present invention is not limited to the above embodiments, and various modifications are possible without departing from the scope of the invention. It goes without saying that it can be changed.

For example, in the above embodiment, the case where the SRAM is used as the external memory has been described, but the external memory is not limited to this, and for example, a FIFO memory or the like may be used.

Further, in the present embodiment, the 3 × 3 matrix 9 used for converting the binary image data into multi-valued data in the scaling process is used for removing the isolated points in the fixed binarization process of the read image data. Although the case where the 3 × 3 matrix 9 is commonly used as a register has been described, the usage of the 3 × 3 matrix 9 is not limited to this. For example, in the case of an image processing apparatus having an image area separation function, the edge separation unit is used. It can also be used as a register for a white background separation section.

[0058]

According to the image processing apparatus of the first aspect of the present invention, the binarization unit of the image processing unit for binarizing normal read multivalued image data and the binarization of the binary image data once. After that, scaling is performed and the binarizing unit of the scaling processing unit that binarizes the scaled multivalued image data is shared, so that a scaling processing function of the binary image data is provided. It is possible to reduce the size and cost of the image processing device that processes the read multi-valued image data.

According to the image processing apparatus of the second aspect of the invention, after the normal read multi-valued image data is subjected to the error diffusion processing,
An error diffusion section and a binarization section of the image processing means for binarization;
The binary image data is once converted into multi-valued image data, scaled, the scaled multi-valued image data is error-diffused with surrounding pixels, and then binarized. Since it is also used as an image processing unit, a compact and inexpensive image processing apparatus capable of performing high-quality scaling processing and high-quality image processing of read multi-valued image data Can be

According to the image processing apparatus of the third aspect of the present invention, the image processing of performing the error diffusion processing on the normal read multi-valued image data using the error data of the previous line stored in the memory and then binarizing it The error diffusion unit and the binarization unit of the means, and the binary image data are once converted into multivalued image data, and the interpolation is performed by referring to the multivalued image data of the previous line stored in the memory. Since the scaled multi-valued image data is error-diffused with the surrounding pixels stored in the memory and then binarized, the error diffusion unit and the binarization unit of the scaling processing unit are shared. An image processing apparatus that is capable of performing high-quality image scaling processing and performing high-quality image processing of read multi-valued image data with a small size, and
It can be inexpensive.

According to the image processing apparatus of the fourth aspect of the present invention, after the normal read multi-valued image data is binarized, the isolated point is removed based on the matrix data of a predetermined number of surrounding pixels. A matrix portion of the means, a predetermined number of surrounding pixels with the binary image data as the central pixel, and matrix data are formed, the central pixel is smoothed with the surrounding pixels to be multivalued, and the smoothed multivalued image data Is also shared with the matrix portion of the scaling processing unit that binarizes the image, so that the scaling processing can be performed with higher image quality and the read multi-valued image data can be removed by isolated points. An image processing apparatus capable of performing image processing with higher quality can be made small and inexpensive.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a main part of an image processing apparatus to which an embodiment of an image processing apparatus of the present invention is applied.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image processing circuit 2 MTF correction part 3, 5, 6, 8 Multiplexer 4 Binarization part 7 Error diffusion part 9 3x3 matrix 10 Isolated point removal part 11 Multi-value conversion part 12 Interpolation part 13 RAM interface

Claims (4)

[Claims] 1. An image processing apparatus comprising image processing means for image-processing read multi-valued image data into binary image data, and scaling means for scaling the binary image data by a predetermined magnification. The image processing unit includes at least a binarizing unit that binarizes the multi-valued image data, and the scaling unit at least multi-values the multi-valued image data into multi-valued image data. And a binarization unit that binarizes the scaled multi-valued image data, and a binarization unit that binarizes the scaled multi-valued image data. An image processing apparatus, wherein the binarizing unit of the processing unit and the binarizing unit of the scaling unit are shared. 2. An image processing apparatus comprising image processing means for image-processing read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. The image processing unit includes at least an error diffusion unit that error-diffuses the multi-valued image data, and a binarization unit that binarizes the error-diffused multi-valued image data. At least, a multi-valued conversion unit that multi-values the binary image data into multi-valued image data, a scaling unit that scales the multi-valued multi-valued image data, and the scaling An error diffusion unit that performs error correction on a binarization error with surrounding pixels using multi-valued image data as a target pixel and performs addition correction, and the addition-corrected multi-valued image data is converted into binary image data.
A binarizing unit for binarizing, wherein the error diffusing unit and the binarizing unit of the scaling unit and the error diffusing unit and the binarizing unit of the image processing unit are shared. Image processing device. 3. An image processing apparatus comprising image processing means for image-processing read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. The image processing means binarizes at least the error diffusion unit that performs error diffusion of the multi-valued image data using the error data of the previous line stored in the memory, and binarizes the error-diffused multi-valued image data 2 A binarizing section, and the scaling means stores at least the multilevel binarizing section for binarizing the binary image data into multilevel image data, and the multilevel binarizing image data in a memory. A scaling unit that scales by performing interpolation calculation with reference to the stored multi-valued image data of the previous line, and surrounding pixels stored in a memory with the scaled multi-valued image data as a pixel of interest. Addition correction by error diffusion of digitization error An error diffusion unit, and a binarization unit that binarizes the addition-corrected multivalued image data into binary image data, and a memory used in the error diffusion unit of the image processing unit; An image processing apparatus, characterized in that it shares a memory used by the scaling unit and the error diffusion unit of the scaling unit. 4. An image processing apparatus comprising image processing means for image-processing read multi-valued image data into binary image data, and scaling means for scaling the binary image data to a predetermined magnification. The image processing means includes at least a binarizing unit that binarizes the multi-valued image data into binary image data.
A matrix portion that forms matrix data of a predetermined number of peripheral binary pixels with the binarized binary image data as a central pixel, and an isolation that removes isolated points of the binary image data based on the matrix data. A point removing unit, and the scaling unit includes at least a matrix unit that forms matrix data of a predetermined number of peripheral binary pixels with the binary image data as a central pixel, and a central pixel of the matrix data. A multi-valued unit that multi-values by smoothing with surrounding pixels, a scaling unit that scales the multi-valued multi-valued image data, and a binary image of the scaled multi-valued image data. An image processing device, comprising: a binarizing unit for binarizing data, wherein the matrix unit of the scaling unit and the matrix unit of the image processing unit are shared.