JPH09247551A - Signal read-out processing method for solid-state image pickup element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for read-out processing the signal of a solid-state image pickup element which can suppress stably a dark time FPN(fixed pattern noise) due to temperature change without using an FPN memory, and can deal with the image pickup of a moving picture as well, and besides, does not require double-speed horizontal scanning, and does not require a memory in the solid-state image pickup element. SOLUTION: Each row of a picture element group is connected to a vertical scanning circuit 4 through vertical selection lines 7-1 to 7-4, and two vertical signal lines 8-1 to 8-8 are arranged for each column, and the picture elements of each column are connected to each vertical signal line 10 common alternately. One side and the other side of two vertical signal lines arranged for each column are connected to an output signal line 10-1 and the output signal line 10-2 respectively through a horizontal selector switch, and each output signal line is connected to a 1H delay line 14 or the - input terminal of a subtracter 15 through amplifiers 12-1, 12-2 and switches 13-1, 13-2, and the output of the 1H delay line 14 is inputted to the + input terminal of the subtracter 15, and a video signal with a suppressed FPN is outputted from the subtracter 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal read-out processing method for a solid-state image pickup device, and more particularly, to a change in dark fixed pattern noise caused by a temperature change or the like so that dark fixed pattern noise can always be stably suppressed. The present invention relates to a signal readout processing method for a solid-state image sensor capable of capturing moving images.

[0002]

2. Description of the Related Art Conventionally, photoelectric conversion function and amplification of accumulated charge,
For example, SIT (Stat
ic Induction Transistor), AMI (Amplified MOS)
2. Description of the Related Art There is known a device that reproduces an image by a solid-state imaging device using an internal amplification type photoelectric conversion device represented by Imager) and CMD (Charge Modulation Device) as a unit pixel. In such an image reproducing apparatus, in order to cancel fixed pattern noise (hereinafter abbreviated as FPN) peculiar to the solid-state imaging device, a storage means such as a frame memory is provided, and the FPN is stored for each pixel in the storage means. , An FPN that obtains an image signal by subtracting the FPN corresponding to each pixel from the image information obtained from each pixel of the solid-state image sensor
Suppression means are needed.

FIG. 8 shows a conventional FP used in an image reproducing apparatus using such an internal amplification type photoelectric conversion element, for example, a conventional FP disclosed in JP-A-64-39171.
It is a block diagram of N suppression means. In FIG. 8, 10
Reference numeral 1 is a solid-state image sensor, 102 is an amplifier circuit, 103 is an A / D converter, 104 is a changeover switch, 105 is an FPN memory including a frame memory, 106 is a subtractor, and 107 is a D / A converter. In the FPN suppressing means of the image reproducing apparatus configured as described above, the image signal output from the solid-state image sensor 101 is amplified by the amplifier circuit 102 and converted into a digital signal by the A / D converter 103. First, a dark signal output from the solid-state image sensor 101 with the incident light blocked is stored in the FPN memory 105 by connecting the changeover switch 104 to the b side. This dark signal becomes the FPN signal. Dark FPN
After the storage operation is completed, the changeover switch 104 is switched to the side a and connected to release the light shielding. Thereby, the solid-state image sensor 101
The bright signal due to the photo-generated charges output from the A / D converter 103 is A / D converted, and the subtractor 106 outputs the bright signal.
The FPN signal stored in the PN memory 105 is repeatedly subtracted to form an image signal in which the FPN is suppressed, which is then input to the D / A converter 107 and D / A converted and output as a video signal. The FPN memory normally stores an average dark signal for one frame or several frames.

In the FPN suppressing means having such a structure, immediately after resetting the accumulated photo-generated charges instead of shielding the solid-state image pickup device during dark FPN storage.
Alternatively, a dark signal obtained by reading a signal from the solid-state image sensor while resetting can be used as the FPN signal.

In the conventional FPN suppressing means shown in FIG. 8, the dark FPN signal is stored in the FPN memory 105 in advance, and the dark FPN signal is subtracted from the image signal corresponding to the photo-generated charge. Since the video signal is output after that, when the FPN in the dark changes due to temperature change or the like, there is a problem that the change cannot be followed and the FPN cannot always be suppressed stably.

As a countermeasure against the temperature change, a method is known in which the solid-state image pickup device is intermittently shielded from light during the image pickup to take in a dark FPN signal. According to this method, for example, in order to store a dark signal for one frame in the FPN memory during the continuous image pickup operation, the solid-state image pickup element may be used during darkness during image pickup as shown in FIG. An output signal for outputting a signal is required, and at time t _d , the solid-state imaging device outputs a dark signal in which photo-generated charges are not accumulated. When it is video outputs the output of the solid-state imaging device, as shown in (B) of FIG. 9, at time t _d, not the video output is obtained, the monitor at time t _d, not displayed nothing The screen is cut off. As shown in (C) of FIG. 9, even if the interruption of this screen is repeatedly output by interpolating the immediately previous imaging screen, the motion becomes unnatural for a moving image, which is a serious problem.

Several FPN suppression methods have been proposed for this problem as well. FIG. 10 is a block diagram of JP-A-4-1527.
It is a block block diagram which shows the other structural example of the conventional FPN suppression means shown by No. 70. In FIG. 10, 201 is a solid-state image sensor, 202 is a light receiving unit, 203 is a vertical scanning shift register, 204 is a horizontal scanning switch, 205 is a horizontal scanning shift register, 206 is an amplifier, 207 is an A / D converter, 208
Memory, 209 and 210 are D / A converters, 211 is a subtractor, 21
2 is a memory control unit.

In this configuration example, first, a solid-state image pickup device
201 is horizontally scanned at high speed, and a signal corresponding to the photo-generated charge for one horizontal pixel column is read in the first half of one horizontal scanning period. This is shown in FIG. Note that in FIG. 11, m-1 row, m
The horizontal pixel column signals of the rows and m + 1 rows are shown. After reading the signal corresponding to the photo-generated charge for one horizontal pixel column, 1
In the latter half of the horizontal scanning period, as shown in A of FIG.
Immediately after or simultaneously resetting the photo-generated charges of one horizontal pixel row, high-speed horizontal scanning is performed again to read out signals for the same horizontal pixel row. This corresponds to reading out the dark signal. The read signals are amplified by the amplifier 206, converted into digital data by the A / D converter 207, and input to the memory 208. Next, by controlling the phase of the memory read pulse by the memory control unit 212, time-axis conversion is performed, and the time-axis expansion that restores the time-axis-compressed signal and the dark signal to the normal time-axis. Simultaneously with scanning, the temporal phases of both are aligned and read from the memory 208, and the D / A
D / A conversion is performed by the converters 209 and 210 to obtain a signal due to the photo-generated charges and a dark signal which are normally returned to the time axis. Both are
They are shown in B and C of FIG. 11, respectively. Next, the signal B due to the photo-generated charges and the dark-time signal C are input to the subtractor 211, and the dark-time signal C is subtracted from the signal B due to the photo-generated charges to obtain a video signal in which the dark FPN is suppressed. . This signal is shown at D in FIG. In this way, the dark FPN is suppressed in real time, and even when the dark FPN changes due to a temperature change or the like, the change is immediately followed, and a signal in which the dark FPN is suppressed can always be stably obtained.

FIG. 12 is a block diagram showing another example of the configuration of the conventional FPN suppressing means disclosed in Japanese Patent Laid-Open No. 4-86176. In this configuration example, a bright signal line memory 312 and a dark signal line memory 313 each of which is composed of a capacitor array are provided in the solid-state imaging device 311, and an image signal generated by light-generated charges of one horizontal pixel array of the light receiving unit 314 is horizontally scanned. During the ranking period,
It is simultaneously transferred to and held in the capacity column of the bright signal line memory 312 corresponding to each pixel. Bright signal line memory 31
After transferring the signal generated by the photo-generated charge to 2, the same horizontal pixel row is reset at the same time within the same horizontal blanking period, and the dark signal line memory corresponding to the dark signal (FPN) for each pixel. It is simultaneously transferred to and held in the capacity column of 313. Next, in the horizontal scanning period, the bright signal line memory 312
And the signal from the dark signal line memory 313 are sequentially read out at the same time, and the external subtractor 315 subtracts the dark signal from the signal generated by the photo-generated charges to output a video signal in which the dark FPN is suppressed. .

[0010]

By the way, FIGS. 8 to 11
Each of the conventional FPN suppressing means shown in (1) requires an FPN memory in the image signal processing circuit. Therefore, there is a problem that the processing circuit scale becomes large. Further, as described above, the conventional FPN suppressing means shown in FIG. 8 has a problem that when the dark FPN changes due to temperature change or the like, it cannot follow this change, and the conventional FPN suppressing means shown in FIG. The FPN suppressing means has a problem that the motion becomes unnatural for a moving image. In addition, the conventional FPN shown in FIG.
The suppression unit is not suitable for high-speed imaging because it needs to perform horizontal scanning at a speed double that of other reading methods when reading at the same frame rate. Furthermore, since it is necessary to perform time-axis conversion after reading a signal from the solid-state image sensor, the scale of the processing circuit becomes large and complicated.

On the other hand, in the conventional example shown in FIG. 12, the above-mentioned problems are solved, but since two line memories must be arranged in the solid-state image pickup device, The structure becomes complicated and the chip area of the device increases. Further, it is possible that a new FPN is generated due to the variation in the capacity of the line memory. at the same time,
There is a possibility that the speed limit when performing high-speed imaging will be limited by the writing speed or the reading speed of the line memory.

The present invention has been made in order to solve the above problems of the conventional FPN suppressing means for a solid-state image pickup device.
FPN memory is not required, and it can be used for moving image capturing that can suppress dark FPN due to temperature change stably.
Another object of the present invention is to provide a signal read-out processing method for a solid-state image sensor that does not require double speed horizontal scanning and does not require a memory in the solid-state image sensor.

[0013]

In order to solve the above-mentioned problems, the invention according to claim 1 has a pixel portion in which the photoelectric conversion elements are unit pixels and the unit pixels are arranged in a matrix, and the pixel portion There are m (m is an integer of 2 or more) vertical signal lines arranged in each column, and the pixel of each pixel column is 1 in the vertical direction.
By connecting to different vertical signal lines for each pixel and by horizontally scanning m horizontal pixel rows at the same time, the signals of m pixels are simultaneously read from the m output terminals via the m output signal lines. In the signal reading processing method of the XY address type solid-state image pickup device configured to output, the optical signal generated by the photo-generated charge of each pixel of an arbitrary pixel row is read, and then the photo-generated charge of each pixel of the pixel row is read. Immediately after resetting, the dark signal in the state where there is no photo-generated charge is read out, the timings of both read signals are adjusted by an external circuit, and then the dark signal is subtracted from the optical signal.

In the signal read processing method thus constructed, the FPN can be suppressed in real time without using a memory.
Even when N changes, an image in which the dark FPN is suppressed can always be obtained by following the change. Of course, there is no problem with moving images, and double speed horizontal scanning is not required unlike the conventional example shown in FIG. Since at least two vertical signal lines of the solid-state image sensor can achieve the above-mentioned object,
Unlike the conventional example shown in FIG. 12, the structure in the solid-state image sensor does not become complicated, and the chip area does not become extremely large.

According to a second aspect of the present invention, in the signal readout processing method of the solid-state image pickup device according to the first aspect, the solid-state image pickup device switches connection between m output signal lines and m output terminals. A switch is built in, and an arbitrary output terminal is configured to always output only one of the light signal and the dark signal of each pixel. As described above, since the solid-state image sensor has the built-in switch, a switch for switching the output of the pixel output signal in a signal processing circuit other than the solid-state image sensor becomes unnecessary.

According to a third aspect of the present invention, in the signal read-out processing method of the solid-state image pickup device according to the first or second aspect, a CMD is used as a photoelectric conversion element forming a unit pixel in the solid-state image pickup element. Thereby, claim 1
Alternatively, a solid-state imaging device suitable for applying the signal read processing method described in 2 is configured.

[0017]

Next, an embodiment will be described. FIG. 1A is a block configuration diagram of a signal read-out processing device for a solid-state image pickup device for explaining a first embodiment of a signal read-out processing method for a solid-state image pickup device according to the present invention. This embodiment corresponds to the invention described in claims 1 and 3, and in FIG. 1A, 1 is a light receiving portion in which photoelectric conversion elements such as CMD are used as pixels, and the pixels are arranged in a matrix. 2 is a solid-state image sensor.
The light receiving section 2 has a structure of 4 rows × 4 columns for the sake of simplicity, and includes pixels 3-11 to 3-44. A photoelectric conversion element such as a CMD used as a pixel is illustrated here as having a control element and an output terminal as illustrated in FIG. 1B, and a read signal is input to the control terminal. Then, a signal (hereinafter, optical signal) corresponding to the photo-generated electric charge of the photoelectric conversion element is output from the output terminal. A vertical scanning circuit 4 sends out a scanning signal for selecting a readout row. Reference numeral 5 denotes a horizontal scanning circuit, which sends out a scanning signal for sequentially reading out four pixels in a row in a reading state. 12-1 and 12-2 are amplifiers,
This is for amplifying pixel output signals output from the output terminals 11-1 and 11-2 of the solid-state imaging device 1, and the amplifier 12-
The output signals amplified by 1 and 12-2 are switched respectively.
It is input to either the 1H delay line 14 or the minus input terminal of the subtracter 15 via 13-1 and 13-2. The output signal input to the delay line 14 is delayed by one line and then input to the plus input terminal of the subtractor 15. Subtractor
In 15, the signal input to the minus terminal is subtracted from the signal input to the plus terminal, and the subtracted signal is output as a video signal.

Next, the internal structure of the solid-state image pickup device 1 will be described. In this embodiment, two vertical signal lines are arranged in each pixel column of the pixel group. The control terminals of the pixels in the first row of the pixel group are connected to the vertical scanning circuit 4 via the vertical selection line 7-1, and similarly, the control terminals of the pixels in the second to fourth rows of the pixel group are respectively connected to the vertical selection line. It is connected to the vertical scanning circuit 4 via 7-2 to 7-4. Pixels 3-11, 3
The output terminal of −31 is connected to the vertical signal line 8-1, is connected to the output signal line 10-1 via the horizontal selection switch 6-1, and the output terminals of the pixels 3-21 and 3-41 are vertical signal lines. 8-2
, And is connected to the output signal line 10-2 via the horizontal selection switch 6-2. The output terminals of the pixels 3-12 and 3-32 are connected to the vertical signal line 8-3, and are connected to the output signal line 10-1 via the horizontal selection switch 6-3.
The output terminals of 22 and 3-42 are connected to the vertical signal line 8-4,
It is connected to the output signal line 10-2 via the horizontal selection switch 6-4. The output terminals of the pixels 3-13 and 3-33 are connected to the vertical signal line 8-5, connected to the output signal line 10-1 via the horizontal selection switch 6-5, and connected to the output signal line 10-1 of the pixels 3-23 and 3-43. The output terminal is connected to the vertical signal line 8-6, and is connected to the output signal line 10-2 via the horizontal selection switch 6-6. The output terminals of the pixels 3-14 and 3-34 are vertical signal lines 8-7.
Connected to the output signal line 10-1 through the horizontal selection switch 6-7, the output terminals of the pixels 3-24 and 3-44 are connected to the vertical signal line 8-8, and the horizontal selection switch 6- 8
Is connected to the output signal line 10-2 via. In this way, the output terminals of the pixels in each column are alternately connected to the two vertical signal lines. And the output signal lines 10-1 and 10-2 are
They are connected to the output terminals 11-1 and 11-2, respectively. 9
Reference numerals -1 to 9-4 denote output lines of the horizontal scanning circuit 5, which are horizontal selection switches 6-1 and 6-2, 6-3 and 6-4, 6-5 and 6-.
6, 6-7 and 6-8 are commonly connected to the control terminals.

Next, the operation of the signal read-out processing device for the solid-state image pickup device thus configured will be described.
FIG. 2 is a timing chart for explaining this operation. When the read control signal at the read level from the vertical scanning circuit 4 is input to the control terminal of each pixel of an arbitrary pixel row via the vertical selection line, the signal of each pixel is output from the output terminal of the pixel as a vertical signal. Output to the line. In FIG. 2, the vertical selection lines 7-1 of the first to fourth rows of the solid-state imaging device 1 are shown.
The read control signals input to 7-4 are indicated by A, B, C, and D, respectively. This read control signal A
As can be seen from D to D, in this embodiment, for example, the read control signal A of the first row of the pixel group of the light receiving unit 2 is read.
Becomes the read level during the period of t = 0 to 1, and t =
At the time point of 1, the reset level is reached, and during the period of t = 1 to 2, the read level is again reached. The other periods are non-selection levels. Therefore, in the first row, the bright signal in the state of accumulating the photo-generated charges is read during the period of t = 0 to 1, and the accumulated charges are reset at the time of t = 1, and then t = 1 to 2 again. During this period, the signals of the pixels on the first row are read out. This corresponds to reading out the dark signal in a state where the photo-generated charges are not accumulated in the period of t = 1 to 2.

Generally, a solid-state image pickup element generates an FPN due to variations in characteristics of each pixel, but the dark-time signal is read out when the dark current is zero (hereinafter, used in this sense). .) Is being read. Since the dark current has been suppressed to a very small value recently in any photoelectric conversion element and can be neglected under normal use conditions, the dark FPN is caused by variations in characteristics other than the dark current. Means what is present.
For example, in CMD, which is one of the internal amplification type image pickup devices, the characteristic variation of the transistor that amplifies the accumulated charge is F
It is the main cause of PN. The dark FPN exists at a constant level irrespective of the light amount, and is offset-superimposed on the bright signal corresponding to the initially generated photogenerated charges.

According to A (control signal) in FIG. 2, t = 0 to 1
In the period of, the first row of the pixel group is in the read state. The optical signals of the pixels 3-11 to 3-14 are the vertical signal lines 8-1, 8-3, 8-5, 8-7 and the horizontal selection switches 6-1, 6-3, 6-5, 6-, respectively. The signal is sequentially output to the output signal line 10-1 via 7. Output signal line 10-
Pixel output signals output to 1 and 10-2 are shown in time series in E and F of FIG. 2A, in the first row of the pixel group, the photo-accumulation charge of each pixel is reset at time t = 1, and the dark signal is read during the period t = 1 to 2.
Then, it is output to the output signal line 10-1 through the same route as during the period of t = 0 to 1. On the other hand, the optical signal on the second row of the pixel group is in the read state during the period of t = 1 to 2 according to B of FIG. The optical signals of the pixels 3-21 to 3-24 in the second row are vertical signal lines 8-2, 8-4, 8-6, 8-, respectively.
8 and horizontal selection switches 6-2, 6-4, 6-6, 6-
The signal is sequentially output to the output signal line 10-2 via the signal line 8. In this way, the optical signals of the second row are output through the vertical signal line, the horizontal selection switch, and the output signal line, which are different from the dark signal of the first row, which are simultaneously read out, and thus, they are independently read out. be able to. Similarly, the optical signal and the dark signal of each row are read out in the same manner, and they are read out independently as shown in E and F of FIG.

The pixel output signals output to the output signal lines 10-1 and 10-2 are input to the amplifiers 12-1 and 12-2 via the output terminals 11-1 and 11-2, respectively, and are amplified. After that, it is inputted to either the 1H delay line 14 or the minus input terminal of the subtracter 15 via the switches 13-1 and 13-2, respectively. When the output side of the switch 13-1 is connected to the a side as shown in FIG. 1A, the amplifier 12-
The output signal of 1 is input to the 1H delay line 14, and when connected to the b side, it is input to the minus input terminal of the subtracter 15. On the other hand, in the switch 13-2, when the output side of the switch is connected to the b side as shown in FIG. 1A, the output signal of the amplifier 12-2 is input to the 1H delay line 14 and connected to the a side. Then, the subtractor 15 is configured to be input to the minus input terminal.

FIG. 2G shows the switching timing of the switch connection. In the period of t = 0 to 1, the output sides of the switches 13-1 and 13-2 are connected to the a side by G in FIG. At this time, according to E of FIG.
An optical signal of each pixel in the first row of the light receiving unit 2 is output to -1, which is input to the 1H delay line 14 via the output terminal 11-1, the amplifier 12-1 and the switch 13-1. ,
Here, after being delayed by one line, it is input to the plus input terminal of the subtractor 15 in the period of t = 1 to 2. This input is shown at H in FIG. On the other hand, in the period of t = 1 to 2, G of FIG.
Thus, the output sides of the switches 13-1 and 13-2 are connected to the b side. At this time, the output signal line 10-1 is connected to E of FIG.
The dark signal of each pixel in the first row of the light receiving section 2 is output by the output terminal 11-1, the amplifier 12-1, and the switch 13-1 to the minus input terminal of the subtracter 15. Is entered. This input is shown at I in FIG. 2E, the optical signal of each pixel on the second row of the light receiving unit 2 output to the output signal line 10-2 in the same period is the output terminal 11-2, the amplifier 12-2, and the switch 13-2. Is input to the 1H delay line 14 through 1 and delayed by 1 line, and then t = 2
It is input to the plus input terminal of the subtractor 15 in the period of ~ 3.
This state is shown by H in FIG.

As described above, the output signals of the amplifiers 12-1 and 12-2 are supplied to the 1H delay line 14 and the subtractor for each line.
By switching the switches 13-1 and 13-2 so that they are alternately input to the negative input terminal of 15, the subtractor
An optical signal of each pixel of the light receiving portion 2 is input to the plus input terminal of 15 through the 1H delay line 14, and a dark signal is input to the minus input terminal. In the light receiving section 2, the optical signal of each pixel is read out one line before the dark signal of the pixel is read out, but when the optical signal of the pixel is input to the plus input terminal, it is set to 1 by the 1H delay line 14. Since they are line-delayed, both are input to the subtractor 15 at the same time. This state is shown by H and I in FIG. The subtractor 15 subtracts the dark signal from the input optical signal of each pixel and outputs the subtracted signal.
In this way, by subtracting the dark signal from the optical signal, it is possible to obtain a video signal in which the dark FPN is suppressed.

In this way, in the first embodiment shown in FIG. 1A, no memory is used, and in addition, in FIG.
Without performing double speed horizontal scanning like the conventional example shown in
FPN suppression can be performed in real time.

Next, a second embodiment will be described. FIG. 3 is a block configuration diagram of a signal read-out processing device of a solid-state image sensor for explaining the second embodiment.
The same or corresponding components as those of the first embodiment shown in (A) are designated by the same reference numerals. This embodiment corresponds to the invention described in claims 2 and 3, and the difference from the first embodiment shown in FIG.
The switches 13-1 and 13-2 shown in (A) are incorporated in the solid-state imaging device 1. In FIG. 3, 16-1,
16-2 is the built-in switch.

In the first embodiment shown in FIG. 1A, the signal read from the solid-state image pickup device must be switched line by line, but in this embodiment, the function is changed. By incorporating the in the solid-state image sensor, the processing after reading is simplified.

Next, the operation of the signal read-out processing device of the solid-state image pickup device having such a configuration will be described.
FIG. 4 is a timing chart for explaining this operation. The signal of each pixel of the light receiving section 2 is output by the output signal line 10-1,
The description up to 10-2 is omitted because it is the same as in the first embodiment until it is output to 10-2. Output signal line 10-
Pixel output signals output to 1 and 10-2 are shown in time series.

In the built-in switch 16-1, when the output side of the switch is connected to the a side as shown in FIG. 3, the signal of the output signal line 10-1 is output from the output terminal 11-1 and the b side is connected. When connected, it is configured to output from the output terminal 11-2. On the other hand, in the built-in switch 16-2, when the output side of the switch is connected to the b side as shown in FIG. 3, the signal of the output signal line 10-2 is output from the output terminal 11-1.
When connected to the a side, the output terminal 11-2 outputs the signal. 4G shows the switching timing of the switch connection.

In the period of t = 0 to 1, the optical signal of the pixel in the first row of the light receiving section 2 is output to the output signal line 10-1 as shown in E of FIG. At this time, since the output side of the built-in switch 16-1 is connected to the a side by G in FIG. 4, the optical signal of the first row is output from the output terminal 11-1. The output signals of the output terminals 11-1 and 11-2 are shown by J and K in FIG. 4, respectively.

Next, in the period of t = 1 to 2,
As indicated by E and F, the dark signal of the first row is output to the output signal line 10-1, and the optical signal of the second row is output to the output signal line 10-2. At this time, since the output sides of the built-in switches 16-1 and 16-2 are connected to the b side by G in FIG. 4, the dark signal in the first row is output from the output terminal 11-2 and the dark signal in the second row is output. Is output from the output terminal 11-1.
Similarly, the pixel output signal from each output terminal is similar to that shown in FIG.
Are output as shown in J and K. Output terminal 11
The optical signal of the pixel is always output from -1, and the output terminal 11-
From 2, the dark signal of the pixel is always output.

The optical signal output from the output terminal 11-1 is
The signal is amplified by the amplifier 12-1 and input to the 1H delay line 14, where it is delayed by 1 line, and then input to the plus input terminal of the subtracter 15. On the other hand, the dark signal output from the output terminal 11-2 is amplified by the amplifier 12-2,
It is input to the minus input terminal of the subtracter 15. In the light receiving unit 2, the optical signal of each pixel is read out one line before the dark signal of the pixel is read out. When the optical signal of the pixel is input to the plus input terminal, the 1H delay line 14 is used. Since they are delayed by one line, both are input to the subtractor 15 at the same time. This state is shown by H and I in FIG. In the subtractor 15, the dark signal is subtracted from the input optical signal of each pixel and output. In this way, by subtracting the dark signal from the optical signal,
A video signal with suppressed FPN in the dark can be obtained.

In this way, in the second embodiment shown in FIG. 3 as well, memory is not used, and FPN suppression is performed in real time without performing double speed horizontal scanning as in the conventional example shown in FIG. It can be carried out. Further, in the first embodiment, the switch for switching the signal after reading the pixel output signal from the output terminal of the solid-state image sensor is required, but in the present embodiment, it is unnecessary because the switch is built in. is there.

Next, a third embodiment will be described. FIG. 5 is a block configuration diagram of a signal read-out processing device of a solid-state imaging device for explaining the third embodiment.
The same or corresponding components as those of the first embodiment shown in (A) are designated by the same reference numerals. This embodiment corresponds to each of the inventions described in claims 1 to 3, and in FIG. 5, the light receiving section 2 has 8 rows × for simplifying the description.
It has a two-column structure and is composed of pixels 3-11 to 3-82. The output signal of each pixel output from the light receiving unit 2 is output from the output terminals 11-1 to 11-4. Output terminal 11-1,
The signals output from 11-3 are amplifiers 12-1 and 12-1, respectively.
It is input to 12-2. The signals output from the output terminals 11-2 and 11-4 are input to either of the amplifiers 12-1 and 12-2 via the switches 17-1 and 17-2, respectively. After that, the video signal in which the FPN is suppressed is output from the subtracter 15 through the same process as in the first embodiment.

In the third embodiment shown in FIG. 5, the number of vertical signal lines per pixel column of the light receiving portion of the first embodiment is four and the two-row addition read system is adopted. Also in the above, it is shown that FPN can be suppressed by the same method as in the first embodiment.

Next, the internal structure of the solid-state image sensor according to the third embodiment will be described. In this embodiment,
Four vertical signal lines are arranged in each pixel column of the pixel group. The control terminals of the pixels in the first row of the pixel group are connected to the vertical scanning circuit 4 via the vertical selection line 7-1, and similarly, the control terminals of the pixels in the second to fourth rows of the pixel group are respectively connected to the vertical selection line. It is connected to the vertical scanning circuit 4 via 7-2 to 7-8. The output terminals of the pixels 3-11 and 3-51 are vertical signal lines 8
-1, is connected to the output signal line 10-1 via the horizontal selection switch 6-1 and the output terminals of the pixels 3-21 and 3-61 are connected to the vertical signal line 8-2, It is connected to the output signal line 10-2 via the selection switch 6-2. The output terminals of the pixels 3-31 and 3-71 are vertical signal lines 8-3.
Connected to the output signal line 10-3 via the horizontal selection switch 6-3, and the output terminals of the pixels 3-41 and 3-81 are connected to the vertical signal line 8-4. It is connected to the output signal line 10-4 via 6-4. The output terminals of the pixels 3-12 and 3-52 are connected to the vertical signal line 8-5, and the output signal line 10- is connected via the horizontal selection switch 6-5.
1 and the output terminals of the pixels 3-22 and 3-62 are connected to the vertical signal line 8-6 and the horizontal selection switch 6-6.
Is connected to the output signal line 10-2 via. Pixel 3-
The output terminals of 32, 3-72 are connected to the vertical signal line 8-7,
The horizontal selection switch 6-7 is connected to the output signal line 10-3. The output terminals of the pixels 3-42 and 3-82 are connected to the vertical signal line 8-8. It is connected to the output signal line 10-4 via. In this way, the output terminals of the pixels in each column are sequentially connected to the four vertical signal lines. The output signal lines 10-1 to 10-4 are connected to the output terminals 11-1 to 11-4, respectively.

Next, the operation of the third embodiment configured as described above will be described. 6 and 7 are timing charts for explaining this operation. Figure 6
In FIG. 7, read control signals input to the vertical selection lines 7-1 to 7-8 of the first to eighth rows of the solid-state image sensor 1 are indicated by A to H, respectively.

In the solid-state image sensor according to this embodiment, since there are four vertical signal lines for each pixel, various readout methods are possible. Here, as one example thereof, a read method for performing the same FPN suppression as in each of the above embodiments while performing two-row mixed interlaced read will be described. The two-row mixed interlaced read method uses the combination of the first and second rows, the third and fourth rows, the fifth and sixth rows, ... This is a method of reading by the combination of the third and fourth lines, the fourth and fifth lines, the sixth and seventh lines, ....

First, a method of reading the A field will be described with reference to FIG. In the A field,
As shown in FIGS. 6A and 6B, the first and second rows of the pixel group are in the read state during the period of t = 0 to 1. The optical signals of the pixels 3-11 and 3-12 are respectively supplied to the vertical signal line 8-
1, 8-5 and the horizontal selection switches 6-1 and 6-5 to sequentially output to the output signal line 10-1. In addition, the optical signals of the pixels 3-21 and 3-22 are respectively supplied to the vertical signal line 8-
2, 8-6 and horizontal selection switches 6-2, 6-6, and are sequentially output to the output signal line 10-2. Output signal line
The pixel output signals output to 10-1 and 10-2 are shown in time series as I and J in FIG. As shown in FIGS. 6A and 6B, in the first and second rows of the pixel group, the light accumulated charge of each pixel is reset at the time of t = 1, and the dark signal is read during the period of t = 1 to 2. Be done. Even in the period of t = 1 to 2,
The dark signal of the first row is output to the output signal line 10-1 and the dark signal of the second row is output to the output signal line 10-2 through the same route as in the period of t = 0 to 1.

On the other hand, the optical signals of the third and fourth rows of the pixel group are in the read state during the period of t = 1 to 2, as shown in C and D of FIG. The optical signals of the pixels 3-31 and 3-32 are sequentially output to the output signal line 10-3 via the vertical signal lines 8-3 and 8-7 and the horizontal selection switches 6-3 and 6-7, respectively. Further, the optical signals of the pixels 3-41 and 3-42 are the vertical signal lines 8-4 and 8-8 and the horizontal selection switch 6-, respectively.
The signals are sequentially output to the output signal line 10-4 via 4, 6-8. This output mode is shown by K and L in FIG.
In this way, the optical signals of the third and fourth rows are output through the vertical signal line, the horizontal selection switch, and the output signal line, which are different from the dark signal of the first and second rows that are read at the same time. It can be read independently. Similarly,
The optical signal and the dark signal of each row are read out, and I to L in FIG.
Each of them is independently read as shown in FIG.

In the A field, the switch 17-
The output side of 1, 17-2 is always connected to the c side of FIG. Therefore, the output terminals 11-2 and 11-4 are connected to the amplifiers 12-1 and 12-2 via the switches 17-1 and 17-2, respectively. Therefore, the output signal lines 10-1, 10-2
The pixel output signal lines output to
The pixel output signal lines output to the output signal lines 10-3 and 10-4 after being input to the amplifier 12-1 in a mixed form of the signals of the two rows via 1 and 11-2 are output. Terminal 11-
After passing through 3 and 11-4, both signals are input to the amplifier 12-2. For simplification of description, it is assumed here that, if two signal lines are connected to the same place without using an adder or the like, the output signals of both signals are added. For example,
In the period of t = 0 to 1, the output signal lines 10-1, 10-
As shown in I and J of FIG. 6, the optical signals of the first row and the second row are output to the amplifier 2, and the signals of both are added and input to the amplifier 12-1. Amplifier 12-1,
The signals input to 12-2 are shown as M and N in FIG. amplifier
The signals input to 12-1 and 12-2 are amplified and output, and are input to either the 1H delay line 14 or the minus input terminal of the subtracter 15 via the switches 13-1 and 13-2, respectively. .

The switch 13-1 has an amplifier 12-1 when the output side of the switch is connected to the a side as shown in FIG.
Output signal is input to the 1H delay line 14, and when connected to the b side, it is input to the minus input terminal of the subtracter 15. On the other hand, the switch 13-2 is shown in FIG.
When the output side of the switch is connected to the b side, the output signal of the amplifier 12-2 is input to the 1H delay line 14, and when it is connected to the a side, it is input to the minus input terminal of the subtractor 15, as shown in FIG. Is configured to. The timing of switching the connection of the switches 13-1 and 13-2 is shown in O of FIG. In the period of t = 0 to 1, the output sides of the switches 13-1 and 13-2 are connected to the a side as shown by O in FIG. At this time, as shown by M in FIG.
The optical signals of the first and second rows are input to 1 and are input to the 1H delay line 14, which is delayed by one line and then delayed by one line during the period of t = 1 to 2. Input to the plus input terminal. This aspect is shown in P of FIG. On the other hand, in the period of t = 1 to 2, the output sides of the switches 13-1 and 13-2 are connected to the b side as shown by O in FIG. At this time, as shown by M in FIG. 6, the dark time signals of the first and second rows are input to the amplifier 12-1 and are input to the minus input terminal of the subtracter 15. This aspect is shown in Q of FIG. Further, as shown by N in FIG. 6, the optical signals of the third and fourth rows are input to the amplifier 12-2 during the same period, and these are input to the 1H delay line 14 where the 1-line delay is delayed. After that, it is input to the plus input terminal of the subtracter 15 in the period of t = 2 to 3. This aspect is shown at P in FIG.

As described above, the output signals of the amplifiers 12-1 and 12-2 are supplied to the 1H delay line 14 and the subtractor for each line.
By switching the switches 13-1 and 13-2 so that they are alternately input to the negative input terminal of 15, the subtractor
The addition signal of the optical signals of the pixels of two adjacent rows of the light receiving unit 2 is input to the plus input terminal of 15 through the 1H delay line 14, and the addition signal of the dark signal is input to the minus input terminal. Is configured to. In the light receiving unit 2, the optical signal of each pixel is read out one line before the dark signal of the pixel is read out. When the optical signal of the pixel is input to the plus input terminal, the 1H delay line 14
Therefore, both are input to the subtractor 15 at the same time because they are delayed by one line. This state is shown in P and Q of FIG. The subtractor 15 subtracts the dark signal from the input optical signal of each pixel and outputs the subtracted signal. In this way,
By subtracting the dark signal from the optical signal, the dark FPN
It is possible to obtain a video signal with suppressed noise.

Next, reading of the B field will be described with reference to the timing chart of FIG. The difference from the A field is that the combination of pixel rows that are in the read state at the same time changes, and the output side of the switches 17-1 and 17-2 is the d side of FIG. 5, and the output terminals 11-1 and 11-4 The outputs are added and input to the amplifier 12-1, and the output terminal 11-2 and
That is, the outputs of 11-3 are added and input to the amplifier 12-2. As described above, in the B field, the combination of two rows read simultaneously is 2
Since it is the third and fourth rows, the fourth and fifth rows, and the sixth and seventh rows, the signals of the first and eighth rows that have no target rows to be combined are not normally used as video signals. The description is omitted.

In the same way as when reading the A field, during the period of t = 1 to 2, the optical signals of the pixels in the second and third rows are output signal lines according to B and C in FIG.
It is read to 10-2 and 10-3. Similarly, the signals of the respective rows are output to the respective output terminals, and this mode is shown in I to L of FIG. Switch 17 in B field
The output sides of -1, 17-2 are always connected to the d side of FIG. Therefore, the output terminal 11-1 connected to the output signal line 10-1 and the output terminal 11-4 connected to the output signal line 10-4 are connected to the amplifier 12-1. The output terminal 11-2 connected to 10-2 and the output terminal 11-3 connected to the output signal line 10-3 are amplifier 12
-2. Therefore, the output signals of the pixels output to the output signal lines 10-1 and 10-4 shown by I to L in FIG. 7 are added and input to the amplifier 12-1.
The output signals of the pixels output to the output signal lines 10-2 and 10-3 indicated by J and K are added and input to the amplifier 12-2. These input signals are respectively M and N in FIG.
Is shown in Hereinafter, as in the case of the A field, the plus and minus input terminals of the subtractor 15 are connected to the plus input terminals of the adjacent light receiving unit 2 as shown by P and Q in FIG.
The optical signal of each pixel of the row is input, and the dark signal of each pixel of two adjacent rows of the light receiving unit 2 is input to the minus input terminal. The subtractor 15 subtracts the signal input to the minus input terminal from the signal input to the plus input terminal and outputs the subtracted signal, thereby obtaining the FPN-suppressed video signal.

As described above, in the third embodiment, since four vertical signal lines are provided for each pixel column of the light receiving portion, even in the combination of different rows, the FPN suppression is performed as in the above embodiments. It can be performed. As a result, even in two-row mixed interlaced reading, FP
It is possible to read while suppressing N.

Also in the third embodiment,
Similar to the reading method shown in the first and second embodiments, one-row independent reading without adding two rows is also possible. This can be done by providing one amplifier for each output terminal of the solid-state image sensor in FIG.
In this case, since the optical signals for two rows and the dark signals for two rows can be read at the same time, the same horizontal scanning speed as in FIG.
It is possible to read at a frame rate twice as high as that of the first embodiment shown in FIG. 1 and perform similar FPN suppression.

In each of the above-mentioned embodiments, two or four vertical signal lines are arranged per pixel column.
Even when three or more vertical signal lines are arranged per pixel column, FPN suppression can be similarly performed.

In each of the above embodiments, the case where the number of pixels of the light receiving portion is set to 4 × 4 or 2 × 8 has been described, but the same applies to a solid-state image sensor having a larger number of pixels. It goes without saying that it is applicable. Further, the photoelectric conversion element used for the pixel of the light receiving unit is CMD, SIT,
Any material can be used as long as it can form an XY address type solid-state imaging device such as AMI.

[0050]

As described above on the basis of the embodiments of the invention, according to the invention of claim 1, the dark FPN is real time for both moving images and still images without using a memory. Even if the dark FPN is suppressed and changes in the dark FPN due to a temperature change or the like, it is possible to immediately follow the change and always obtain an image in which the dark FPN is suppressed stably. Further, since the double speed horizontal scanning is not necessary at the time of reading, the time axis conversion in the processing circuit is unnecessary. Further, since it is not necessary to provide a line memory in the solid-state imaging device, it is possible to prevent an increase in the chip area of the device due to the addition of the line memory and the generation of new FPN due to the variation in the capacity of the line memory. Further, according to the second aspect of the invention, since the switch is built in the solid-state image sensor, a switch for switching the output of the pixel output signal in the signal processing circuit other than the solid-state image sensor becomes unnecessary, and the scale of the signal processing circuit can be reduced. can do.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing a signal readout processing device of a solid-state image sensor for explaining a first embodiment of a signal readout processing method of a solid-state image sensor according to the present invention, and a diagram showing a pixel configuration.

FIG. 2 is a timing chart for explaining the operation of the first embodiment shown in FIG.

FIG. 3 is a block configuration diagram showing a signal read-out processing device of a solid-state imaging device for explaining a second embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of the second embodiment shown in FIG. 3;

FIG. 5 is a block configuration diagram showing a signal read-out processing device of a solid-state imaging device for explaining a third embodiment of the present invention.

FIG. 6 is a timing chart for explaining an operation of an A field in the third embodiment shown in FIG.

FIG. 7 is a timing chart for explaining the operation of the B field in the third embodiment shown in FIG.

FIG. 8 is a block configuration diagram showing a configuration example of FPN suppressing means used in a conventional image reproducing device.

FIG. 9 is a timing chart for explaining a conventional dark FPN signal capturing method for FPN suppression.

FIG. 10 is a block configuration diagram showing another configuration example of the FPN suppressing unit used in the conventional image reproducing apparatus.

11 is a timing chart for explaining the operation of the FPN suppressing means shown in FIG.

FIG. 12 is a block configuration diagram showing still another configuration example of the FPN suppressing unit used in the conventional image reproducing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Solid-state image sensor 2 Light receiving part 3-11 to 3-82 Pixel 4 Vertical scanning circuit 5 Horizontal scanning circuit 6-1 to 6-8 Horizontal selection switch 7-1 to 7-8 Vertical selection line 8-1 to 8-8 Vertical signal line 9-1 to 9-4 Horizontal scanning circuit output line 10-1 to 10-4 Output signal line 11-1 to 11-4 Output terminal 12-1, 12-2 Amplifier 13-1, 13-2 Switch 14 1H delay line 15 Subtractor 16-1, 16-2 Built-in switch 17-1, 17-2 switch

Claims (3)

[Claims] 1. A pixel unit in which photoelectric conversion elements are used as unit pixels and the unit pixels are arranged in a matrix, and vertical signal lines in which m (m is an integer of 2 or more) are arranged per column of the pixel unit. , And the pixels of each pixel column are connected to different vertical signal lines in the vertical direction for each pixel, and m horizontal pixel rows are simultaneously horizontally scanned, so that the signals of m pixels are In a signal readout processing method of an XY address type solid-state image sensor configured to be able to simultaneously read out from m output terminals via an output signal line, an optical signal due to photo-generated charges of each pixel in an arbitrary pixel row is read out. Then, the dark signal in the state where there is no photogenerated charge immediately after resetting the photogenerated charge of each pixel in the pixel row is read out, and the timing of both read signals is adjusted by an external circuit, and then the dark signal is read from the optical signal. Subtracting the hour signal A method for processing signal readout of the solid-state image sensor, comprising: 2. The solid-state image sensor includes a switch for switching connection between m output signal lines and m output terminals, and any output terminal has the optical signal or the dark signal of each pixel. 2. The signal read processing method for the solid-state image pickup device according to claim 1, wherein only one of the two is always output. 3. The signal readout processing method for the solid-state image sensor according to claim 1, wherein the solid-state image sensor uses a CMD as a photoelectric conversion element forming a unit pixel.