JPH09247548A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To execute flaw correction through simple configuration. SOLUTION: An arithmetic circuit 39 executes the difference absolute value calculation of |(A+C)/2-B| from a picture element from an adder 37 and the picture element from a flip flop(FF) 31. The arithmetic circuit 41 executes the difference absolute value calculation of |B-C| from the picture elements from the FF 31 and the FF 35. The arithmetic circuit 43 executes the difference absolute calculation of |A-B| from the picture elements from the FF 27 and the FF 31. Comparison circuits 47, 49, 51 output a positive signal respectively in the case when each input absolute value is larger than a definite value N, and a logical product is taken by an AND circuit 53. A flaw judgement circuit 55 generates the signals of the past, the present and the future from the output of the AND circuit 53, and when only the signal of the present is positive, it supplies a flaw present signal to a switch 9, and in the other case, it supplies a flaw absent signal. The switch 9 selects the picture element to which the output of the adder 37 was used as an interpolation signal at the time of the flaw present signal, and in the case of the flaw absent signal, it selects the picture element to which the output of the FF 31 was used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a flaw correction device.

[0002]

2. Description of the Related Art A solid-state image pickup device using a CCD (charge coupled device) has been developed, and a video camera and an electronic still camera using the solid-state image pickup device have been commercialized. This solid-state imaging device includes a plurality of photoelectric conversion elements (photodiodes), vertical charge transfer paths, and horizontal charge transfer paths.

If one of the photoelectric conversion elements arranged on the silicon chip has a defect, the signal (pixel) of the photoelectric conversion element is transferred and output as a signal unrelated to the captured optical image, and the image is displayed. It will appear as a scratch on the top.

FIG. 5 shows an example of a signal output (a) of a solid-state image pickup device having no flaw and a signal output (b) of a solid-state image pickup device having a flaw. In the defective pixel, there is a case where the signal is not photoelectrically converted and a signal is not output (black defect) and a signal is always output (white defect).

The scratches of the solid-state image pickup device are randomly generated during manufacturing. Therefore, the position of scratches and the number of scratches are different for each solid-state imaging device.

FIG. 6 is a block diagram of a solid-state image pickup device having a conventional flaw correction device. The optical image incident on the light receiving surface of the solid-state image sensor 101 is photoelectrically converted by the solid-state image sensor 101 and output as a video signal (OS signal) a.

The video signal a contains a flaw signal which differs for each solid-state image pickup device. First, the video signal a is the CDS
(Noise reduction circuit called correlated double sampling) /
It is input to an AGC (gain adjustment amplifier) 103. C
The output signal b of the DS / AGC 103 is output to the interpolation signal generation circuit 105 and the switch 107. The interpolation signal generation circuit 105 generates the interpolation signal c and outputs it to the switch 107.

The address generator 123 generates an address (scanning position) g and supplies it to the memory 121 (ROM). When the address g matches the flaw position, the memory 121 generates a flaw signal h and supplies it to the control terminal of the switch 107.

The switch 107 selects the signal b while the flawed signal h is not supplied, and selects the interpolation signal c when the flawed signal h is supplied.

The video signal d from the switch 107 is supplied to a luminance signal processing / contour emphasizing circuit 109 and a color separation / color processing circuit 111. Luminance signal processing and contour enhancement circuit 10
Brightness signal (Y signal) e from 9 and color separation / color processing circuit 1
The color signal (C signal) f from 11 is added by the adder 115 to form a composite video signal (video signal), and the output terminal 1
17 is supplied. The address generator 123 uses color separation
A sync pulse is generated and supplied to the color separation / color processing circuit 111.

The address generator 123 also generates a drive pulse i and supplies it to the buffer 125. Buffer 12
The drive pulse j from 5 is supplied to the solid-state imaging device 101.

As described above, when a ROM is used as the memory 121, it is difficult to operate when the number of pixels is increased and the changing speed of the address g is increased. Therefore, ROM and RA are stored in the memory 121.
It is common to use M together and store the distance between scratches (relative position) instead of the absolute position of the scratch. As described above, it is necessary to write different scratch information in the ROM of the memory 121 for each solid-state image sensor. Further, this method requires a memory, and therefore the solid-state imaging device becomes large-scale.

There is also a flaw correction method that does not use a memory. A representative example thereof is a flaw correction method using a median filter. FIG. 7 is a diagram in which horizontal 3 pixels × vertical 3 pixels are replaced by a median filter. What is replaced is the central pixel of the 3 × 3 pixels.

To use the median filter, 3 ×
It is necessary that the signals of the three pixels have the same component (usually a luminance signal). In the case of a color solid-state image pickup device using a color filter, the signal of 2 × 2 pixels is a different component including color information.
I can't input to the median filter as it is.

Therefore, Y, R, and
It is necessary to insert a median filter for each of the G and B signals. Alternatively, a complicated circuit is required in which the luminance signal (Y) is input to the median filter and the color signal is also corrected in conjunction with the replacement by this filter.

[0016]

In a defect correction device for a solid-state image pickup device using a ROM, it is necessary to write different defect information for each solid-state image pickup device into the ROM, which is troublesome. Furthermore, since it requires a memory, the scale becomes large.

On the other hand, in the defect correction device using the median filter, the effect is obtained only with the signals of the same component.
There was a drawback that the circuit became complicated when colorization was performed.

Therefore, an object of the present invention is to provide a solid-state image pickup device capable of correcting flaws with a simple and small-scale circuit.

[0019]

[Means for Solving the Problems]

(First Configuration Example) The absolute value (| AB |) of the difference between the signal amount A of the first pixel and the signal amount B of the second pixel which are adjacent in the horizontal direction from the solid-state image sensor is calculated. The absolute value of the difference between the signal amount B of the second pixel and the signal amount C of the third pixel adjacent to the second pixel in the horizontal direction from the solid-state image sensor (| B -C |) second computing means, a value obtained by adding the signal amounts A and C of the first and third pixels and halving, and a signal amount B of the second pixel Of the absolute value (| (A + C) / 2−B |) of the difference between the absolute value from the first arithmetic means and the constant value N are compared, and the absolute value is When the absolute value is larger than the constant value N, the absolute value from the first comparing means that outputs a positive signal and the absolute value from the second computing means are compared with each other, and the absolute value is the previous value. When the absolute value is larger than the constant value N, the absolute value from the second comparing means for outputting a positive signal and the absolute value from the third computing means are compared, and the absolute value is larger than the constant value N. At this time, a third comparing means for outputting a positive signal, a fourth calculating means for calculating a logical product of outputs from the first, second and third comparing means, and an output of the fourth calculating means The present invention is characterized by further comprising: a determining unit that horizontally generates past, present, and future signals, and outputs a defective signal when the past and future are negative and the present is positive.

(Second Configuration Example) Absolute value (| AB |) of the difference between the signal amount A of the first pixel and the signal amount B of the second pixel which are adjacent to each other in the horizontal direction from the solid-state image sensor. The first to calculate
And the absolute value (| B−C) of the difference between the signal amount B of the second pixel and the signal amount C of the third pixel adjacent to the second pixel in the horizontal direction from the solid-state image sensor. |) And a second calculation means for calculating the signal amount A of the first and third pixels.
And a C, and a value obtained by halving, and an absolute value (| (A + C) / 2−B |) of the difference between the signal amount B of the second pixel, First comparing means for comparing the absolute value from the first calculating means with a constant value N, and outputting a positive signal when the absolute value is larger than the constant value N; and the second calculating means. Comparing the absolute value from the means with the constant value N, and outputting a positive signal when the absolute value is larger than the constant value N; and the absolute value from the third computing means. A third comparing means for comparing a value with the constant value N and outputting a positive signal when the absolute value is larger than the constant value N; and logics of outputs from the first, second and third comparing means. Fourth computing means for computing the product and vertical, past, present and future signals are generated from the output of the fourth computing means, Future negative, the current is time positive, characterized by comprising a determination means for outputting a flaw there the signal.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION

[0022]

1 is a block diagram showing an embodiment of a solid-state image pickup device of the present invention. The optical image incident on the light receiving surface of the solid-state image sensor 1 is photoelectrically converted by the solid-state image sensor 1 and output as a video signal (OS signal) a.

The video signal a contains a flaw signal which differs for each solid-state image pickup device. First, the video signal a is the CDS
(Noise reduction circuit called correlated double sampling) /
It is input to the AGC (gain adjustment amplifier) 3. CDS
The output signal b of / AGC3 is output to the interpolation signal generation circuit 5 and the switch 9. The interpolation signal generation circuit 5 generates an interpolation signal c and outputs it to the switch 9.

The output signal b of the CDS / AGC 3 is also output to the arithmetic / comparison / determination circuit 7. The arithmetic / comparison / judgment circuit 7 operates as follows.

Letting A, B and C be the signal amounts of three pixels of the same color that are close to each other in the horizontal direction of the signal b, three absolute values | AB
First, |, | B−C |, and | (A + C) / 2−B | are calculated. Next, each calculation result is compared with a constant value N,
If all the comparison results are positive (each absolute value> N), it is determined that there is a possibility of scratches. If this determination result is a flaw, an image with a high frequency in the horizontal direction is interpolated, and the frequency characteristic deteriorates.

Therefore, the determination result is temporally shifted by using a delay line such as a shift register to generate past, present, and future signals, and a signal d with a flaw only if only the present is positive.
Is supplied to the control terminal of the switch 9.

The constant value N is a value proportional to the AGC voltage in the CDS / AGC 3. This is because in consideration of the fact that the noise of the signal b increases as the AGC voltage increases, scratches and noise are not mistaken.

The switch 9 selects the signal b while the flawless signal d is supplied, and selects the interpolation signal c when the flawed signal d is supplied.

The video signal e from the switch 9 is supplied to the luminance signal processing / contour enhancement circuit 13 and the color separation / color processing circuit 15. The video signal e is delayed by the 1H delay circuit 11. The delay signal f from the 1H delay circuit 11 is similarly supplied to the luminance signal processing / contour enhancement circuit 13 and the color separation / color processing circuit 15.

The luminance signal processing / luminance signal (Y signal) g from the contour emphasis circuit 13 and the color signal (C signal) h from the color separation / color processing circuit 15 are added by an adder 17 to obtain a composite video signal ( The video signal i) is supplied to the output terminal 23.

The timing signal generating circuit 19 is for color separation,
A synchronization pulse m is generated and supplied to the color separation / color processing circuit 15. Further, the drive pulse j is generated and supplied to the buffer 21. The drive pulse k from the buffer 21 is supplied to the solid-state image sensor 1.

FIG. 2 shows an embodiment of the calculation, comparison and determination circuit 7. The video signal including the scratch signal input from the input terminal 25 includes five flip-flops (FF) 27, 2.
It is input to the shift register composed of 9, 31, 33 and 35. In the case of a color solid-state image pickup device, since signals of the same color are generated every two pixels, the flip-flops 27, 31, 3,
The output of 5 is the same color component (where the signal amount of each pixel is
A, B and C).

The adder 37 adds the signal amount A and the signal amount C (A + C) and supplies it to the arithmetic circuit 39. The arithmetic circuit 39 is also supplied with pixels having a signal amount B from the flip-flop 31. The arithmetic circuit 39 uses | (A + C) /
The difference absolute value of 2-B | is calculated, and the result is output to the comparison circuit 47.

The pixel having the signal amount B from the flip-flop 31 and the pixel having the signal amount C from the flip-flop 35 are
It is supplied to the arithmetic circuit 41. The arithmetic circuit 41 has a | BC
The absolute difference value of | is calculated and the result is supplied to the comparison circuit 49.

The pixel having the signal amount A from the flip-flop 27 and the pixel having the signal amount B from the flip-flop 31 are
It is supplied to the arithmetic circuit 43. The arithmetic circuit 43 is | AB
The absolute difference of | is calculated and the result is supplied to the comparison circuit 51.

A constant value N is input to each of the comparison circuits 47, 49, 51 via the input terminal 45. Each comparison circuit 47, 49, 51 compares the absolute value with a constant value,
When absolute value> constant value N, a positive signal is output.

The outputs of the three comparison circuits 47, 49 and 51 are logically ANDed by the AND circuit 53, and the defect determination circuit 5
5 is supplied.

FIG. 3 shows a first example of the scratch determination circuit 55. The output of the AND circuit 53 from the input terminal 71 is sequentially supplied to the two flip-flops 73 and 75. The input of the flip-flop 73 corresponds to the future signal, the output of the flip-flop 73 corresponds to the present signal, and the output of the flip-flop 75 corresponds to the past signal.

The output of the AND circuit 53 is the inverter 79.
Is supplied to the AND circuit 81. The output of the flip-flop 73 is the AND circuit 8
1 is supplied. The output of the flip-flop 75 is supplied to the inverter 77, inverted here and supplied to the AND circuit 81.

The AND circuit 81 takes the logical product of the three input signals. Here, only when the past and future signals are negative and the present signal is positive, the AND circuit 81 outputs a flawed signal, and otherwise, a flawless signal to the control terminal of the switch 9 via the output terminal 83. Supply.

Returning to FIG. 2, the output pixel of the adder 37 is
It is supplied to the coefficient unit 57. The coefficient unit 57 calculates the signal amount (A +
C) is multiplied by a coefficient of 1/2 and output to the delay circuit 61.
The delay circuit 61 delays the pixel by one flip-flop 73, 75. The output pixel c of the delay circuit 61 is supplied to the switch 9 as an interpolation signal in this case. Further, the output pixel (B) of the flip-flop 31 is supplied to the delay circuit 59. Like the delay circuit 61, the delay circuit 59 delays the pixel by one flip-flop 73, 75. The output pixel of the delay circuit 59 is supplied to the switch 9 as a normal signal having no flaw in this case.

The switch 9 selects the output of the delay circuit 59 when the defect-free signal is supplied from the defect determination circuit 55, and the delay circuit 61 when the defect signal is supplied.
Select the output of The output signal of the switch 9 is a flawless video signal e, and is supplied to the luminance signal processing, contour enhancement circuit 13 and the like via the output terminal 63.

The coefficient unit 57 may be omitted, and the output pixel (A) of the flip-flop 27 or the output pixel (C) of the flip-flop 35 may be supplied to the delay circuit 61 and used as an interpolation signal.

FIG. 4 shows a second example of the scratch determination circuit 55. The difference from FIG. 3 is that 1H delay circuits 85 and 87 are used instead of the flip-flops 73 and 75, respectively. In this case, past, present and future signals are generated in the vertical direction. When the flaw determination circuit 55 is used, the delay circuits 59 and 61 are not necessary in FIG.

[0045]

As described above, according to the present invention,
It is possible to perform flaw correction with a simple and small-scale circuit without using a black-and-white or color solid-state imaging device, and it is possible to perform contour enhancement, color separation, etc. in the signal processing circuit after flaw correction.

[Brief description of drawings]

FIG. 1 shows a block diagram of an embodiment of a solid-state imaging device of the present invention.

2 is a block diagram showing an example of a calculation, comparison and determination circuit 7 of FIG.

FIG. 3 is a block diagram showing a first example of a defect determination circuit 55 of FIG.

FIG. 4 is a block diagram showing a second example of the defect determination circuit 55 of FIG.

FIG. 5 is an output waveform diagram of the solid-state imaging device.

FIG. 6 is a block diagram of a conventional solid-state imaging device.

FIG. 7 is a diagram showing a principle of correction by a conventional median filter.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Solid-state image sensor, 3 ... CDS (noise reduction circuit called correlated two-phase sampling / AGC (gain adjustment amplifier), 5 ... Interpolation signal generation circuit, 7 ... Computation, comparison, determination Circuit, 9 ... Switch, 11 ... 1
H delay circuit, 13 ... Luminance signal processing, contour enhancement circuit,
15 ... Color separation, color processing circuit, 17 ... Adder, 1
9 ... Timing signal generating circuit, 21 ... Buffer, 27, 29, 31, 33, 35 ... Flip-flop (FF), 37 ... Adder, 39 ... Arithmetic circuit, 41 ... -Arithmetic circuit, 43 ... Arithmetic circuit, 47,
49, 51 ... Comparison circuit, 53 ... AND circuit, 5
5: scratch determination circuit, 57: coefficient unit, 59, 61
... Delay circuit, 73, 75 ... Flip-flop (FF), 77, 79 ... Inverter, 81 ... A
ND circuit, 85, 87 ... 1H delay circuit.

Claims (6)

[Claims] 1. A first calculating absolute value (| A−B |) of a difference between a signal amount A of a first pixel and a signal amount B of a second pixel which are adjacent to each other in the horizontal direction from a solid-state image sensor. And the absolute value of the difference between the signal amount B of the second pixel and the signal amount C of the third pixel adjacent to the second pixel in the horizontal direction from the solid-state image sensor (| BC |) And a second calculation means for calculating the signal amounts A and C of the first and third pixels
Third calculating means for calculating an absolute value (| (A + C) / 2−B |) of the difference between the multiplied value and the signal amount B of the second pixel; and the third calculating means from the first calculating means. Comparing the absolute value with a constant value N, and outputting a positive signal when the absolute value is greater than the constant value N; and the absolute value from the second computing means and the constant value. The value N is compared, and when the absolute value is larger than the constant value N, a second comparing means for outputting a positive signal is compared with the absolute value from the third calculating means and the constant value N. A third comparing means for outputting a positive signal when the absolute value is larger than the constant value N, and a fourth calculating means for calculating a logical product of outputs from the first, second and third comparing means. And from the output of the fourth computing means in the horizontal direction past, present,
Generates a signal of the future, when the past and future are negative and the present is positive,
A solid-state image pickup device comprising: a determination unit that outputs a signal with a scratch. 2. A first value for calculating an absolute value (| AB |) of a difference between a signal amount A of a first pixel and a signal amount B of a second pixel which are adjacent to each other in the horizontal direction from a solid-state image sensor. And the absolute value of the difference between the signal amount B of the second pixel and the signal amount C of the third pixel adjacent to the second pixel in the horizontal direction from the solid-state image sensor (| BC |) And a second calculation means for calculating the signal amounts A and C of the first and third pixels
Third calculating means for calculating an absolute value (| (A + C) / 2−B |) of the difference between the multiplied value and the signal amount B of the second pixel; and the third calculating means from the first calculating means. Comparing the absolute value with a constant value N, and outputting a positive signal when the absolute value is greater than the constant value N; and the absolute value from the second computing means and the constant value. The value N is compared, and when the absolute value is larger than the constant value N, a second comparing means for outputting a positive signal is compared with the absolute value from the third calculating means and the constant value N. A third comparing means for outputting a positive signal when the absolute value is larger than the constant value N, and a fourth calculating means for calculating a logical product of outputs from the first, second and third comparing means. And from the output of the fourth computing means in the vertical direction past, present,
Generates a signal of the future, when the past and future are negative and the present is positive,
A solid-state image pickup device comprising: a determination unit that outputs a signal with a scratch. 3. When the solid-state image sensor has a color filter, the signal amounts A, B, C of the first, second, and third pixels.
Is the signal amount of three pixels of the same color that are adjacent in the horizontal direction. 4. The signal amount B of the second pixel is input to a first input terminal, and the average value ((A + C) / 2 of the signal amounts of the first and third pixels is input to the second input terminal. ) Is input and the determination means outputs a signal with a flaw, the second input terminal is selected, and the switch means for selecting the first input terminal other than that is provided. 1 to 3
The solid-state imaging device according to any one of the above. 5. A signal amount B of the second pixel is input to a first input terminal, and a signal amount A of the first pixel or a third signal amount C is input to a second input terminal, 4. The switch means for selecting the second input terminal when the judging means outputs a signal with scratches, and for selecting the first input terminal other than that, the switch means is provided. The solid-state imaging device according to. 6. The solid-state image pickup device according to claim 1, wherein the constant value N is a value proportional to an AGC voltage.