JPH09247354A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To speedily operate series of the operation of a solid state image pickup element line sensor without the influence of the operation of an electronic shutter to a picture signal by executing the operation of the electronic shutter in the resetting period of an image pickup signal in the middle of the transfer of an electric charge. SOLUTION: A shutter pulse ϕSHUT generated at a central controller 12 is supplied to the terminal D of a D-type FF circuit 14 and a reset pulse ϕRS from a timing generator 13 is supplied to the clock terminal C of the circuit 14. ϕSHUT obtained at the terminal Q of the circuit 14 is supplies ϕSHUT synchronized with the rising of ϕRS, namely synchronized with the rising of the resetting period of the image pickup signal obtained at the output side of a CCD line sensor 11 for the sensor 11. In this case, even when the image pickup signal is fluctuated, this fluctuation is equal in a field through period and a signal period. An image pickup signal obtained at the output side of the sensor 11 is supplied for a correlated double sampling circuit 15 for double sampling so as to remove the fluctuation of the image pickup signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus using a solid-state image pickup element line sensor suitable for use in an image reading apparatus.

[0002]

2. Description of the Related Art Conventionally, as an image pickup device of an image reading device, a CCD having an electronic shutter function as shown in FIG.
Line sensors have been proposed.

In FIG. 4, reference numeral 1 denotes a sensor portion in which, for example, 2700 sensors are arranged in a line in the longitudinal direction,
Reference numeral 2 denotes a shift register formed of a CCD formed corresponding to the sensor unit 1, and reference numeral 3 denotes a diffusion amplifier provided at the output end of the shift register 2.

A read-out gate 4 is provided between the sensor unit 1 and the shift register 2, and a shutter drain 5 is provided on the opposite side of the sensor unit 1 from the shift register 2, and the sensor unit 1 and the shutter drain 5 are provided. A shutter gate 6 is provided between them.

In the CCD line sensor as shown in FIG. 4, the lead-out gate pulse φROG as shown in FIG.
Signal charges are read out to the shift register 2, and shift pulses φ1 and φ2 as shown in FIGS. 5B and 5C are supplied to the shift register 2 to transfer these signal charges to the output side.

Further, a reset pulse φRS as shown in FIG. 5D is supplied to the diffusion amplifier 3 provided at the output end of the shift register 2, and the reset pulse φRS is supplied.
Each time, the diffusion amplifier 3 is reset.

Further, a shutter pulse φSHUT as shown in FIG. 5E is supplied to the shutter gate 6, and when the shutter pulse φSHUT is at the high level “1”, the shutter gate 6 is turned on to discharge the electric charge of the sensor section 1 to the shutter drain. This shutter pulse φSHUT
Is low level "0", electric charges are accumulated in the sensor unit 1 and are used as signal charges.

On the output side of the diffusion amplifier 3 at the output end of the shift register 2 which is the output end of such a CCD line sensor, as shown in FIG. 5G, a reset period 7a, a reference level field through period 7b and a signal period 7c.
An image pickup signal 7 is obtained in which a signal consisting of is repeated in a predetermined cycle.

[0009]

In the CCD line sensor as shown in FIG. 4, the shutter pulse φSH
When the UT is changed from the high level “1” to the low level “0”, the power supply and the ground potential supplied to this CCD line sensor fluctuate although they are weak. Pulse φSHUT
Was not set to the low level "0" from the high level "1" to set the sensor unit 1 as the accumulation time.

Therefore, as shown in FIGS. 5E and 5F, the charge transfer time of the shift register 2, for example, 2 of the shift pulse φ1 is conventionally required for the CCD line sensor to perform a series of operations.
700 count period and electronic shutter time, that is, signal charge storage time, for example, 1350 to 2700 of shift pulse φ1
There is a disadvantage in that a time longer than the sum of the count time is required and this series of operation time is relatively long.

In view of this point, the present invention has an object to enable a series of operations of the solid-state image pickup device line sensor such as the CCD line sensor to operate at high speed without the electronic shutter operation affecting the image signal. To do.

[0012]

An image pickup device of the present invention includes a solid-state image pickup element line sensor capable of obtaining an image pickup signal in which a signal consisting of a reset period, a field through period which is a reference level, and a signal period is repeated at a predetermined cycle. In an image pickup device having a correlated double sampling circuit to which an image pickup signal from the solid-state image pickup device line sensor is supplied, an electronic shutter operation is performed in synchronization with a reset period of the image pickup signal during charge transfer of the solid-state image pickup device line sensor. It's something that you do.

In the present invention, since the electronic shutter operation is performed during the charge transfer of the solid-state image sensor line sensor, a series of operating time of the solid-state image sensor line sensor can be shortened and speeded up.

Further, according to the present invention, since the electronic shutter operation is synchronized with the reset period of the image pickup signal, even if the signal charge during charge transfer changes due to the electronic shutter operation, the field through of the image pickup signal is performed. The period and the signal period have similar variations, and the correlated double sampling is performed thereafter to remove these variations, so that a good image signal that is not affected by the electronic shutter operation can be output.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the image pickup apparatus of the present invention will be described below with reference to the drawings. In FIG. 1, 11
Shows a CCD line sensor as shown in FIG. Also, 1
Reference numeral 2 denotes a central control unit for controlling the image pickup apparatus according to this example, and a start pulse from the central control unit 12 is supplied to the timing generator 13.

The timing generator 13 is synchronized with the start pulse from the central controller 12 in FIG. 5A,
Lead-out gate pulse φ as shown in B, C and D
ROG, shift pulse φ1, φ2 and reset pulse φ
RS is generated, and the readout gate pulse φROG and shift pulse φ generated by the timing generator 13 are generated.
1, φ2 and reset pulse φRS are supplied to the CCD line sensor 11.

On the output side of the CCD line sensor 11, as shown in FIG. 5G, a reset period 7a by a reset pulse φRS and a field through period 7 which is a reference level.
An image pickup signal 7 in which a signal including b and the signal period 7c is repeated in a predetermined cycle is obtained.

In the present embodiment, the central control unit 12 shifts the signal charge to the shutter drain 5 during the transfer time T of the signal charge in the shift register 2 and changes the charge storage time from that when the charge is discarded, that is, an electronic shutter operation is performed. Pulse φ
The SHUT is generated, and the shutter pulse φSHUT generated by the central controller 12 is supplied to the D-type flip-flop circuit 1
Timing generator 13
The reset pulse φRS is supplied to the clock terminal C of the D-type flip-flop circuit 14.

As shown in FIG. 2D obtained at the Q terminal of the D-type flip-flop circuit 14, it is synchronized with the rise of the reset pulse φRS as shown in FIG. 2B, that is, at the output side of the CCD line sensor 11 as shown in FIG. 2C. The shutter pulse φSHUT synchronized with the rising edge of the reset period 7a of the obtained image pickup signal 7 is supplied to the CCD line sensor 11.

In this case, since the shutter pulse φSHUT changes in synchronization with the reset period 7a of the image pickup signal 7, even if the image pickup signal 7 changes by ΔV, this change ΔV is a reference level field. Through period 7b
Also, the signal period 7c changes in the same manner.

The image pickup signal 7 as shown in FIG. 2C obtained at the output side of the CCD line sensor 11 is supplied to the correlated double sampling circuit 15. That is, the output terminal of the CCD line sensor 11 is turned on during the field-through period 7b which is the reference level of the image pickup signal 7 forming the correlated double sampling circuit 15 and is turned on during the signal period 7c of the image pickup signal 7. And the inverting input terminal of the operational amplifier circuit 15c via the sampling switch 15b.
Connect to

The connection point of the connection switch 15a and the sampling switch 15b is grounded via the reference voltage holding capacitor C ₁ and the inverting input terminal-of the operational amplifier circuit 15c is grounded via the reference voltage holding capacitor C _2. To do.

The output terminal of the CCD line sensor 11 is
Of the imaging signal 7 forming the correlated double sampling circuit 15
In conjunction with the sampling switch 15b during the signal period 7c
Increase the number of operations via the sampling switch 15d that is turned on.
This is connected to the non-inverting input terminal + of the width circuit 15c and
The non-inverting input terminal + is connected to the signal voltage holding capacitor C _Three
To ground.

In this example, the timing generator 1
The shift pulse φ as shown in FIG.
1 is supplied to the delay circuit 15e to form a switch signal for turning on the connection switch 15a during the field-through period 7b of the image pickup signal 7, and the shift pulse φ1 is supplied to the delay circuit 15f to supply the sampling switch 15b. And 15d are formed during the signal period 7c of the imaging signal 7 to form a switch signal.

At the output side of the correlated double sampling circuit 15, that is, the output side of the operational amplifier circuit 15c, as shown in FIG. 2E, the level of the field through period 7b which is the reference level of the image pickup signal 7 and the level of the signal period 7c. A discrete signal is obtained in which the differential sampling and holding voltages are sequentially obtained.

This correlated double sampling and holding circuit 1
5 is supplied to an analog-digital conversion circuit 16 having a resolution of, for example, 10 bits for converting an analog signal into a digital signal from the discrete signal obtained at the output side.

The output signal of the analog-digital conversion circuit 16 is supplied to the digital image signal output signal 19 via the black correction circuit 17 and the white correction circuit 18.

The black correction circuit 17 corrects the variation in the output level of the sensor unit 1 of the CCD line sensor 11 in the dark, and outputs the data of the output level when the shutter gate 6 is turned on to the central control unit 12. The black correction is performed by digitally subtracting the black level data stored in the memory from the read signal level data stored in the provided memory.

The white correction circuit 18 corrects shading of the light source (unevenness of light amount) and sensitivity variations of the sensor unit 1 of the CCD line sensor 11, and data provided by previously measuring the white reference plate is provided in the central controller 12. The data of the read signal level is digitally divided by the data of the white level stored in this memory to be corrected.

In this example, as described above, the CCD line sensor 1
The shift register 2 of No. 1 is configured to perform the electronic shutter operation (the operation of switching from the time of discarding the charge to the charge storage time) as shown in FIGS. 2D and 3B during the charge transfer time T as shown in FIG. 3C. Therefore, a series of operating time of the CCD line sensor 11, that is, the cycle of the lead-out gate pulse φROG as shown in FIG. 3A can be shortened to, for example, about 2700 count time + 100 count time of the shift pulse φ1. Can be speeded up.

Further, according to this example, since the electronic shutter operation is synchronized with the reset period 7a of the image pickup signal 7, even if the signal charge during charge transfer varies due to the electronic shutter operation, the image pickup signal 7 is generated. There is a similar variation ΔV in the field through period 7b and the signal period 7c, and by performing correlated double sampling thereafter, this variation ΔV
Since V is removed, there is an advantage that a good image signal that is not affected by the electronic shutter operation can be output.

Further, in this example, since the black correction circuit 17 and the white correction circuit 18 perform the black correction and the white correction after that, there is an advantage that a better image signal can be obtained.

In the above embodiment, an example using a CCD line sensor has been described, but it goes without saying that another solid-state image pickup device line sensor may be used instead.

Further, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

[0035]

According to the present invention, there is an advantage that a series of operations of a solid-state image pickup element line sensor such as a CCD line sensor can be operated at high speed and an image signal without adverse effects of the electronic shutter operation can be obtained.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of an image pickup apparatus of the present invention.

FIG. 2 is a diagram for explaining FIG. 1;

FIG. 3 is a diagram for explaining FIG. 1;

FIG. 4 is a plan view showing an example of a CCD line sensor.

FIG. 5 is a diagram for explaining FIG. 4;

[Explanation of symbols]

1 sensor part, 2 shift register, 3 diffusion amplifier, 4 lead-out gate, 5 shutter drain, 6 shutter gate, 7 imaging signal, 7a reset period, 7b field through period, 7c signal period, 11 CCD line sensor, 12 central control Device, 13 timing generator, 14D flip-flop circuit, 15 correlated double sampling circuit, 16
Analog-digital conversion circuit, 17 Black correction circuit, 18
White correction circuit, 19 Digital image signal output terminal, φR
OG Readout gate pulse, φRS reset pulse, φSHUT shutter pulse, T charge transfer time

Claims (2)

[Claims] 1. A solid-state image sensor line sensor that obtains an image-capturing signal in which a signal consisting of a reset period, a field-through period that is a reference level, and a signal period is repeated in a predetermined cycle; An image pickup apparatus having a correlated double sampling circuit supplied, wherein an electronic shutter operation is performed in synchronization with a reset period of the image pickup signal during charge transfer of the solid-state image pickup element line sensor. apparatus. 2. The image pickup device according to claim 1, wherein a white correction circuit and a black correction circuit are provided on the output side of the correlated double sampling circuit.