JPH09247127A - Error correcting virtual reception buffer device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an error correcting virtual reception buffet device by which the flow of continuous normal data is received when a data error state occurs during transmission and, at the same time, the correction of a data symbol which becomes invalid is given so as to unnecessitate data retransmission. SOLUTION: The length comparator 21 of a buffer controller compares a count value held in a buffer counter 24 with the whole memory space of a buffer and monitors the overflow of a decoding device. When the counter number of the buffer counter 24 is equal to the memory space of the buffer or larger, a buffer usage impossible signal 26 is issued and the overflow operation of the decoding device is started. Thus, data pre-existing in the buffer is evaded to be improperly masked so that the decoder executes error correction in order to recover lost data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a data receiving buffer (buffer). The present invention is particularly directed to a buffer for receiving incoming information and correcting data errors without interrupting the normal receiving operation of the incoming data stream.

[0002]

BACKGROUND OF THE INVENTION Codec (coder-decoder) devices are widely used in various devices for the transmission of both text (document) and graphic (graphic) information. For example, a conventional modem (modulator-demodulator) device encodes data to be transmitted to a remote receiver before being put on a communication network. Based on a predetermined transmission protocol, the receiving modem device decodes the received data stream and reconstructs it into the first encoded and transmitted information. Therefore, a copy of the initial information is duplicated on the receiving side, and a format that exactly matches the initial information is obtained.

In data storage and retrieval techniques using mass storage devices such as CD-ROMs and hard disk drives, data is often stored in an encoded format to increase storage space efficiency and / or security. I was The data stored in such devices is typically encoded according to some form of error correction coding scheme to ensure correction of the received data, and that data is also often encrypted for security. Such data read from storage requires preliminary decoding before it is actually used. Codecs play an important role in data encoding and decoding procedures, which usually involve the transmission of information.

FIG. 1 (Prior Art) is a block diagram of a conventional data receiving and decoding apparatus. The incoming data stream is connected to the input of a receive buffer 10 containing an array of registers or memory elements. Due to different status conditions of the communication network, data flows into the receive buffer 10 at different moments. The decoder 11 may decode the data at a lower speed than the speed at which the data flows into the reception buffer 10. Therefore, the reception buffer 10 may sometimes accumulate the data and hold the accumulated data. The data output unit 12 is a decoder 11
Is connected to the output of the decoder 11 for outputting the data received from it. The buffer controller 20 controls the reception buffer 10.

[0005] The decoder 11 is an engine that executes decoding of encoded data received from the reception buffer 10. The decoding capability of the decoder 11 is closely related to the maximum speed at which the entire data receiving and decoding device operates. The larger the decoding capacity of the decoder 11, the higher the throughput (processing capacity) of the apparatus. However, the associated hardware becomes more complex.

The data output unit 12 transmits the decrypted data to an external device that needs the decrypted data.
The output unit in the prior art decoder device normally relays the received and decoded data quickly without delay. Therefore, the data output speed of the conventional output unit is not fixed. However, in some devices, the output of the decoded data must be maintained at a fixed rate relative to that negotiated by the protocol. For example, the speed of outputting decoded data for CDDA is fixed at 176.4 bytes / sec.

The buffer controller 20 controls the operation of the reception buffer 10. For example, the buffer controller 20 monitors and controls the state of overflow of data storage in the reception buffer 10. As an example, when there is a data overflow, the buffer controller 20
An input rate control signal 13 may be issued to the data source (not shown) requesting that the data source reduce the rate at which data is sent to the receive buffer 10. Reference numeral 15 represents a speed control signal issued to the buffer controller 20 by the decoder 11.

[0008]

Generally, a decoder device that performs decoding of received encoded data is closely coupled to a buffer that receives incoming data. Whenever the input speed of the data is greater than the decoding speed of the decoder,
Buffer data overflow occurs. When a buffer data overflow condition exists, the only solution used in prior art data receiving and decoding devices is to require retransmission of data lost during the overflow. The consequences of not taking action in response to a data overflow condition are not only the loss of overflowed data, but also the entire flow of data within the transmission block is shifted (shifted) out of format and the length of data is increased. The interval will be misinterpreted.
The length of the lost data depends on the design of the decoder device. On the other hand, if retransmission (retransmission) of invalid data is required, the result is that the entire time for data transmission is extended.

For example, FIG. 3A shows a representative data format of decoded data under normal transmission conditions. FIG. 3B shows data that is similar to FIG. 3A but becomes invalid in an overflow state as a result of not taking proper care to recover lost data. In the data transmission flow of FIG. 3A, the device generates one synchronization signal for every n data symbols. The synchronization signal signals the start of a new block of data to be transmitted.

Under normal conditions, the format of the data transmission stream is as shown in FIG. 3A. However, for example, if an overflow condition occurs in the fourth data symbol during data transmission, the fourth data symbol is completely lost and is not written in the decoded data reception buffer. Therefore, the fifth data symbol is shifted (shifted) to a position where it should have been occupied by the fourth data symbol.
As a result, it is interpreted as the fourth data symbol. Similarly, the sixth data symbol is incorrectly processed as the fifth data symbol, and the nth data symbol is (n
-1) It is incorrectly processed as the data symbol. This is a serious situation in which all subsequent data symbols, including the fourth data symbol, are all incorrectly interpreted based on the rules of the data format. This goes well beyond the capabilities of typical error correction devices in decoder devices, and all data blocks must be retransmitted.

Accordingly, it is a primary object of the present invention to provide an error correction virtual receive buffer apparatus which allows continuous normal data flow reception even if a data error condition occurs during the transmission procedure. It is in.

Another object of the present invention is to enable the reception of a continuous normal data stream when a data error condition occurs during transmission while at the same time providing a correction for invalidated data symbols to provide for the correction of invalid data symbols. An object of the present invention is to provide an error correction virtual reception buffer device that eliminates the need for retransmission.

[0013]

In order to achieve the above-mentioned object, the present invention provides an error correction virtual reception buffer device comprising a buffer, a decoder, and a buffer controller. The buffer is connected to the decoder so as to temporarily hold the encoded data coming from the external data source, and then output the temporarily held encoded data to the decoder for decoding. The buffer controller has a counter for keeping a count of the data symbols of the encoded data lost during the data overflow situation.
The buffer controller issues a buffer hold control signal to the buffer to hold subsequent data symbols of the incoming coded data to prevent further data storage in the buffer's memory array. The counter keeps track of the number of data symbols lost during the data overflow, and the decoder corrects the error to recover the lost data symbols.

To achieve the above object, the present invention provides
An error correction virtual reception buffer device wherein the buffer controller further comprises an overflow detector. The buffer controller's counter that keeps a count of the number of encoded data symbols lost during data overflow has a data in-counter and a data out-counter. The data in-counter adds one to the retained count when one data symbol from an external data source is accepted into the buffer for temporary storage, and the data out-counter Also, when one data symbol held in the buffer is sent to the downstream decoder, one is subtracted from the held count number. The overflow detector compares the counts held in each of the data in-counter and the data out-counter to determine the overflow state of the buffer and the extent of the overflow.

[0015]

FIG. 1 is a block diagram of a typical data receiving and decoding apparatus. When this device is used as the error correction virtual reception buffer device of the preferred embodiment of the present invention, the buffer controller 20 becomes as shown in FIG.

The buffer controller of FIG. 2 includes a counter that counts data symbols lost during data overflow. Under the control of the buffer controller 20, the physical buffer space of the data receiving and decoding device, consisting of an array of registers or memories, is full and, whenever encoded data continues to come in, buffering is impaired, Only a record of the number of data symbols entered is kept. The physical content of data symbols lost as a result of a buffer full condition is not actually recorded. This allows for accurate tracking of the currently received data format.

For example, assume that there is a data overflow condition that causes the loss of three consecutive data symbols (not recorded in the buffer) due to the full memory space of the buffer. In that case, before the arrival of the first data symbol after the three lost data symbols, the overflow condition of the buffer is restored and the buffer can resume normal reception of the incoming coded data stream again.

Although the decoding device did not successfully receive the correct data content of the three lost data symbols, the decoding device has a record that three data symbols were lost during the transmission of the current data block, and the decoding device has , And which three data symbols are particular three data symbols. The decoder has the opportunity to take advantage of the error correction capabilities of the decoder logic to recover the contents of the three missing data symbols at the appropriate time thereafter. This allows
The decoding device can avoid a situation that generates a series of invalid data, and can continue the data reception process even if the reception of a few data symbols fails. This also avoids the need for time-consuming retransmission of the entire data block. All of this is achieved in the error correction virtual receive buffer apparatus of the present invention without significantly complicating the hardware logic.

During the transmission of the encoded data, the input encoded data symbols are continuously recorded in the encoded data receiving buffer 10. Buffer 10 includes a physical memory stack (see FIG. 1) and a virtual memory stack (see FIG. 1). Under normal circumstances, the buffer 10 is programmed to successively receive incoming data symbols and then store them in the physical memory stack 101. Similarly, the buffer 10 subsequently sends the stored data symbols in the same order to a decoder 11 connected downstream of the data stream. However, the physical memory stack 101 of the buffer 10
If any data overflow situation occurs in
A buffer controller 20 as shown in FIG. 1 controls the flow of incoming coded data symbols and maintains the correct flow. This is accomplished by the buffer controller 20 by instructing the virtual memory stack 102 to count the number of lost data that failed to be recorded on the physical memory stack 101 as a result of a data overflow situation.

FIG. 2 is a block diagram of the buffer controller. The buffer controller 20 includes an in-counter 23 for encoded data, an out-counter 25 for data,
It comprises a buffer counter 24 and a data length comparator 21. During decoding, each block of encoded data received from an external source [data temporarily stored in buffer 10 (FIG. 1) and output from buffer 10 to decoder 11 (FIG. 1) for subsequent decoding] Is monitored by an encoded data in-counter 23 and a data out-counter 25 to maintain strict control of the number of data symbols.

That is, whenever a data symbol is about to be stored in the buffer 10, the external logic circuit issues a data write signal 14, so that the in-counter 23 and the buffer counter 24 Add 1 to the number. On the other hand, the count number held by the in-counter 23 is relayed to the address generator of the decoding device via the bus 27 and indicates the address of the received data symbol held in the buffer 10.

Similarly, whenever a data symbol is about to be fetched from buffer 10 for the next operation, the external logic issues a data read signal 15 so that out-counter 25 holds it. Add 1 to the current count. The count held by the out-counter 25 is similarly relayed over the bus 28 to the address generator of the decoder and indicates the address of the data symbol to be retrieved from the buffer 10.

However, the data symbol is
When fetched from (which can be known by issuing the data read signal 15), unlike the case of storing data in the buffer, the buffer counter 24 subtracts 1 from the number of counts it holds instead of adding. . In this way, the count maintained by buffer counter 24 is incremented by one when one data symbol is stored therein and decremented by one when one data symbol is retrieved therefrom. It is. In other words, the count held in the buffer counter 24 can be used to represent the total number of data symbols held in the buffer 10 of the decoding device.

Therefore, if the initial count of buffer counter 24 is preset to the number of all memory locations for data symbols held in buffer 10, the count held by buffer counter 24 will be When there is less than the total number of storage spaces, there is room to store data symbols that continuously arrive at the decoder from an external source. On the other hand, buffer counter 2
If the count held by 4 is equal to or greater than the total number of storage spaces in buffer 10, there is no room in buffer 10 to store the incoming data symbol and a data overflow condition occurs. .

Length comparator 2 of buffer controller 20
1 can be used to monitor the overflow status of the decoding device by constantly comparing the cant value held in the buffer counter with the total storage space of the buffer 10. Whenever the counter number of the buffer counter 24 is equal to or greater than the storage space of the buffer 10, a buffer disable (unusable) signal 26 is issued by the length comparator 21 to start the overflow operation of the decoding device. This prevents subsequent input of external data symbols, avoiding the situation of improperly masking data symbols already in the buffer 10.

Basically, in the apparatus of the present invention, the length comparator 21 determines that a data overflow condition has occurred in the buffer.
Whenever determined, the buffer 10 is controlled to temporarily suspend the reception of incoming coded data symbols to the physical memory stack 101 by receiving the buffer disable signal 26. On the other hand, if the encoded data receiving and decoding device is equipped with the ability to control the external data arrival speed, the input speed control signal 13
To the external data source to request adjustment of the data arrival rate based on the degree of data overflow detected by the length comparator 21 in the buffer controller 20. Normally, when a data overflow situation is detected, the external data source is typically commanded to reduce the data transmission rate, allowing the encoded data receiving and decoding device to keep up with the flow of the data decoding procedure. . This also prevents a serious situation where the number of lost data symbols exceeds the capability of error correction.
If such a situation occurs, retransmission of the invalidated data block is essential. On the other hand, whenever the data overflow is released and the data reception procedure returns to normal again, the data transmission rate of the external data source is adjusted to be higher via the input rate control signal 13 issuing the appropriate command. As a result, the throughput of the device can be increased to its maximum possible speed.

As described above, in the error correction virtual reception buffer device of the present invention, the coded data reception and decoding device as a whole receives and decodes incoming data without interruption whenever any data overflow condition occurs. Can be processed continuously. On the other hand, if an overflow condition occurs, the decoding device simultaneously keeps a record of the lost data symbol and continues to take advantage of its built-in error correction capabilities to allow the lost data Correct the symbol. The apparatus of the present invention preserves the format of the corrected data stream by virtually counting lost data in the buffer's virtual memory stack. Thus, even if some of the data symbols along the transmitted data stream were not actually received under the circumstances of the data overflow, the decoding device would still be in a severe situation, such as a burst data error. Unless otherwise, there is no need to request data retransmission.

For example, FIG. 3C illustrates a case where a data overflow condition is encountered during a transmission procedure, and the apparatus of the preferred embodiment of the present invention is used to correctly undertake the entire procedure of receiving data blocks. 3 shows an array of data in the flow of FIG. As shown in the drawing, the fourth data symbol was not successfully received in the buffer due to the overflow condition, but the lost fourth and subsequent consecutive data symbols were correctly received without interruption. is there. Thus, the entire data block format is correctly retained and the lost fourth data symbol is subsequently recovered using the error correction capabilities of the decoding device.

[0029]

As described above, according to the present invention,
An error-correcting virtual receive buffer device is provided that allows continuous normal data flow reception even if a data error condition occurs during the transmission procedure.

Also, when a data error condition occurs during transmission, a continuous normal data flow can be received, and at the same time, invalidated data symbols are corrected to eliminate the need for data retransmission. An error correction virtual reception buffer device is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of a conventional data receiving and decoding device.

FIG. 2 is a block diagram of a buffer controller of the error correction virtual reception buffer device according to the preferred embodiment of the present invention.

FIG. 3A schematically shows the format of the data flow under normal data transmission conditions, and FIG. 3B shows the format of FIG. 3 corrupted by data overflow during transmission.
FIG. 3A schematically shows the flow of data in the format shown in FIG.
FIG. 3B schematically illustrates the data flow of FIG. 3A when properly maintaining the entire data receiving procedure using the apparatus of the preferred embodiment of the present invention when a data overflow is encountered during the transmission procedure.

[Explanation of symbols]

 Reference Signs List 10 buffer 11 decoder 12 output unit 13 input speed control signal 14 data write 15 data read 20 buffer controller 101 physical memory 102 virtual memory 23 data in-counter 24 buffer counter 25 data out-counter 21 length comparator 26 buffer Disable signal

Claims (5)

[Claims] 1. An error correcting virtual receive buffer device having a buffer, a decoder, and a buffer controller, wherein the buffer temporarily holds encoded data coming from an external data source, and then temporarily stores the encoded data. An error correction virtual reception buffer device connected to the decoder so as to output the coded data held in the buffer to the decoder for decoding, wherein the buffer controller is configured to output the data in the buffer in an overflow state. Having counting means for holding a count number of data symbols of the lost encoded data,
The buffer controller issues a buffer pending control signal to the buffer to suspend storing of subsequent data symbols of the incoming encoded data in a memory array of the buffer, and the counting means includes an overflow of the data. An error-corrected virtual receive buffer apparatus, comprising: maintaining a record of the number of said data symbols lost during a state; and wherein said decoder performs error correction to recover said lost data symbols. 2. The buffer device according to claim 1, wherein
The buffer controller further includes a length comparator, wherein the counting means of the buffer controller includes a data in-counter, a data out-counter,
A buffer counter, wherein the data in-counter adds one to the held count, and the buffer counter indicates when a data symbol from the external data source is received in the buffer for temporary storage. Add one to the held count, the data out-counter adds one to the held count, and the buffer counter holds the data symbol held in the buffer when it is sent to the decoder for decoding. The length comparator subtracts one from the counted number, and the length comparator compares the counted numbers held in the data in-counter and the data out-counter, respectively, to determine the overflow state of the buffer and the degree of overflow. A buffer device characterized by the above-mentioned. 3. The buffer device according to claim 2, wherein
When the length comparator detects an overflow condition in the buffer, the length comparator communicates with the external data source to reduce a speed at which the data source transmits encoded data to the buffer. A buffer device comprising means for issuing an input speed control signal. 4. The buffer device according to claim 3, wherein
The length comparator includes means for issuing a request signal to the external data source requesting retransmission of encoded data when the data symbol lost during the overflow condition cannot be recovered. Buffer device. 5. The buffer device according to claim 4, wherein
A buffer for issuing to the external data source a request signal requesting an increased data transmission rate to increase the apparatus throughput of receiving and decoding the encoded data to a maximum possible value. apparatus.