JPH09246220A - Silicon wafer and processing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a silicon wafer having an extremely high flatness and allowing easy distinction between front side and rear side by difference in luster by making a site flatness of the front side to be within of a specific range and a difference between the maximum value and the minimum value of a height of the wafer front side at the time of being adsorbed and fixed to be within a specific range. SOLUTION: In a single-sided mirror-processed silicon wafer with a mirrored front side and a non-mirrored rear side, a site flatness to be expressed by local site flatness of the front side is 0.01 to 0.1μm (not less than PUA 95%). Further, a difference (TTV) between the maximum value and the minimum value of a height of the wafer front side when the silicon wafer is adsorbed and fixed is made to be inside of 1.0μm. For instance, one side of the silicon wafer 10 with mirror-processed both surfaces is covered by a base plate 11 allowing intimate contact with the one side followed by chemical etching another side of the wafer 10 so as to fog only the rear side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single-sided mirror-polished silicon wafer having extremely high flatness and a processing method thereof. More specifically, the present invention relates to a silicon wafer suitable for a device having a memory having a high storage capacity of 256M DRAM or more and a processing method thereof.

[0002]

2. Description of the Related Art Generally, the surface processing shape and accuracy required for a silicon wafer are regulated by the minimum line width (design rule) of a circuit pattern corresponding to the degree of integration of a device. The required flatness also depends on the exposure apparatus used in the lithographic process during device manufacturing. Therefore, it is necessary to achieve flatness equal to or less than the design rule in the area corresponding to the exposed area. In order to obtain this desired flatness, conventionally, a wafer cut from a silicon single crystal ingot is mechanically polished, and after chemically polishing the polished wafer, only one side of the wafer is mechanically and chemically polished. The method of mirror finishing is adopted. In this single-sided polishing method, several silicon wafers are attached to a polishing block with wax or the like, and the artificial leather (polishing cloth) having the blocks adhered to a rotary table is applied with an appropriate pressure to obtain a pH of 9 based on SiO _2. It is a method of polishing only one side of a wafer while supplying an alkaline colloidal silica polishing liquid of about 12 to 12.

However, in this method, due to the pressure applied to the wafer attached to the polishing block during single-side polishing, fine irregularities on the surface of the polishing block are transferred to the back surface of the wafer, and when the wafer is removed from the polishing block after polishing, the wafer back surface is removed. The shape of is transferred to the polished surface of the wafer surface. Alternatively, the back surface roughness of the wafer caused by the chemical etching process adversely affects the polished surface after polishing. For this reason, in a wafer that has been mirror-finished on one side, TTV (total thickness variation), which represents the difference between the maximum value and the minimum value of the wafer surface height when the wafer is flattened by suction, has a relatively good value. As shown, the local-site flatness (local-site flatn)
ess) had a problem that was not so good. Further, the single-sided polished wafer has an inevitable defect that a relatively large warp is generated by the heat treatment, and the troublesomeness of cleaning the back surface of the wafer contaminated with the adhesive wax. Since a mirror-finished silicon wafer has a high flatness, it is mainly used directly as a substrate for various ICs such as VLSI or as a substrate for an epitaxial wafer. In recent years, the demand for quality, especially flatness, of silicon wafers has become more severe in response to higher integration and higher density of devices. In order to meet this requirement, a double-sided simultaneous polishing method has been proposed instead of the single-sided polishing method. This method uses a top plate and a bottom plate which rotate the front and back surfaces of the silicon wafer in opposite directions through a polishing cloth while loading and maintaining the silicon wafer in a wafer receiving hole of a carrier plate which is slightly thinner than its finished thickness. It is a method of mechanically and chemically polishing. In this method, the wafer is not adhered to any surface plate, and the contact positions of the upper and lower surface plates are constantly changed with respect to the wafer during polishing, so that the above-mentioned problems of the single-sided polishing method can be solved.

[0004]

In other words, as described above, a silicon wafer having a site flatness or a desired flatness with respect to TTV can be stably obtained with a double-sided mirror-finished product by the double-sided simultaneous polishing method. However, it has been difficult to stably obtain the conventional single-sided mirror-finished product. On the other hand, a double-sided mirror-finished product has the same mirror surface on both sides of the wafer and has the same gloss, so it is difficult to distinguish between the front and back of the wafer. It was difficult to recognize the wafer because the sensor that was set up caused an error in the normal setting. An object of the present invention is to provide a silicon wafer having extremely high flatness and capable of easily distinguishing between front and back sides due to difference in glossiness, and a processing method thereof. Another object of the present invention is to provide a silicon wafer that does not have the trouble of removing the adhesive during polishing and has a small warp, and a method for processing the same.

[0005]

The invention according to claim 1 is
In a single-sided mirror-finished silicon wafer in which the front surface of the silicon wafer is a mirror surface and the back surface of the silicon wafer is a non-mirror surface, the site flatness represented by the local site flatness of the surface of the silicon wafer is 0.0.
1 to 0.1 μm (PUA 95% or more) and a difference (TTV) between the maximum value and the minimum value of the wafer surface height when the silicon wafer is adsorbed and fixed is within 1.0 μm. It is a silicon wafer.

Here, PUA is an abbreviation for Percent Usable Area and means a percentage of an area satisfying a specified level.
Specifically, this site flatness is measured by a thickness measuring device having a capacitance type sensor, and is measured by SFPD (Site Focal P
This is called lane Deviation.
This SFPD is the maximum displacement amount that does not include the sign from the focal plane in the site when the back surface of the wafer is the reference surface and the plane including the site center point at each site is the focal plane. PUA 95% or more means 95% of the divided area
The above means that it has a site flatness of 0.01 to 0.1 μm. The flatness of the mirror-finished wafer can be made extremely high by setting the site flatness of the surface of the silicon wafer to 0.01 to 0.1 μm (PUA 95% or more) or by setting the TTV to 1.0 μm or less. On the other hand, since the back surface of the wafer is a non-mirror surface, the glossiness of the front surface and the back surface has a remarkable difference, and the front surface and the back surface of the wafer can be easily distinguished.

According to a second aspect of the present invention, one surface of a mirror-finished silicon wafer having a surface flatness of 0.01 to 0.1 μm (PUA 95% or more) and a TTV of 1.0 μm or less on both surfaces is chemically treated. It is a method of processing a silicon wafer, which is characterized in that it becomes cloudy by etching. After mirror-finishing both surfaces of the wafer, only the back surface is fogged, so that the front surface of the wafer has extremely high flatness, while the difference in glossiness from the back surface is remarkable, and the front and back surfaces of the wafer can be easily distinguished.

Further, the invention according to claim 3 is the invention according to claim 2, wherein the chemical etching is capable of closely adhering one surface of a silicon wafer whose both surfaces are mirror-finished to this one surface, and etching by the chemical etching. This is a method in which the wafer is brought into close contact with a base plate having a hydrophobic property with respect to the liquid so as to be covered with the base plate, and then another surface of the wafer is etched. By adhering one surface of the wafer to the base plate by a method such as vacuum adsorption and covering the base plate with the base plate, etching of the adhered surface is prevented and only the other surface is etched.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION The silicon wafer of the present invention is obtained by the processing method according to claim 2 or 3. As an example of this method, there are the following processing methods. That is, the grown single crystal ingot is cut into blocks having a constant resistivity range, and then each block is subjected to outer diameter grinding to have a uniform diameter. The outer diameter ground block is then oriented flat or notched to show a particular crystallographic orientation. After cutting (slicing) the above block into a silicon wafer and chamfering (beveling), the silicon wafer is mechanically polished (lapping) as shown in FIG. This wrapping method is
This is a method of mechanically polishing both surfaces of a wafer by pouring a lapping solution, which is a mixture of alumina or silicon carbide abrasive grains and glycerin, between a lapping plate and a wafer, and rotating and sliding under pressure. The lapping increases the flatness of the surface and the parallelism of the wafer by cutting the uneven layer on both surfaces of the wafer, which is mainly caused by the slicing.

Block cutting, outer diameter grinding, slicing,
The silicon wafer that has undergone the lapping machining process has a damage layer, that is, a work-affected layer on both sides. After lapping as shown in FIG. 1B, the silicon wafer is subjected to a first chemical etching to remove the work-affected layer. The etching solution (etchant) includes an acid etching solution or an alkali etching solution.
The former is an etching solution with a ternary element obtained by diluting a mixed acid of hydrofluoric acid (HF) and nitric acid (HNO ₃ ) with water (H ₂ O) or acetic acid (CH ₃ COOH), and Si is oxidized by nitric acid to produce SiO ₂ After the formation of SiO ₂ , this SiO ₂ is dissolved and removed by hydrofluoric acid. The latter is an etching solution prepared by diluting KOH or NaOH with water. In addition, during this chemical etching, a grinding process may be performed in order to further reduce the work-affected layer. The first chemically etched silicon wafer is subjected to an external gettering treatment for removing a metal that adversely affects device characteristics and a heat treatment for erasing oxygen donors, and then both surfaces thereof are simultaneously polished as shown in FIG. 1C. To be done. This double-sided simultaneous polishing method
Same as the method described in the prior art, the silicon wafer is loaded and maintained in the wafer receiving hole of the carrier plate slightly thinner than its finished thickness, and the front and back surfaces of this silicon wafer are reversed to each other through the polishing cloth. This is a method of mechanically and chemically polishing with a rotating upper platen and lower rotating platen. The double-sided mirror-finishing of the silicon wafer of the present invention is not limited to the above method, and can be obtained by grinding both sides of the wafer after slicing or lapping.

The silicon wafer polished on both sides simultaneously has the second surface on the second side as shown in FIG. 1 (d).
It is clouded by chemical etching. As the etching method, a fixed etchant method shown in FIG. 2, a method (not shown) in which the back surface of the wafer is the upper surface and the back surface is spin-coated, or a method in which the back surface of the wafer is the lower surface and an etchant shower is applied to the back surface from below And so on. In the etchant-fixing method, a base plate that has a larger area than both sides of the mirror-processed silicon wafer and can adhere to one side of the wafer and that is hydrophobic to the etchant is prepared. After coating one side, the other side of the wafer is etched. The etch rate of this second chemical etching is 7-1.
00 μm / min and surface tension of at least 60 dy
ne / cm with a viscosity of 1.4-4.5 mPa.
Acid etchants or alkaline etchants that are seconds are included. An example of an acid etchant is HF (50%): HNO ₃
(70%): H ₃ PO ₄ (85%): H ₂ O = 2: 1: 1: 1 or 2: 1: 1: 1.5, or H
For example, F (50%): HNO ₃ (70%): H ₃ PO ₄ (85%) = 2: 1: 1. The base plate may be, for example, a base plate made of polytetrafluoroethylene. If the wafer is brought into close contact with the base plate by a method such as vacuum suction, the etchant will not enter the close contact surface.

[0012]

Embodiments of the present invention will now be described in detail with reference to the drawings together with comparative examples. <Example 1> 200 mm in diameter double-sided simultaneously polished from a silicon single crystal ingot pulled by the CZ method through the steps described in the embodiment of the invention based on FIGS. 1 (a) to 1 (c), A 730 μm thick silicon wafer was obtained. Here, an acid etching solution was used for the first chemical etching. The back surface of this double-sided polished wafer was fogged by second chemical etching as shown in FIGS. 1 (d) and 2. That is, as shown in FIG. 2A, a base plate 11 made of polytetrafluoroethylene (trade name: Teflon) having a larger area than the silicon wafer 10 and having an extremely smooth surface and being hydrophobic to an etchant is used as a container. The wafer 10 was placed at the bottom of the wafer 12, and the wafer 10 was placed at the center of the base plate 11 so that the back surface of the wafer was in close contact. Next, a cylinder 13 made of polytetrafluoroethylene (trade name: Teflon) having an inner diameter larger than the outer diameter of the wafer 10 was placed on the base plate so as to surround the wafer 10 on the base plate 11. An acid etching solution at 25 ° C. mixed in the tube 13 at a ratio of HF (50%): HNO ₃ (70%): H ₃ PO ₄ (90%): H ₂ O = 2: 1: 1: 1.5. 14 was gently injected. After the acid etching solution 14 is left on the wafer 10 for 60 seconds, the cylinder 13 is removed and a large amount of pure water is put in the container 12 as shown in FIG. And the wafer surface was cleaned. Next, the wafer 10 was taken out from the container 12 together with the base plate 11, and the wafer 10 was peeled from the base plate 11 and dried to obtain a silicon wafer having a clouded back surface. The etching depth was about 10 μm.

Comparative Example 1 The same double-side polished silicon wafer as in Example 1 was used as Comparative Example 1 except that the back surface of the wafer was not clouded.

<Comparative Example 2> As the silicon wafer of Comparative Example 2, the same wafer as that of Example 1 was used up to the simultaneous double-sided polishing of Example 1. That is, instead of the double-sided simultaneous polishing of Example 1, 16 pieces of silicon wafers were attached to a polishing block with wax, and the block was coated with SiO ₂ by applying an appropriate pressure to the artificial leather (polishing cloth) bonded to the rotary table. Only one surface of the wafer was polished while supplying an alkaline colloidal silica polishing liquid having a pH of about 9 to 12 as a main component.

<Comparative Test> The glossiness, TTV and site flatness (SFPD) of the single-sided frosted wafer of Example 1, the double-sided polished wafer of Comparative Example 1 and the single-sided polished wafer of Comparative Example 2 were examined. Table 1 shows the results. (a) Glossiness Both sides of each silicon wafer were visually observed and then measured with a gloss meter manufactured by Nippon Denshoku Co., Ltd. under a gloss 60 ° standard. (b) TTV After each silicon wafer is adsorbed and fixed, the difference between the maximum and minimum values of the wafer surface height is calculated, and the difference is calculated as TT.
V. (c) SFPD The back surface of each wafer was vacuum-sucked on a vacuum suction disk, and the local site flatness of a unit exposure area of 25 mm × 25 mm was obtained by a stepper in this state as shown in FIG. That is,
All points on each wafer surface are used as a reference for the plane calculated by the method of least squares, and this reference plane (best fit reference plane)
The maximum absolute displacement amount was calculated as SFPD.

[0016]

[Table 1]

As is clear from Table 1, the silicon wafer of Comparative Example 1 showed a high flatness, but the two sides were equally excellent in glossiness, so that the front and back could not be distinguished. Further, the silicon wafer of Comparative Example 2 could be easily distinguished between the front and back, but was inferior in flatness. On the other hand, the silicon wafer of Example 1 has the same high glossiness as the silicon wafer of Comparative Example 1 (double-sided polishing) and Comparative Example 2 (single-sided polishing).
It was easy to distinguish between the front and back like the silicon wafer of.

[0018]

As described above, according to the present invention, the back surface of the wafer is fogged by chemical etching after simultaneous double-side polishing, so that it has a very high flatness and the front and back surfaces due to the difference in glossiness are removed. An easily distinguishable silicon wafer is obtained. As a result, a silicon wafer suitable for a device having a memory with a high storage capacity of 256 MDRAM or more can be obtained. Further, since the double-sided simultaneous polishing method is used, there is no need to remove the adhesive during polishing, and there is an advantage that the warpage is small.

[Brief description of drawings]

FIG. 1 is a process diagram showing a method for processing a silicon wafer according to the present invention.

FIG. 2 is a view showing a fixed etching method in which the back surface of a wafer is fogged after polishing both surfaces simultaneously. (A) A sectional view showing a state where the back surface of the wafer is being etched by a second chemical etching solution. (B) A cross-sectional view showing a state in which the back surface of the etched wafer is washed with pure water.

FIG. 3 is a diagram showing a local site flatness by a positive maximum deviation a and a negative maximum deviation b from a focal plane in an exposure area by a stepper.

[Explanation of symbols]

 10 Silicon Wafer 11 Base Plate 12 Container 13 Tube 14 Acid Etching Solution

Front page continued (72) Inventor Kazushige Takaishi 1-297 Kitabukuro-cho, Omiya-shi, Saitama Mitsubishi Materials Corp. Research Institute (72) Inventor Takayuki Shinyuki 1-297 Kitabukuro-cho, Omiya-shi, Saitama Mitsubishi Materials Stock Company Research Institute

Claims (3)

[Claims] 1. A single-sided mirror-finished silicon wafer in which the front surface of the silicon wafer is a mirror surface and the back surface of the silicon wafer is a non-mirror surface, and the site flatness represented by the local site flatness of the surface of the silicon wafer. Is 0.01 to 0.1 μm
(PUA 95% or more), and the difference (TTV) between the maximum value and the minimum value of the wafer surface height when the silicon wafer is suction-fixed is 1.0 μm or less. 2. Both sides are 0.01 to 0.1 μm
A method for processing a silicon wafer, characterized in that one surface of a mirror-finished silicon wafer having a site flatness of (PUA 95% or more) and a TTV of 1.0 μm or less is clouded by chemical etching. 3. In the chemical etching, one side of a silicon wafer whose both surfaces are mirror-finished can be adhered to the entire one side, and the silicon wafer is adhered to a base plate that is hydrophobic with respect to the etching solution for the chemical etching. 3. The method of processing a silicon wafer according to claim 2, wherein the silicon wafer is covered with a plate and then etched on the other side of the wafer.