JPH0923146A - Electronic circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain an electronic circuit to be operated by low voltage and low power consumption without using a low voltage power supply circuit having large dispersion or variation in power supply voltage or a step-down circuit. SOLUTION: Two circuit blocks 101, 102 each of which consists of plural circuits are connected in series and a power supply circuit 103 is connected to these blocks 101, 102. Since an equal current is supplied from the device 103 to respective blocks 101, 102 by the above constitution, inter-block potential Vb1 is stabilized to a value determined by the impedance Z1 of the block 101 and the impedance Z2 of the block 102, so that it is unnecessary to individually connect a power supply circuit to each circuit block. Thereby an electronic circuit to be operated by low power consumption can be attained without using a low voltage power supply circuit and the performance of a computer or the like requiring a high speed integrated circuit can be furthermore improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit which supplies a current to a plurality of circuits and operates at the same time, and more particularly, transmits a signal at a high speed between a plurality of circuits formed on a semiconductor integrated circuit. An electronic circuit that operates.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit used in an electronic circuit device such as an electronic computer, high speed and low power consumption are major problems. For this, it is effective not only to miniaturize the elements used, but also to reduce the amplitude of the transmitted signal,
Therefore, in the complementary metal oxide semiconductor circuits, so-called CMOS circuits, the power supply voltage is being reduced. On the other hand, the breakdown voltage of the element is decreasing with the miniaturization of the element processing size, and there is a situation in which the power supply voltage to be applied must be reduced.

As a conventional technique for reducing the power supply voltage, for example, Japanese Patent Laid-Open Nos. 4-42566 and 4-199 are available.
As described in Japanese Patent No. 870, the power is supplied by using a low voltage power supply outside the integrated circuit, or the voltage of the external power supply is converted into a low voltage by providing a step-down circuit inside the integrated circuit and supplied. There is a method.

[0004]

In this conventional example, it is necessary to generate a lower voltage than before by a power supply device outside the circuit or a step-down circuit inside. In the power supply circuit technology used for these, in general, it becomes more difficult to stably supply a constant voltage and current as the voltage to be supplied becomes lower, and the potential fluctuation of the power supply voltage and the potential fluctuation during operation increase and the circuit There is a problem that high-speed operation and stable operation are impaired.

An object of the present invention is to solve the problems of the prior art and to provide an electronic circuit which operates at a low voltage and a low power consumption without using a low voltage power supply circuit or a step-down circuit having a large power supply potential variation or fluctuation. It is to be realized.

[0006]

To achieve the above object, in the electronic circuit of the present invention, (1) a plurality of circuit blocks having a high-potential-side power supply terminal and a low-potential-side power supply terminal,
In an electronic circuit including a power supply device that supplies voltage / current to the plurality of circuit blocks, a block in which a low potential side power supply terminal of a circuit block and a high potential side power supply terminal of another circuit block are connected. The power source terminal on the high potential side and the power source terminal on the low potential side of the composite circuit block having the inter-potential and connected in series are connected to the power supply device. Also,
(2) A plurality of such composite circuit blocks may be connected in series. Specifically, in an electronic circuit including a plurality of circuit blocks having high-potential-side power supply terminals and low-potential-side power supply terminals and a power supply device that supplies current to the plurality of circuit blocks, a circuit block Has a potential between blocks in which the low-potential-side power supply terminal and the high-potential-side power supply terminal of another circuit block are connected, and the high-potential side or low-potential side of the composite circuit block connected in series Another composite circuit block in which a plurality of blocks are connected in series to the power supply terminal having an inter-block potential in which the power supply terminals on the low potential side and the high potential side of another circuit block are connected in series The power supply terminals on the highest potential side and the lowest potential side of are connected to another power supply device.

Further, (3) in the electronic circuits described in (1) and (2), a capacitor for accumulating charges is connected to the inter-block potential. (4) In the electronic circuits described in (1) and (2), the electronic circuit includes a detection circuit that is connected to the inter-block potential and detects the potential. (5) In the electronic circuits described in (1) and (2), the electronic circuit includes an adjusting circuit connected to the inter-block potential and controlling the potential.

Further, in the electronic circuits described in (6), (1) and (2), signals between circuit blocks at different potential levels in the composite circuit blocks connected in series are mutually connected. It has a signal level conversion circuit block for. (7) In the electronic circuit according to (1) and (2), a circuit block in the composite circuit block connected in series,
The composite circuit block has a signal level conversion circuit block for connecting signals to and from an external circuit.

[0009]

According to the present invention, first, a circuit capable of operating at low voltage in an electronic circuit is divided into a plurality of blocks, and high voltage side power supply terminals and low potential side power supply terminals of the individual circuits are separated in the block. They are connected to each other to serve as a high-potential-side power supply terminal and a low-potential-side power supply terminal as a block. next,
By connecting a high-potential-side power supply terminal of a block and a low-potential-side power supply terminal of another block, the block is a two-stage serially connected composite block. Connect the low-potential-side power supply terminal of another block to the high-potential-side power supply terminal of this composite block, or connect the high-potential-side power supply terminal of another block to the low-potential-side power supply terminal of this composite block. , Etc. may be repeated to form a composite block in which three or more stages are connected in series. Finally, this n steps (n
Is a natural number) A power supply is connected between the power supply terminal on the highest potential side and the power supply terminal on the lowest potential side of the composite blocks connected in series to supply current. It is not necessary to connect the power supply to the power supply terminals between the other blocks.

With this, it is possible to make the voltage supplied to each circuit smaller than the power supply voltage. For example, when the impedance between the power supply terminals on the high potential side and the low potential side of all blocks is equal, The voltage supplied to the block is 1 / n of the voltage supplied by the power supply. When changing the voltage supplied to each block, the number of stages n in which the blocks are connected in series may be changed as necessary. In addition, the impedance between the power supply terminals of each block connected in series can be set arbitrarily by changing the number of circuits in the block and the element size, so the voltage supplied to each block can also be changed for each block. is there.

However, since the impedance between the power supply terminals of each block dynamically changes during the operation of the electronic circuit, the potential supplied to the block may change. Therefore, in the present invention, it is effective to reduce the fluctuation amount by connecting a capacitor between the block potential and the power supply. At this time, it is sufficient to use a capacitor having a capacitance such that a variation in the amount of charge accumulated in the inter-block potential due to the circuit operation does not appear in the change in the inter-block potential.

Further, since the inter-block potential may fluctuate so much that it adversely affects the circuit operation in each block, a circuit for detecting an abnormal potential of the inter-block potential is provided to notify the user of the abnormal state. It is effective to do. This can be easily realized, for example, by using a voltage comparison circuit or the like and measuring the potential difference between the reference potential not affected by the circuit operation and the inter-block potential. Further, it is also effective to provide a circuit that receives a signal from the detection circuit and adjusts the abnormal potential of the inter-block potential. This can be easily done, for example, by connecting an impedance variable element between the block potential and the power supply and controlling the impedance by the output signal of the detection circuit.

Although the levels of the signals are different between the blocks connected in series, the signals can be exchanged by providing the level conversion circuit as in the conventional circuit. Also, signals can be easily exchanged between the electronic circuit of the present invention and another external circuit, for example, a conventional CMOS circuit, by similarly providing a signal level conversion circuit.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing the basic configuration of the first embodiment of the present invention.

This figure shows a basic configuration of the present invention in which two circuit blocks 101 and 102 each composed of a plurality of circuits are connected in series and a power supply device 103 is connected. As described above, the present invention connects the power supply terminal 1012 on the low potential side of the circuit block 101 and the power supply terminal 1021 on the high potential side of the circuit block 102 to each other, and connects the power supply terminal 1011 on the high potential side of the circuit block 101. The high potential side terminal 1031 of the power supply device 103 is connected to the low potential side power supply terminal 1022 of the circuit block 102, and the low potential side terminal 103 of the power supply device 103 is connected.
Connect to 2 respectively. By adopting such a configuration, current is equally supplied to the circuit blocks 101 and 102 from the power supply device 103, so that the inter-block potential Vb1 is stabilized at a value determined by the impedance Z1 of the block 101 and the impedance Z2 of the block 102. , It is not necessary to connect a power supply device to each circuit block individually. Power supply 103
If the voltage between the high-potential-side terminal 1031 and the low-potential-side terminal 1032 of Vs is Vs, Vb1 is set to the value of Equation 1.

Vb1 = Vs × Z2 / (Z1 + Z2) (Equation 1) FIG. 2 is a diagram showing the basic configuration of the second embodiment of the present invention.

This figure consists of a plurality of circuits (n + 1).
(N is a natural number) circuit blocks 201 are connected in series,
It is a basic configuration of the present invention in which a power supply device 203 is connected. As described above, according to the present invention, the low-potential-side power supply terminal and the high-potential-side power supply terminal of the plurality of circuit blocks are connected to each other, and (n
+1) The highest potential side power supply terminal 2021 of the composite circuit block 202 connected in series is connected to the high potential side terminal 2031 of the power supply device 203.
Then, the power supply terminal 2022 on the lowest potential side is connected to the terminal 2032 on the low potential side of the power supply device 203, respectively. By adopting such a configuration, the power supply device 2 is provided in the n circuit blocks 201.
Since the same current is supplied from 03, the block potential Vb
21 to Vb2n stabilizes at a value determined by the impedance of each block, and it is not necessary to connect a power supply device to each circuit block individually. When the impedances of the n circuit blocks 201 are all equal Zn and the voltage supplied from the power supply device 103 is Vs, Vb21 to Vb2n are set to the value of the expression 2.

Vb21 = Vs × (n-1) / n Vb22 = Vs × (n-2) / n (Equation 2): Vb2n = Vs × 1 / n FIG. 12 shows a third embodiment of the present invention. It is a figure which shows the basic composition of.

This figure consists of a plurality of circuits (n + 1)
(N is a natural number) circuit blocks 1201 are connected in series to connect a power supply device 1203, and (m + 1) (m is a natural number) circuit blocks 1204 composed of a plurality of circuits are connected in series. Then, the basic configuration of the present invention is obtained by connecting the composite circuit block 1205 to which the other power supply device 1206 is connected. As described above, according to the present invention, a composite circuit block 1202 in which a plurality of circuit blocks are connected in series and a composite circuit block 1205 in which another plurality of circuit blocks are connected in series are supplied with currents from different power supply devices 1203 and 1206, respectively. In addition, a configuration in which they are connected in series is also possible. Again,
The inter-block potentials Vb1211 to Vb121n to Vb1221 to Vb122m are stable at values determined by the impedance of each block as described above, and it is not necessary to connect a power supply device.

FIG. 3 is a specific circuit diagram when the first basic structure of FIG. 1 is realized by using MOS transistors.

Each of the circuit blocks 301 and 302 has a plurality of CMs.
It is composed of an OS circuit, and the low-potential-side power supply terminal 3012 of 301 and the high-potential-side power supply terminal 3021 of 302 are connected to each other and have an inter-block potential Vb. The high-potential-side power supply terminal 3011 of 301 is connected to the high-potential-side terminal 3031 of the power supply device 303, and the low-potential-side terminal 3022 of 302 is connected to the low-potential-side terminal 3032 of the power supply device 303.

As a characteristic when this circuit is operating,
Inter-block potential Vb and impedance of blocks 301 and 302
The graph of FIG. 4A shows the relationship between Z1 and Z2, with the horizontal axis representing the potential of Vb and the vertical axis representing the impedance. Further, the relationship between the inter-block potential Vb and the time average currents I1 and I2 flowing through the blocks 301 and 302 is shown by the potential of Vb on the horizontal axis and the current value on the vertical axis as shown in the graph of FIG. 4 (b). become. As described above, in the present invention, when the inter-block potential Vb decreases, the potential difference between the terminals 3011 and 3012 of the block 301 becomes relatively large, so that the impedance of the block 301 decreases according to FIG. Seen from FIG. 4, the potential difference between the terminals 3021 and 3022 becomes smaller conversely.
The characteristic that the impedance of the block 302 increases according to (a) is used. Due to this characteristic, the current I flowing through 301
Since 1 increases and the current I2 flowing through 302 decreases, the effect of increasing Vb occurs. Also, when Vb rises, the movement is reversed, and the effect of lowering Vb occurs. As a result, the inter-block potential Vb is stabilized at a certain equilibrium potential Vba during the operation of the circuit. Therefore, in the present invention, it is not necessary to individually supply a current from the power supply device to each inter-block potential.

FIG. 5 is an example in which a capacitor for stabilizing the inter-block potential is applied to the specific example of the present invention realized by using the MOS transistor of FIG.

The circuit blocks 501 and 502 are each a plurality of CMs.
It is composed of an OS circuit, and the low-potential-side power supply terminal 5012 of 501 and the high-potential-side power supply terminal 5021 of 502 are connected to each other to have the inter-block potential Vb. The high-potential-side power supply terminal 5011 of 501 is connected to the high-potential-side terminal 5031 of the power supply device 503, and the low-potential-side terminal 5022 of 502 is connected to the low-potential-side terminal 5032 of the power supply device 503.
Inter-block potential Vb and high-potential side terminal 5031 of power supply device 503
Alternatively, a capacitor 504 is connected between the terminal 5032 on the low potential side.

Block 50 when this circuit is operating
The changes over time of the currents I3 and I4 flowing through 1, 502 are plotted along the horizontal axis,
When the current value is plotted on the vertical axis, it becomes as shown in the graph of FIG. Further, the time variation Vb61 of the inter-block potential Vb when the capacitor 504 is not connected and the time variation Vb62 of the inter-block potential Vb when the capacitor 504 is connected are plotted along the horizontal axis and time on the vertical axis. The graph shown in FIG. As described above, the inter-block potential Vb fluctuates as the blocks 501 and 502 operate, but in the present invention, this fluctuation can be suppressed to a small level by connecting the capacitor 504. If the capacitance of the inter-block potential Vb in the state where the capacitor 504 is not connected is C1, the potential fluctuation at that time is ΔV1, and the capacitance of the capacitor 504 is C2, ΔV2 of the potential fluctuation after the capacitor connection is reduced as shown in Formula 3. .

ΔV2 = ΔV1 × C1 / (C1 + C2) (Equation 3) FIG. 7 shows a specific example of the present invention realized by using the MOS transistor of FIG. And an adjusting circuit for controlling the potential thereof are applied.

Each of the circuit blocks 701 and 702 has a plurality of CMs.
It is composed of an OS circuit, and the low-potential-side power supply terminal 7012 of 701 and the high-potential-side power supply terminal 7021 of 702 are connected to each other to have an inter-block potential Vb. The high-potential-side power supply terminal 7011 of 701 is connected to the high-potential-side terminal 7031 of the power supply device 703, and the low-potential-side terminal 7022 of 702 is connected to the low-potential-side terminal 7032 of the power supply device 703.
When the detection circuit 704 detects that the inter-block potential 704 has dropped below the reference potential Vb2, it sets the detection signal Vw2 to low level. As a result, the adjusting circuit 705 becomes conductive and the inter-block potential Vb is raised to Vb2 or higher. Similarly, the detection circuit 706
When detecting that the inter-block potential Vb rises above the reference potential Vb3, the detection signal Vw3 is set to the high level. As a result, the adjustment circuit 707 becomes conductive and the inter-block potential Vb is lowered to 704 or less.

FIG. 8 shows an example in which a signal level conversion circuit for connecting signals between circuit blocks having different potential levels to each other is applied to the specific example of the present invention realized by using the MOS transistor of FIG. Is.

Each of the circuit blocks 801, 802, 803, 804 is composed of a plurality of CMOS circuits, and has a power supply terminal 8 on the low potential side of 801.
The power supply terminals 8021 on the high potential side of 012 and 802 are connected to each other to have the inter-block potential Vb81. Power supply terminals 8032 and 804 on the low potential side of 803
The power supply terminal 8041 on the high potential side of is connected to the inter-block potential Vb.
It becomes 82. The high-potential-side power supply terminals 8011 and 8031 of 801 and 803 are connected to the high-potential-side terminal 8071 of the power supply device 807, and the low-potential-side terminals 8022 and 8042 of the power-supply device 807 are the low-potential-side terminal 8 of the power supply device 807.
072 respectively. The circuit block 805 is a signal level conversion circuit for connecting signals between the blocks 801 and 804, and the circuit block 806 is a signal level conversion circuit for connecting signals between the blocks 802 and 803.

Block 80 when this circuit is operating
The time change of the signal level of 1, 805, 804 is plotted on the horizontal axis,
When the potential is plotted on the vertical axis, the graph is as shown in FIG.
901 is an input signal of the block 801, 902 is an output signal of the block 801, 903 is an input signal of the block 804, and 904 is a block 804.
Is the output signal of. VDD is the high-potential side terminal of power supply unit 807
8071 level, VSS is terminal 8072 on the low potential side of power supply 807
, Vba is the level of inter-block potentials Vb81, Vb82. Thus, the output signal 902 of block 801 is VDD and V
Although it is a level between ba and V, which is the input signal of the block 804, the low level is lowered by the level conversion circuit 805.
Converted to a level between DD and VSS. In order to perform this conversion, the power supply terminal 8051 on the high potential side of the block 805 must be connected to the same level or higher as the terminal 8011 on the high potential side of the block 801, and the power supply terminal 8052 on the low potential side is connected to the block.
It is necessary to connect to a potential equal to or lower than the same level as the terminal 8042 on the low potential side of 804. In this example, 8051 is connected to the high potential side terminal 8071 of the power supply device 807, like 8011, and 8052 is connected to the low potential side terminal 8072 of the power supply device 807, like 8042. The level conversion circuit 805 has been described above.
The same applies to 06.

FIG. 10 shows a circuit in which a concrete example of the present invention realized by using the MOS transistor of FIG. 3 and a conventional circuit are mixed, and a signal level conversion circuit for connecting signals between them is provided. This is an example of application. Up to this point, an example applied to a logic circuit has been given, so here an example applied to a read circuit of an SRAM is shown. In the following, the general constituent parts of the SRAM are omitted, and only the parts relating to the present invention are shown.

The circuit blocks 1001 and 1002 are composed of a plurality of memory cell circuits 10013 and 10023, respectively. The power supply terminal 10012 on the low potential side of 1001 and the power supply terminal 10021 on the high potential side of 1002 are connected to each other to have the inter-block potential Vb. The power supply terminal 10011 on the high potential side of 1001 is connected to the terminal 10041 on the high potential side of the power supply unit 1004,
The low-potential-side terminal 10022 of 02 is connected to the low-potential-side terminal 10042 of the power supply device 1004, respectively. 10014 and 10024 are word lines, and 10015 and 10025 are bit lines. A word line driver, a bit line selection circuit, a writing circuit, etc. are omitted in this figure. The circuit block 1003 is a signal level conversion circuit for connecting signals between the blocks 1001 and 1002 and the external circuit 1005, 10031 and 10032 are bit line loads, 10033 is a sense amplifier, and 10034 is an output buffer.

Block 100 when this circuit is operating
The graphs of FIGS. 11 (a) and 11 (b) show the changes in the signal levels of 1, 1002, and 1003 with time on the horizontal axis and potential on the vertical axis. (a) is a graph when data is read from the memory cell circuit 10013, and (b) is a graph when data is read from 10023. 1101 and 1102 are internal voltages of the memory cell circuits 10013 and 10023, 1103 and 1104 are signals of the word lines 10014 and 10023,
1105 is a signal of the bit lines 10015 and 11025, 1106 is an output signal of the sense amplifier 10033, and 1107 is an input signal of the output buffer 10034. VDD is the level of the terminal 10041 on the high potential side of the power supply device 1004, VSS is the level of the terminal 10042 on the low potential side of the power supply device 1004, and Vba is the level of the inter-block potential Vb. In this way, the internal voltages 1101, 11 of the memory cell circuits 10013, 10023 are
02 is converted into a level between VDD and VSS which is a signal to the external circuit 1005 by the level conversion circuit 1003.

In the description of the present embodiment, the circuit in which two circuit blocks are connected in series has been described as an example, but the same applies when three or more circuit blocks are connected in series as shown in FIG. Is. Further, although the integrated circuit has been described as an example of the electronic circuit, the present invention can be applied to a general electronic circuit such as an electronic circuit in which the integrated circuit is mounted on a wiring board and mutually connected.

[0036]

According to the present invention, it is possible to realize an electronic circuit which operates at low voltage and low power consumption without using a low-voltage power supply circuit or a step-down circuit in which power supply potential variations and fluctuations are large. Further, it can be expected that this can contribute to further improvement in performance in fields where computers and other high-speed integrated circuits are required.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration of a first embodiment of the present invention.

FIG. 2 is a diagram showing a basic configuration of a second embodiment of the present invention.

3 is a diagram showing a first specific example of the present invention in the electronic circuit of FIG. 1. FIG.

4 is an explanatory diagram of the operation of the circuit of the present invention in the electronic circuit of FIG.

5 is a diagram showing a second specific example of the present invention in the electronic circuit of FIG. 1. FIG.

6 is an explanatory diagram of the operation of the circuit of the present invention in the electronic circuit of FIG.

7 is a diagram showing a third specific example of the present invention in the electronic circuit of FIG. 1. FIG.

8 is a diagram showing a fourth specific example of the present invention in the electronic circuit of FIG. 1. FIG.

9 is an operation explanatory diagram of the circuit of the present invention in the electronic circuit of FIG.

10 is a diagram showing a fifth specific example of the present invention in the electronic circuit of FIG. 1. FIG.

11 is an operation explanatory diagram of the circuit of the present invention in the electronic circuit of FIG.

FIG. 12 is a diagram showing a basic configuration of a third embodiment of the present invention.

[Explanation of symbols]

101,102 ... Circuit block composed of a plurality of circuits, 1011,1021
... Power supply terminal on high potential side of circuit block, 1012, 1022 ... Power supply terminal on low potential side of circuit block, 103 ... Power supply device, 103
1 ... High potential side terminal of power supply device, 1032 ... Low potential side terminal of power supply device, Vb1 ... Inter-block potential, 201 ... Plural circuit blocks composed of plural circuits, 202 ... Plural circuit blocks 2021 series circuit block connected in series
… Of the power supply terminals in the composite circuit block, the power supply terminal on the highest potential side, 2022 ... Of the power supply terminals in the composite circuit block, the power supply terminal on the lowest potential side, 203 ... Power supply device, 2031 ... High potential side of the power supply device , Terminal 2032 ... Terminal on the low potential side of the power supply,
Vb21 to Vb2n ... potential between blocks, 301, 302 ... circuit block composed of a plurality of CMOS circuits, 3011, 3021 ... power supply terminal on high potential side of circuit block, 3012, 3022 ... power supply terminal on low potential side of circuit block, 303 ... power supply Device, 3031 ... High potential side terminal of power supply device, 3032 ... Low potential side terminal of power supply device, Vb ...
Inter-block potential, Z1 ... Impedance of block 301, Z
2 ... Impedance of block 302, I1 ... Time average current of block 301, I2 ... Time average current of block 302, Vba ...
Equilibrium potential, 501,502 ... Circuit block composed of a plurality of CMOS circuits, 5011,5021 ... Power supply terminal on high potential side of circuit block, 5012,5022 ... Power supply terminal on low potential side of circuit block, 5
03 ... power supply unit, 5031 ... high potential side terminal of power supply unit, 5032
... Low-potential side terminal of power supply device, 504 ... Capacitor, I3 ...
Time variation of current flowing through block 501, I4 ... Block 502
Vb61 ... Time variation of inter-block potential when capacitor 504 is not connected, Vb62 ... Time variation of inter-block potential when capacitor 504 is connected, 7
01,702… Circuit block consisting of multiple CMOS circuits, 7011,7
021 ... Power supply terminal on the high potential side of the circuit block, 7012, 7022 ...
Power supply terminal on the low potential side of the circuit block, 703 ... Power supply device, 7
031 ... High-potential-side terminal of power supply device, 7032 ... Low-potential-side terminal of power supply device, 704, 706 ... Detection circuit for detecting fluctuation of inter-block potential, 705, 707 ... Adjustment circuit for controlling inter-block potential, Vb2, Vb3 ... Reference potential, Vw2, Vw3 ... Detection signal, 801,
802 ... Circuit block composed of a plurality of CMOS circuits, 803, 804 ...
Circuit block composed of a plurality of CMOS circuits, 8011, 8021, high potential side power supply terminal of the circuit block, 8031, 8041 ... High potential side power supply terminal of the circuit block, 8012, 8022 ... Low potential side power supply terminal of the circuit block , 8032, 8042 ... Power supply terminal on low potential side of circuit block, 805, 806 ... Signal level conversion circuit block, 8051, 8061 ... Power supply terminal on high potential side of signal level conversion circuit block, 8052, 8062 ... Of signal level conversion circuit block Low-potential-side power supply terminal, 807 ... Power supply device, 8071 ...
High potential side terminal of power supply device, 8072 ... Low potential side terminal of power supply device, Vb81, Vb82 ... Inter-block potential, 1201, 1204 ... Plural circuit blocks composed of plural circuits, 1202, 1205 ...
Composite circuit block, in which a plurality of circuit blocks are connected in series, 12021, 12051 ... Of the power supply terminals in the composite circuit block, the power supply terminal on the highest potential side, 12022, 12054 ... Of the power supply terminals in the composite circuit block, the lowest Power supply terminal on the potential side, 120
3,1206 ... Power supply device, 12031, 12061 ... High potential side terminal of power supply device, 12032, 12062 ... Low potential side terminal of power supply device, Vb1
211-Vb121n, Vb1221-Vb1222m Block-to-block potential.

Claims (9)

[Claims] 1. A composite circuit block is formed by connecting a plurality of circuit blocks each having a high-potential-side power supply terminal and a low-potential-side power supply terminal in series, and the composite circuit block has a highest-potential-side power supply terminal. An electronic circuit characterized in that a power supply device is connected to a power supply terminal on the lowest potential side. 2. The electronic circuit according to claim 1, wherein said circuit block has an impedance whose value fluctuates substantially in inverse proportion to the fluctuation of the voltage across the circuit block. 3. The electronic circuit according to claim 1, wherein the circuit block comprises a CMOS circuit. 4. The electronic circuit according to claim 1, wherein another composite circuit block is connected in series to the composite circuit block, and another power supply device is connected between both power supply terminals of the other composite circuit block. 5. The electronic circuit according to claim 1, wherein a capacitor for accumulating charges is connected to the inter-block potential. 6. The electronic circuit according to claim 1, further comprising a detection circuit which is connected to the inter-block potential and detects the potential. 7. The electronic circuit according to claim 1, further comprising an adjusting circuit connected to the inter-block potential and controlling the potential. 8. The electronic circuit according to claim 1, further comprising a signal level conversion circuit block for mutually connecting signals between circuit blocks at different potential levels in the composite circuit blocks connected in series. 9. A signal level conversion circuit block for connecting signals between a circuit block in the composite circuit block connected in series and a circuit outside the composite circuit block to each other. Electronic circuit.