JPH09223858A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH09223858A
JPH09223858A JP2810596A JP2810596A JPH09223858A JP H09223858 A JPH09223858 A JP H09223858A JP 2810596 A JP2810596 A JP 2810596A JP 2810596 A JP2810596 A JP 2810596A JP H09223858 A JPH09223858 A JP H09223858A
Authority
JP
Japan
Prior art keywords
plating
conductive polymer
hole
wiring board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2810596A
Other languages
Japanese (ja)
Inventor
Fumio Takei
文雄 武井
Norio Saruwatari
紀男 猿渡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2810596A priority Critical patent/JPH09223858A/en
Publication of JPH09223858A publication Critical patent/JPH09223858A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Electroplating Methods And Accessories (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain through hole plating excellent in adhesion and reliability and contribute to cost reduction and the preservation of the environment by applying undoped conductive polymer and making a sulfonic acid dopant react with the polymer. SOLUTION: Metal foil 2 for wiring is formed on an insulating substrate 1, and a through hole 3 is formed therein. The substrate is cleaned, and is made to react with a base treatment agent 4 to activate the inside surface of the through hole. A solution of conductive polymer is applied to the inside of the through hole to form a conductive polymer layer 5 there. Then it is doped with sulfonic dopant to become highly conductive. The substrate 1 is immersed in a plating tank. At this time, a plating liquid is used wherein metal is deposited at a current density of 1-10mA/cm<2> or so and at a plating voltage of 0.3 V or below, preferably 0.1V or below. For copper plating, a plating liquid with a pH of 2-8, preferably 3-6, is used. This obtains through hole plating 6 excellent in adhesion and reliability, and contributes to cost reduction and the preservation of the environment.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はプリント配線基板及
びその製造方法に係り, 特にスルーホールのめっき方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same, and more particularly to a method for plating through holes.

【0002】近年, マイクロエレクトロニクス, とりわ
け半導体素子の製造技術の顕著な進歩により, 大規模集
積回路に代表される, 高度に集積化された高機能デバイ
スが実現されている。これを種々の装置の制御系に採用
することにより,電子機器は飛躍的に小型化され,各種
産業のみならず一般家庭の家電製品の小型化,多機能化
が行われている。
[0002] In recent years, highly advanced highly integrated devices represented by large scale integrated circuits have been realized due to remarkable progress in microelectronics, especially in semiconductor element manufacturing technology. By adopting this in the control system of various devices, electronic devices have been dramatically miniaturized, and home appliances in general households have been miniaturized and multifunctional as well as in various industries.

【0003】上記の電子機器は, ガラス繊維等を樹脂で
硬化して得られる複合材料であるガラスエポキシ樹脂,
紙フェノール樹脂, ベークライト樹脂等の各種絶縁性基
板上に特定の配線パターンを形成したプリント配線基板
上に, 半導体素子, 抵抗器,キャパシタ, コイル等の部
品を実装して構成される。このプリント配線基板は,実
装密度の向上に重要な役割を果たし, 装置の小型化, 多
機能化の鍵となる要素である。
The above-mentioned electronic equipment is composed of a glass epoxy resin, which is a composite material obtained by curing glass fibers with a resin,
It is configured by mounting components such as semiconductor elements, resistors, capacitors, and coils on a printed wiring board that has a specific wiring pattern formed on various insulating substrates such as paper phenolic resin and bakelite resin. This printed wiring board plays an important role in improving the packaging density, and is a key element for downsizing and multi-functionalization of devices.

【0004】[0004]

【従来の技術】装置の小型化を進めるための高密度実装
に対応するため, 最近のプリント配線基板には両面配線
あるいは多層積層配線基板が用いられている。これは基
板の表裏に部品相互を接続する配線用の銅箔パターンを
形成したもので, さらにその中間にも配線を形成したも
のもあり,複雑な配線を限られた面積内で効率良く実現
している。
2. Description of the Related Art Recently, double-sided wiring or multi-layer laminated wiring boards have been used for printed wiring boards in order to cope with high-density mounting for miniaturization of devices. This is a copper foil pattern for wiring that connects components to each other on the front and back of the board, and there is also a wiring formed in the middle of it so that complicated wiring can be efficiently realized within a limited area. ing.

【0005】この両面乃至多層積層配線基板において,
両面または多層配線間を相互に且つ基板に垂直に接続す
るためのスルーホール配線部の形成が重要である。スル
ーホール配線部は, 絶縁基板の配線を行う部分に 0.3〜
1 mm程度の孔を開け, この内壁を基板に対して垂直方向
にめっきすることにより,ここに接続する上下の配線を
電気的に接続している。
In this double-sided or multi-layer laminated wiring board,
It is important to form through-hole wiring portions for connecting both surfaces or multilayer wirings to each other and perpendicularly to the substrate. The through-hole wiring part is 0.3 to 0.3
By opening a hole of about 1 mm and plating this inner wall in the direction perpendicular to the substrate, the upper and lower wirings connected here are electrically connected.

【0006】このスルーホール内のめっき工程はスルー
ホールめっきと呼ばれ, これまでに種々の方法が提案さ
れ実現されている。しかし,本質的には絶縁性の基板材
料表面を何らかの方法で導電化し,これを電極として更
にめっきを施す方法が主流である。例えば, 触媒として
パラジウム等の貴金属の塩を用いた微粒子状触媒をスル
ーホール内に被着させ (活性化),これをホルマリン等の
還元剤と硫酸銅の入った無電解めっき浴に浸漬し,触媒
を塗布した表面に還元された銅を析出させる,いわゆる
無電解めっき法が実際に行われている。
This plating process in the through hole is called through hole plating, and various methods have been proposed and realized so far. However, the method that makes the surface of the insulative substrate material electrically conductive by some method, and uses this as an electrode for further plating is the mainstream method. For example, a fine particle catalyst using a salt of a noble metal such as palladium as a catalyst is deposited (activated) in the through holes, and this is immersed in an electroless plating bath containing a reducing agent such as formalin and copper sulfate, The so-called electroless plating method of depositing reduced copper on the surface coated with a catalyst is actually practiced.

【0007】従来の手法によるプリント配線基板の製造
方法は, スルーホールめっきは無電解銅めっきであるた
め,高価で稀少なパラジウム等の貴金属を使用しなけれ
ばならず, 省資源及び低コスト化の観点から望ましくな
い。さらに, 急性毒性のみならず,催奇性, 発癌性を有
するホルムアルデヒドを使用する等, 安全性確保や作業
環境の改善の面でも問題のある製造方法である。
In the conventional method for manufacturing a printed wiring board, since through-hole plating is electroless copper plating, expensive and rare precious metals such as palladium must be used, which saves resources and costs. Not desirable from a point of view. Furthermore, it is a manufacturing method that has problems in terms of ensuring safety and improving the working environment, such as the use of formaldehyde, which has teratogenicity and carcinogenicity as well as acute toxicity.

【0008】このために, 最近ではダイレクトプレーテ
ィング法と呼ばれる直接めっき法が提案されている。例
えば米国特許第5,300,208 に開示されているのは,導電
性高分子を使用し,これをスルーホールを有する絶縁性
基板のめっきを施す部分に塗布し,これを電極としてこ
の上に直接銅等の金属めっきを施す手法である。
For this reason, a direct plating method called a direct plating method has recently been proposed. For example, U.S. Pat. No. 5,300,208 discloses that a conductive polymer is used, and this is applied to a portion of an insulating substrate having a through hole to be plated, and this is used as an electrode directly on the copper or the like. This is a method of applying metal plating.

【0009】[0009]

【発明が解決しようとする課題】しかし,この発明に開
示された方法においては,導電性高分子であるポリアニ
リンを塗布して導電層を形成する際に, ポリアニリンを
強度の酸性を有する酢酸を用いて溶解すると同時に, 導
電性を向上するドーパントとして用いているため,ポリ
アニリンの凝集が著しく, 材料のポットライフが短く工
程管理が難しいという問題がある。
However, in the method disclosed in the present invention, when polyaniline which is a conductive polymer is applied to form a conductive layer, polyaniline is used with acetic acid having strong acidity. Since it is used as a dopant that improves the conductivity at the same time as it dissolves, polyaniline is significantly aggregated, and the pot life of the material is short and process control is difficult.

【0010】また,未ドープの還元状態のポリアニリン
を塗布する方法も開示されているものの,この場合は銀
やパラジウム等の貴金属類の還元析出による, いわゆる
自発的なめっき手法を利用しているため,高価な銀やパ
ラジウム等の使用により製造コストが上昇するという欠
点がある。
Although a method of applying undoped reduced polyaniline is also disclosed, in this case, a so-called spontaneous plating method is used by reducing and depositing a noble metal such as silver or palladium. However, there is a drawback that the manufacturing cost increases due to the use of expensive silver or palladium.

【0011】また同様に, 導電性高分子を使用する手法
として特開平06-220685 でも提示されている。しかし,
この方法においては, 導電性高分子のモノマを絶縁体表
面で重合して作製するため,やはりモノマ溶液の管理が
難しいという欠点がある。
Similarly, JP-A-06-220685 proposes a method using a conductive polymer. However,
In this method, the conductive polymer monomer is polymerized on the surface of the insulator, so it is also difficult to control the monomer solution.

【0012】また,導電化を導電性高分子溶液のキャス
トによる薄膜形成によって行う方法では,導電性高分子
と下地との密着性が低く, 引き抜き応力が小さい等の問
題がある。
[0012] Further, the method of conducting the conductive film by forming a thin film by casting a conductive polymer solution has the problems that the adhesion between the conductive polymer and the base is low, and the drawing stress is small.

【0013】また,特開昭63-311797 では, スルーホー
ルの壁面にシリコンカップリング剤を用いて表面処理を
施し, 次いでスルーホールめっきを行っている。本発明
は, 貴金属や毒性の強いホルマリン等を使用しないで,
密着性が良く高信頼性のスルーホールめっきを実現し,
コストの低減と環境保全に貢献することを目的とする。
Further, in Japanese Patent Laid-Open No. 63-311797, the wall surface of the through hole is subjected to surface treatment using a silicon coupling agent, and then through hole plating is performed. The present invention does not use precious metals or highly toxic formalin,
Realizes highly reliable through-hole plating with good adhesion.
The purpose is to contribute to cost reduction and environmental conservation.

【0014】[0014]

【課題を解決するための手段】上記課題の解決は, 1)絶縁性基板のめっき部を1分子中に複数の反応基を
有する試薬で処理して未ドープ状態の導電性高分子層を
形成し,該導電性高分子層にドーパントを作用させて導
電化し,金属イオンを溶解しためっき液中に該基板を浸
漬して該導電性高分子層上に電気めっきを行うプリント
配線基板の製造方法,あるいは 2)前記導電性高分子層がポリアニリンまたはその誘導
体からなり,前記ドーパントとして脂肪族スルホン酸を
用いる前記1記載のプリント配線基板の製造方法,ある
いは 3)前記導電性高分子層がポリアニリンまたはその誘導
体からなり,前記ドーパントとして芳香族スルホン酸を
用いる前記1記載のプリント配線基板の製造方法,ある
いは 4)前記電気めっきは, 0.3 V 以下の電圧で金属が析出
するめっき液を用いる前記1記載のプリント配線基板の
製造方法,あるいは 5)前記電気めっきは, 前記4記載のめっきを行った
後,0.3 V 以上の電圧で金属が析出するめっき液を用い
てめっきを行うプリント配線基板の製造方法,あるいは 6)前記めっき部がスルーホール内である前記1乃至5
記載のプリント配線基板の製造方法により達成される。
Means for Solving the Problems To solve the above problems, 1) form an undoped conductive polymer layer by treating a plated portion of an insulating substrate with a reagent having a plurality of reactive groups in one molecule. Then, a method of manufacturing a printed wiring board, in which a dopant is caused to act on the conductive polymer layer to render it conductive, the substrate is immersed in a plating solution in which metal ions are dissolved, and electroplating is performed on the conductive polymer layer Or 2) the method for producing a printed wiring board as described in 1 above, wherein the conductive polymer layer is made of polyaniline or a derivative thereof, and aliphatic sulfonic acid is used as the dopant, or 3) the conductive polymer layer is made of polyaniline or The method for producing a printed wiring board as described in 1 above, which is made of a derivative thereof and uses aromatic sulfonic acid as the dopant, or 4) the electroplating is performed at 0.3 V or less. The method for producing a printed wiring board as described in 1 above, which uses a plating solution for precipitating a metal by pressure, or 5) the electroplating, after the plating as described in 4), is a plating in which a metal is deposited at a voltage of 0.3 V or more. Or a method of manufacturing a printed wiring board for plating using a liquid, or 6) the above-mentioned 1 to 5 in which the plated portion is in a through hole
This is achieved by the method for manufacturing a printed wiring board described.

【0015】次に本発明の作用について説明する。本発
明では絶縁性基板のめっき部を, 1 分子中に複数の反応
基を有する試薬で処理した後, 未ドープの導電性高分子
を塗布し,これにスルホン酸系のドーパントを作用させ
ることにより, 安定で導電性の高い導電性高分子膜を形
成することができる。このとき, 上記の試薬の使用によ
り, 下地と導電性高分子の密着性が向上し,スルーホー
ル等のめっき部におけるめっき膜の密着性が上がるた
め,めっきの信頼性が向上する。更に,本発明の作用の
詳細について説明する。 (1) 本発明の要点である,未ドープの導電性高分子を塗
布しこれにスルホン酸系のドーパントを作用させること
により, 何故安定で導電性の高い導電性高分子膜を形成
できるのか,その理由を説明する。
Next, the operation of the present invention will be described. In the present invention, the plated part of the insulating substrate is treated with a reagent having a plurality of reactive groups in one molecule, and then an undoped conductive polymer is applied, and a sulfonic acid type dopant is applied to this. Therefore, it is possible to form a stable and highly conductive conductive polymer film. At this time, by using the above-mentioned reagent, the adhesion between the base and the conductive polymer is improved, and the adhesion of the plated film in the plated parts such as through holes is improved, so that the plating reliability is improved. Further, the details of the operation of the present invention will be described. (1) Why is it possible to form a stable and highly conductive conductive polymer film by applying an undoped conductive polymer and applying a sulfonic acid-based dopant to this, which is the main point of the present invention? The reason will be explained.

【0016】導電性高分子,特にポリアニリンにおいて
は,塗布過程では溶媒に対して可溶性が必要である。ド
ーピングされた導電性高分子は,可溶性に乏しく不溶性
といった方がよく,この状態で塗布しても,良好な導電
性の発現は期待できない。これは,導電性を担う導電性
高分子主鎖の重なりの状態が,十分に溶けた溶液から成
膜されるのか,あるいはドーピングによって凝集した状
態から成膜されるのかにより異なるためである。
The conductive polymer, particularly polyaniline, needs to be soluble in the solvent during the coating process. The doped conductive polymer is preferably poorly soluble and insoluble, and even if it is applied in this state, good conductivity cannot be expected. This is because the overlapping state of the conductive polymer main chains responsible for conductivity depends on whether the film is formed from a sufficiently dissolved solution or is formed from an aggregated state by doping.

【0017】主鎖の重なりが多くなる完全溶液からの成
膜の方が,導電率が2〜5桁程高くなる。この点で本発
明は未ドープの材料を使用している。また,塗布する溶
液の安定性においても,未ドープの導電性高分子溶液は
長期間にわたり均一な溶解状態を維持することが可能で
あるが,ドーピングされた場合,ドーパントと導電性高
分子との相互作用により,溶媒中に広がった高分子鎖と
して存在するよりも小さい分子平均鎖長で凝集状態にあ
る方が自由エネルギーは小さく安定して存在できる。
Film formation from a complete solution, in which the main chains overlap with each other, has a conductivity of about 2 to 5 orders of magnitude higher. In this respect, the present invention uses undoped material. Also, regarding the stability of the applied solution, the undoped conductive polymer solution can maintain a uniform dissolved state for a long period of time. Due to the interaction, the free energy is smaller and the polymer can exist stably when it is in an aggregated state with a smaller average molecular chain length than it exists as a polymer chain spread in the solvent.

【0018】この結果として,前記のように凝集体を形
成し,これが大きな粒子に成長したときに沈澱して相分
離が起き,溶液としての均一性を損なうとともに成膜後
の導電性も低下する。
As a result, the agglomerates are formed as described above, and when these agglomerates grow into large particles, they precipitate and cause phase separation, impairing the homogeneity as a solution and lowering the conductivity after film formation. .

【0019】スルホン酸系のドーパントに対する安定性
発現の原因は次のようである。即ち,導電率安定性はイ
オン半径や形に影響され,より大きなイオン半径を有す
るもの,また,より非対称性(異方性)の大きなイオン
ほど,導電性高分子膜中を移動しにくく,導電性に対し
安定に寄与するという経験からくる。
The cause of the development of stability with respect to the sulfonic acid type dopant is as follows. That is, the conductivity stability is affected by the ionic radius and shape, and those having a larger ionic radius and ions having a larger asymmetry (anisotropic property) are less likely to move in the conductive polymer film, and thus have a conductive property. It comes from the experience of contributing to stability for sex.

【0020】スルホン酸系以外には,過塩素酸 (Cl
O4 - ) 系, 四フッ化硼素(BF4 - ) 系, 六フッ化りん(PF6
- ) 系等あるが,いずれのイオンよりもスルホン酸系の
ドーパントを使用した方が, 図3に示される熱処理試験
をした結果, 導電率が初期の1/2になる時間を比較して,
2〜10倍安定な膜を得ることができた。
Other than sulfonic acid type, perchloric acid (Cl
O 4 -) system, tetrafluoroborate (BF 4 -) system, hexafluorophosphate (PF 6
- ) System, etc., but using the sulfonic acid-based dopant rather than any of the ions, the heat treatment test shown in Fig. 3 shows that the conductivity becomes 1/2 the initial time.
A film that was 2 to 10 times more stable could be obtained.

【0021】図2は上記の熱処理試験に際し,抵抗率の
変化を測定するための電極の構成図である。測定用電極
として, 図示されるように石英板11上に間隔10mmを開け
て2個の幅10mm, 厚さ1000Åの透明電極(ITO) パターン
12, 13を形成し,この間隔部に導電性高分子膜を形成
し,両電極間の表面抵抗率を測定する。
FIG. 2 is a structural diagram of an electrode for measuring a change in resistivity during the above heat treatment test. As measuring electrodes, two transparent electrodes (ITO) with a width of 10mm and a thickness of 1000Å are formed on the quartz plate 11 with a space of 10mm as shown in the figure.
12 and 13 are formed, a conductive polymer film is formed in this space, and the surface resistivity between both electrodes is measured.

【0022】図3はドーパントと抵抗安定性の関係を示
す図で,温度 120℃中での経過時間に対する各種ドーパ
ントの表面抵抗率の変化を示す。測定に用いたドーパン
トの種類はメタスルホン酸, 硫酸, 2-NS (2-ナフタレン
スルホン酸) , PTS (p- トルエンスルホン酸)である。
FIG. 3 is a diagram showing the relationship between the dopant and the resistance stability, showing the change in the surface resistivity of various dopants with the passage of time at a temperature of 120 ° C. The types of dopants used for the measurement are metasulfonic acid, sulfuric acid, 2-NS (2-naphthalenesulfonic acid), and PTS (p-toluenesulfonic acid).

【0023】また,同じスルホン酸系でも,最小のイオ
ン(SO4 2- )に対し, ベンゼン環を有する芳香族系の方
が, さらに1桁程度安定性が向上する。これは芳香環の
導入により,大きな異方性を実現できるためであると考
えられ,アニオンに対してこのような自由度を与えられ
るのは,実用的にスルホン酸系が最も適している。ま
た,スルホン酸で修飾した有機分子は作製は,他のイオ
ンのものに比べて容易である。 (2) 電気めっきは, 0.3 V 以下の電圧で金属が析出する
めっき液を用いること及びこのめっきを行った後,0.3
V 以上の電圧で金属が析出するめっき液を用いてめっき
を行うことについて,その原理,作用について説明す
る。
Further, even with the same sulfonic acid system, the stability of the aromatic system having a benzene ring is improved by about one digit with respect to the minimum ion (SO 4 2− ). This is considered to be because the introduction of an aromatic ring can realize a large anisotropy, and the sulfonic acid system is practically most suitable for giving such a degree of freedom to the anion. In addition, organic molecules modified with sulfonic acid are easier to produce than those with other ions. (2) For electroplating, use a plating solution that deposits metal at a voltage of 0.3 V or less, and perform 0.3% after performing this plating.
The principle and action of plating using a plating solution that deposits metal at a voltage of V or higher will be described.

【0024】めっきの操作は本質的に金属の還元・析出
を行うことであり,被めっき物の近傍には電気化学的に
還元性の雰囲気が形成される。このとき,本発明で使用
される導電性高分子においては,主鎖の還元及びドーパ
ントの離脱が並行して且つ競合して起きる。導電性高分
子主鎖の還元及びドーパントの離脱により,導電性は2
〜8桁低下することが起こるため,導電性高分子にめっ
きを施す場合には,いかに導電性高分子を還元しないで
めっきを進めるかが重要な点である。
The plating operation is essentially to reduce and deposit the metal, and an electrochemically reducing atmosphere is formed in the vicinity of the object to be plated. At this time, in the conductive polymer used in the present invention, reduction of the main chain and elimination of the dopant occur in parallel and in competition. Due to the reduction of the main chain of the conductive polymer and the removal of the dopant, the conductivity becomes 2
When the conductive polymer is plated, the important point is how to proceed with the plating without reducing the conductive polymer because the conductive polymer drops by 8 digits.

【0025】図4はめっき液とポリアニリンの酸化還元
挙動を示す図である。図は,めっき液の種類に対する電
圧−電流(Current) の関係,及び導電性高分子(ポリア
ニリン)にドープしたドーパントの種類に対する電圧−
電流(Current2)の関係を示す。
FIG. 4 is a diagram showing the redox behavior of the plating solution and polyaniline. The figure shows the relationship between the voltage and current (Current) with respect to the type of plating solution, and the voltage with respect to the type of dopant doped in the conductive polymer (polyaniline).
Shows the relationship of current (Current2).

【0026】横軸はAg/AgCl 基準電極に対する電圧(mV)
で, マイナス側が還元,プラス側が酸化になる。めっき
液1では,還元電流(析出を伴う)が−0.25 V付近から
流れ始めているが, めっき液2では 0 Vを切った瞬間か
ら流れ始めている。
The horizontal axis represents the voltage (mV) with respect to the Ag / AgCl reference electrode.
Then, the negative side is reduction and the positive side is oxidation. In plating solution 1, the reduction current (with deposition) begins to flow from around −0.25 V, but in plating solution 2, it begins to flow from the moment when 0 V is cut off.

【0027】一方, PTS(p-トルエンスルホン酸;芳香族
系ドーパント) あるいは HBF4 の2種類のドーパントは
いずれも,0 V 近傍では既に電流が流れており,−0.3
V 以下でピークを示し,還元反応が進んでいることがわ
かる。
On the other hand, both of PTS (p-toluenesulfonic acid; aromatic dopant) and HBF 4 have two kinds of dopants in which a current is already flowing near 0 V, and −0.3
A peak is shown below V, indicating that the reduction reaction is proceeding.

【0028】このようにめっき液の種類 (液のpHや光沢
剤等の添加物の有無) により, 金属が析出する電位が異
なり,経験的には0.1 V 程度以下のめっき電圧で析出す
ることが, スルーホールめっき膜を得るために重要とな
る。この場合はめっき液2がこの条件を満たすことにな
る。また,逆に図示されるように, −0.3 V 以下の電圧
では, 導電性高分子が十分に還元される電位であり,め
っき膜が析出する以前に導電性が失われる。その結果,
金属の析出は困難となる。
As described above, the potential at which the metal is deposited varies depending on the type of plating solution (pH of the solution and the presence or absence of additives such as brighteners), and empirically it can be deposited at a plating voltage of about 0.1 V or less. Therefore, it is important to obtain a through-hole plating film. In this case, the plating solution 2 satisfies this condition. On the contrary, as shown in the figure, at a voltage of −0.3 V or less, the potential is sufficient to reduce the conductive polymer, and the conductivity is lost before the plating film is deposited. as a result,
Precipitation of metal becomes difficult.

【0029】以上が−0.3 V の根拠であり,めっき電圧
が0.3 V 以下の電圧であることが,導電性高分子膜の導
電性を失わないための必要条件と考えられる。また,導
電性高分子上に,わずかな厚みでも金属が成膜される
と,ここを通じて電流が流れるので,めっき電圧を0.3
V 以上に上げても全く構わなくなり,どのようなめっき
液でも選択可能となる。
The above is the reason for -0.3 V, and the plating voltage of 0.3 V or less is considered to be a necessary condition for not losing the conductivity of the conductive polymer film. Also, if a metal is deposited on the conductive polymer with a small thickness, a current will flow through it, so the plating voltage will be 0.3
It does not matter at all if the voltage is higher than V, and any plating solution can be selected.

【0030】[0030]

【発明の実施の形態】図1は本発明の実施の形態の説明
図である。図1(A) において,まず回路を作製する基板
を用意する。ここで, 1は絶縁性基板, 2は配線用の金
属箔である。
FIG. 1 is an explanatory diagram of an embodiment of the present invention. In FIG. 1 (A), first, a substrate on which a circuit is manufactured is prepared. Here, 1 is an insulating substrate, and 2 is a metal foil for wiring.

【0031】図1(B) において,スルーホール 3をドリ
ルで穿孔する。この直径は通常 0.3〜1 mmで, プリント
板の性質や実装密度に合わせて適宜決める。この後, 基
板をアルカリ洗浄剤等でクリーニングする。
In FIG. 1B, the through hole 3 is drilled. This diameter is usually 0.3 to 1 mm, and is appropriately determined according to the properties and mounting density of the printed board. After that, the substrate is cleaned with an alkaline cleaner or the like.

【0032】図1(C) において,スルーホールめっきの
密着性改善のため下地処理として,下地処理剤 4を反応
させてスルーホール内部の表面を活性化する。処理剤と
しては,一般的に分子の両末端に反応性を有する分子,
例えばシランカップリング剤, チタンカップリング剤等
の金属カップリング剤や, ジビニルベンゼン, N,N'−ビ
スアクリルアミド等の二官能性分子を用いることができ
る。
In FIG. 1 (C), in order to improve the adhesion of the through hole plating, the surface treatment agent 4 is reacted to activate the surface inside the through hole as the surface treatment. As the treating agent, generally, a molecule having reactivity at both ends of the molecule,
For example, a metal coupling agent such as a silane coupling agent or a titanium coupling agent, or a bifunctional molecule such as divinylbenzene or N, N'-bisacrylamide can be used.

【0033】図1(D) において,スルーホール内に導電
性高分子の溶液を塗布して, 導電性高分子層 5を形成す
る。導電性高分子はポリアニリン等, 溶媒に可溶性の導
電性高分子であり,その導電率は0.01 S/cm 以上である
ことが望ましい。導電性高分子層 5の膜厚は 0.1〜10μ
mである。
In FIG. 1D, a conductive polymer solution is applied in the through holes to form a conductive polymer layer 5. The conductive polymer is a solvent-soluble conductive polymer such as polyaniline, and its conductivity is preferably 0.01 S / cm or more. The thickness of the conductive polymer layer 5 is 0.1 to 10μ
m.

【0034】図1(E) において,一般的に溶媒に可溶な
状態では導電性に乏しいため, ドーピング処理を行う。
ドーパントとしてスルホン系ドーパントの使用が望まし
い。具体的にはメタンスルホン酸, ビニルスルホン酸等
の脂肪族スルホン酸や, p−トルエンスルホン酸, ナフ
タレンスルホン酸, アントラキノンスルホン酸等の芳香
族スルホン酸等を使用できる。このドーピング処理によ
りスルーホール内は高度に導電化される。
In FIG. 1 (E), since the conductivity is generally poor in the state of being soluble in the solvent, the doping process is performed.
It is desirable to use a sulfone-based dopant as the dopant. Specifically, aliphatic sulfonic acids such as methanesulfonic acid and vinylsulfonic acid, and aromatic sulfonic acids such as p-toluenesulfonic acid, naphthalenesulfonic acid and anthraquinonesulfonic acid can be used. The doping process makes the inside of the through hole highly conductive.

【0035】図1(F) において,めっき槽に基板を浸漬
し, 1〜10 mA/cm2 程度の電流密度でめっき処理を行
う。めっき膜の厚さは 5〜50μmの間で適当な値を選ぶ
ことができる。めっきは銅, 銀, ニッケル, パラジウム
等の金属を用いる。
In FIG. 1 (F), the substrate is dipped in a plating bath and plated at a current density of about 1 to 10 mA / cm 2 . The thickness of the plating film can be selected to be an appropriate value between 5 and 50 μm. Metals such as copper, silver, nickel and palladium are used for plating.

【0036】この場合, めっき電圧が0.3 V 以下, 好ま
しくは0.1 V 以下で金属が析出するめっき液を使用する
必要がある。例えば, 銅めっきの場合, めっき液のpHは
2〜8,望ましくは 3〜6 であることが必要である。
In this case, it is necessary to use a plating solution that deposits metal at a plating voltage of 0.3 V or less, preferably 0.1 V or less. For example, in the case of copper plating, the pH of the plating solution is
It should be 2 to 8, preferably 3 to 6.

【0037】この理由は,スルーホール内に形成された
導電性高分子の膜はpHが高いと脱ドーパントが促進さ
れ,導電性が低下するためである。逆にpHが低い場合に
は大きなめっき過電圧が必要となり,導電性高分子膜表
面に銅が析出する前に, 導電性高分子が電気化学的な還
元作用を受け, 主鎖の還元と同時にドーパントの離脱が
生じてやはり導電性が低下するためである。
The reason for this is that the conductive polymer film formed in the through holes has a high pH, which promotes dedopant and lowers the conductivity. On the other hand, when the pH is low, a large plating overvoltage is required.Before copper is deposited on the surface of the conductive polymer film, the conductive polymer undergoes an electrochemical reduction action, reducing the main chain and simultaneously reducing the dopant. The reason for this is that the electroconductivity also drops due to the separation of

【0038】また,上記のようなめっき処理を施した
後, めっき電圧の大きなめっき液中で再度メッキ処理を
施してもよい。例えば, 表面光沢剤が添加されためっき
液中や,零以下の十分に低いpHに調整された強酸性のめ
っき液を使用することができる。これにより,表面光沢
や膜厚の均一なめっきを施すことができる。
After the above-described plating treatment is performed, the plating treatment may be performed again in a plating solution having a high plating voltage. For example, it is possible to use a plating solution containing a surface brightener or a strongly acidic plating solution adjusted to a sufficiently low pH of zero or less. This makes it possible to perform plating with a uniform surface gloss and uniform film thickness.

【0039】次に, 上記の工程に従ったいくつかの実施
の形態について説明する。 実施の形態1:1N 塩酸酸性の 0.2M アニリン水溶液
に,アニリンと等モルの過硫酸アンモニウムを添加し,
−5 ℃で化学重合することで溶媒可溶性のポリアニリン
を得た。このポリアニリンをアンモニア水溶液中で煮沸
還流した後, ヒドラジンで還元し,純水で洗浄し,加熱
乾燥して, 脱ドーピングされた還元体を得る。
Next, some embodiments according to the above steps will be described. Embodiment 1: To a 0.2 M aniline aqueous solution that is acidic with 1 N hydrochloric acid, ammonium persulfate that is equimolar to aniline is added,
Solvent-soluble polyaniline was obtained by chemical polymerization at -5 ° C. This polyaniline is boiled under reflux in an aqueous ammonia solution, then reduced with hydrazine, washed with pure water, and dried by heating to obtain the dedoped dope.

【0040】次に, 厚さ1.6 mmのガラスエポキシからな
る4層基板に,直径0.5 mmのスルーホールを開けた基板
を用意し,スルーホール内をアルカリ洗浄剤で10分間超
音波洗浄した後, アセトンで30秒間リンスし, 100 ℃で
10分間の加熱乾燥をする。
Next, a substrate having a through hole with a diameter of 0.5 mm opened in a four-layer substrate made of glass epoxy with a thickness of 1.6 mm was prepared, and the inside of the through hole was ultrasonically cleaned with an alkaline cleaning agent for 10 minutes. Rinse with acetone for 30 seconds at 100 ° C
Heat dry for 10 minutes.

【0041】この基板をシランカップリング剤 (信越化
学:KBM-403)の 3%トルエン溶液に5分間浸漬した後に,
清浄なトルエンでリンスし,100 ℃で10分間の乾燥を
する。この基板に, 前記のポリアニリン1部を N−メチ
ル−2−ピロリドン99部に溶解して得た溶液をディップ
コート法で塗布し,100 ℃で30分間の加熱乾燥をする。
乾燥後,銅箔の平面部に塗布されたポリアニリンを研磨
によって除去する。
After dipping this substrate in a 3% toluene solution of a silane coupling agent (Shin-Etsu Chemical: KBM-403) for 5 minutes,
Rinse with clean toluene and dry at 100 ° C for 10 minutes. A solution obtained by dissolving 1 part of the above polyaniline in 99 parts of N-methyl-2-pyrrolidone is applied to this substrate by a dip coating method, and dried by heating at 100 ° C. for 30 minutes.
After drying, the polyaniline applied to the flat surface of the copper foil is removed by polishing.

【0042】次に,メタンスルホン酸1部,過酸化水素
水2部を炭酸プロピレン20部に溶解したドーピング溶液
に基板を浸漬し,10分間放置した。その後, イソプロピ
ルアルコールで洗浄し,80℃で10分間乾燥する。
Next, the substrate was immersed in a doping solution prepared by dissolving 1 part of methanesulfonic acid and 2 parts of hydrogen peroxide in 20 parts of propylene carbonate and left for 10 minutes. Then, wash with isopropyl alcohol and dry at 80 ° C for 10 minutes.

【0043】次のめっき工程では,硫酸銅25部を水 100
部に溶解した水溶液を作製してめっき液とする。この溶
液中に上記の工程でスルーホール内を導電化処理した基
板を浸漬し, 10mA/cm2の電流密度で30分間のめっき処理
を行う。
In the next plating step, 25 parts of copper sulfate was mixed with 100 parts of water.
A plating solution is prepared by preparing an aqueous solution dissolved in the part. The substrate whose inside of the through-hole has been made conductive in the above process is immersed in this solution, and plating is performed for 30 minutes at a current density of 10 mA / cm 2 .

【0044】実施の形態2:洗浄後の基板を硬化剤用ビ
スエポキシプライマの 5%トルエン溶液で処理する。そ
の他の工程は実施の形態1と同様に導電性高分子層の形
成及びめっき処理を行い,スルーホールめっきされた基
板を作製する。
Embodiment 2: A substrate after cleaning is treated with a 5% toluene solution of a bis-epoxy primer for a curing agent. In the other steps, the conductive polymer layer is formed and plated in the same manner as in Embodiment 1, and a through-hole plated substrate is manufactured.

【0045】実施の形態3:実施の形態1と同様に作製
した導電性高分子層のドーピング処理剤として,2−ナ
フタレンスルホン酸の10%水溶液を使用する。その他の
工程は実施の形態1と同様である。
Embodiment 3: A 10% aqueous solution of 2-naphthalenesulfonic acid is used as a doping treatment agent for the conductive polymer layer produced in the same manner as in Embodiment 1. Other steps are the same as those in the first embodiment.

【0046】実施の形態4:実施の形態1と同様に作製
した導電性高分子層上に,めっき工程として硫酸銅25部
を水 100部に溶解した水溶液を作製してめっき液とす
る。この溶液中に上記の工程でスルーホール内を導電化
処理した基板を浸漬し, 10mA/cm2の電流密度で10分間の
めっき処理を行う。
Fourth Embodiment: A plating solution is prepared by preparing an aqueous solution prepared by dissolving 25 parts of copper sulfate in 100 parts of water on the conductive polymer layer prepared in the same manner as in the first embodiment. In this solution, the substrate whose inside of the through-hole has been made conductive in the above step is immersed, and plating is performed for 10 minutes at a current density of 10 mA / cm 2 .

【0047】次に, 硫酸銅25部及び硫酸20部を水 100部
に溶解し, 光沢剤としてパラトルエンスルホンアミド 1
部と 2−ブチン−1,4 ジオール 0.5 部を添加しためっ
き液中で,10mA/cm2の電流密度で30分間のめっき処理を
行う。
Next, 25 parts of copper sulfate and 20 parts of sulfuric acid were dissolved in 100 parts of water, and paratoluenesulfonamide 1 was added as a brightener.
And 0.5 parts of 2-butyne-1,4 diol are added to the plating solution for 30 minutes at a current density of 10 mA / cm 2 .

【0048】上記実施の形態のいずれの場合にも,めっ
き処理後のスルーホール内には約 5μmの銅箔が均一に
且つ確実に析出していた。このスルーホールの引き抜き
強度を調べた結果, 未処理の基板では引き抜き強度が 5
kgfであったが,上記の実施の形態ではいずれの場合も
15 kgfに向上し,めっきの密着性が改善された。
In each of the above-mentioned embodiments, the copper foil of about 5 μm was uniformly and surely deposited in the through hole after the plating treatment. As a result of examining the pull-out strength of this through hole, the pull-out strength was 5
Although it was kgf, in any of the above embodiments,
The adhesion was improved to 15 kgf and the plating adhesion was improved.

【0049】[0049]

【発明の効果】本発明によれば,従来のスルーホールめ
っき処理に必要であった貴金属や揮発性, 毒性の強いホ
ルマリン等を使用しないで,密着性が良く高信頼性のス
ルーホールめっきが実現できる。この結果, コストの低
減と環境保全に寄与することができる。
EFFECTS OF THE INVENTION According to the present invention, through-hole plating with good adhesion and high reliability can be realized without using precious metals, formalin, which has a strong volatility and toxicity, which are required for conventional through-hole plating processing. it can. As a result, it can contribute to cost reduction and environmental protection.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施の形態の説明図FIG. 1 is an explanatory diagram of an embodiment of the present invention.

【図2】 抵抗率の変化を測定するための電極の構成図FIG. 2 is a schematic diagram of electrodes for measuring changes in resistivity.

【図3】 ドーパントと抵抗安定性の関係を示す図FIG. 3 is a diagram showing a relationship between a dopant and resistance stability.

【図4】 めっき液とポリアニリンの酸化還元挙動を示
す図
FIG. 4 is a diagram showing the redox behavior of a plating solution and polyaniline.

【符号の説明】[Explanation of symbols]

1 絶縁性基板 2 配線で銅箔 3 スルーホール 4 下地処理剤 5 導電性高分子層 6 電気めっき金属層 11 石英板 12, 13 電極 1 Insulating substrate 2 Copper foil for wiring 3 Through hole 4 Base treatment agent 5 Conductive polymer layer 6 Electroplated metal layer 11 Quartz plate 12, 13 Electrode

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 絶縁性基板のめっき部を1分子中に複数
の反応基を有する試薬で処理して未ドープ状態の導電性
高分子層を形成し,該導電性高分子層にドーパントを作
用させて導電化し,金属イオンを溶解しためっき液中に
該基板を浸漬して該導電性高分子層上に電気めっきを行
うことを特徴とするプリント配線基板の製造方法。
1. A plating part of an insulating substrate is treated with a reagent having a plurality of reactive groups in one molecule to form an undoped conductive polymer layer, and a dopant acts on the conductive polymer layer. A method for producing a printed wiring board, characterized in that the substrate is immersed in a plating solution in which it is made conductive and the metal ions are dissolved, and electroplating is performed on the conductive polymer layer.
【請求項2】 前記導電性高分子層がポリアニリンまた
はその誘導体からなり,前記ドーパントとして脂肪族ス
ルホン酸または芳香族スルホン酸を用いることを特徴と
する請求項1記載のプリント配線基板の製造方法。
2. The method for manufacturing a printed wiring board according to claim 1, wherein the conductive polymer layer is made of polyaniline or a derivative thereof, and aliphatic sulfonic acid or aromatic sulfonic acid is used as the dopant.
【請求項3】 前記電気めっきは, 0.3 V 以下の電圧で
金属が析出するめっき液を用いることを特徴とする請求
項1記載のプリント配線基板の製造方法。
3. The method for producing a printed wiring board according to claim 1, wherein the electroplating uses a plating solution in which a metal is deposited at a voltage of 0.3 V or less.
【請求項4】 前記電気めっきは, 請求項4記載のめっ
きを行った後,0.3V 以上の電圧で金属が析出するめっ
き液を用いてめっきを行うことを特徴とするプリント配
線基板の製造方法。
4. The method of manufacturing a printed wiring board, comprising: performing the electroplating according to claim 4 and then using a plating solution in which a metal is deposited at a voltage of 0.3 V or more. .
【請求項5】 前記めっき部がスルーホール内であるこ
とを特徴とする請求項1乃至5記載のプリント配線基板
の製造方法。
5. The method for manufacturing a printed wiring board according to claim 1, wherein the plated portion is in a through hole.
JP2810596A 1996-02-15 1996-02-15 Manufacture of printed wiring board Withdrawn JPH09223858A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2810596A JPH09223858A (en) 1996-02-15 1996-02-15 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2810596A JPH09223858A (en) 1996-02-15 1996-02-15 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPH09223858A true JPH09223858A (en) 1997-08-26

Family

ID=12239539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2810596A Withdrawn JPH09223858A (en) 1996-02-15 1996-02-15 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPH09223858A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100832641B1 (en) * 2007-01-03 2008-05-27 삼성전기주식회사 Fabricating method of printed circuit board
WO2010022009A2 (en) * 2008-08-18 2010-02-25 Novellus Systems, Inc. Process for through silicon via filling
JP2010210829A (en) * 2009-03-09 2010-09-24 Asahi Kasei E-Materials Corp Wire grid polarizing plate with high durability
US9109295B2 (en) 2009-10-12 2015-08-18 Novellus Systems, Inc. Electrolyte concentration control system for high rate electroplating
KR20150118762A (en) * 2014-04-15 2015-10-23 삼성전기주식회사 Core substrate and method of manufacturing core substrate
US10472730B2 (en) 2009-10-12 2019-11-12 Novellus Systems, Inc. Electrolyte concentration control system for high rate electroplating
US10692735B2 (en) 2017-07-28 2020-06-23 Lam Research Corporation Electro-oxidative metal removal in through mask interconnect fabrication

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100832641B1 (en) * 2007-01-03 2008-05-27 삼성전기주식회사 Fabricating method of printed circuit board
US8043967B2 (en) 2008-08-18 2011-10-25 Novellus Systems, Inc. Process for through silicon via filling
WO2010022009A3 (en) * 2008-08-18 2010-05-14 Novellus Systems, Inc. Process for through silicon via filling
US7776741B2 (en) 2008-08-18 2010-08-17 Novellus Systems, Inc. Process for through silicon via filing
CN102124551A (en) * 2008-08-18 2011-07-13 诺发系统有限公司 Process for through silicon via filling
WO2010022009A2 (en) * 2008-08-18 2010-02-25 Novellus Systems, Inc. Process for through silicon via filling
KR101105485B1 (en) * 2008-08-18 2012-01-13 노벨러스 시스템즈, 인코포레이티드 Process for through silicon via filling
US8722539B2 (en) 2008-08-18 2014-05-13 Novellus Systems, Inc. Process for through silicon via filling
JP2010210829A (en) * 2009-03-09 2010-09-24 Asahi Kasei E-Materials Corp Wire grid polarizing plate with high durability
US9109295B2 (en) 2009-10-12 2015-08-18 Novellus Systems, Inc. Electrolyte concentration control system for high rate electroplating
US10472730B2 (en) 2009-10-12 2019-11-12 Novellus Systems, Inc. Electrolyte concentration control system for high rate electroplating
KR20150118762A (en) * 2014-04-15 2015-10-23 삼성전기주식회사 Core substrate and method of manufacturing core substrate
US10692735B2 (en) 2017-07-28 2020-06-23 Lam Research Corporation Electro-oxidative metal removal in through mask interconnect fabrication
US11610782B2 (en) 2017-07-28 2023-03-21 Lam Research Corporation Electro-oxidative metal removal in through mask interconnect fabrication

Similar Documents

Publication Publication Date Title
US5620800A (en) Laminated structure of a metal layer on a conductive polymer layer and method of manufacturing such a structure
Steppan et al. A review of corrosion failure mechanisms during accelerated tests: electrolytic metal migration
JP4647412B2 (en) Tin-coated printed wiring board with less tendency to form whiskers
US5447824A (en) Method of manufacturing a pattern of an electrically conductive polymer on a substrate surface and method of metallizing such a pattern
US5242713A (en) Method for conditioning an organic polymeric material
JP2768390B2 (en) Method of conditioning a substrate for electroless metal deposition
KR20140129308A (en) Self-deposition type surface treatment agent for copper and method for manufacturing copper-containing substrate provided with resin coating film
CN106350788A (en) Chemical plating front surface modifying system and surface modifying method of organic polymer base material
KR900003158B1 (en) Method for producing electric circuits an a base board
JPH09223858A (en) Manufacture of printed wiring board
KR19980081191A (en) Conductive paste, manufacturing method thereof and printed wiring board using the same
KR900001840B1 (en) Forming method for conductive circuit on substrate
EP0615257B1 (en) Method of manufactoring a laminated structure of a metal layer on a conductive polymer layer
KR101619109B1 (en) Biosensor Electrode Strip and Manufacturing Method Thereof
US5135779A (en) Method for conditioning an organic polymeric material
JP2000286531A (en) Manufacture of printed wiring board
JP3824342B2 (en) Manufacturing method of surface printed wiring board (SLC)
Li et al. Activation of non-metallic substrates for metal deposition using organic solutions
JP4632580B2 (en) Method for forming conductive film on resin substrate
JP5311070B2 (en) Metalized polyimide film and evaluation method thereof
JPH0680894B2 (en) Metal core printed circuit board manufacturing method
JPH0373503A (en) Formation of circuit
JPH04186893A (en) Manufacture of circuit wiring board
JP2000178753A (en) Electroless plating method
JP3210804B2 (en) Method of forming conductive circuit

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20030506