JPH09219602A - High frequency semiconductor switch circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency semiconductor switch circuit which has large isolation and has low loss by a simple constitution. SOLUTION: This circuit is provided with an input terminal 1, an output terminal 2 and a control terminal 3 for impressing the control signal for controlling the on/off of the high frequency semiconductor switch circuit connected with the input terminal 1 and the output terminal 2. At this time, a pair of electrodes except the gates of an electric field-effect transistor 4 which are connected with the control terminal 3 are made the input terminal 1 and the output terminal 2, respectively. Between the input terminal 1 and the output terminal 2, the serial circuit of a first transmission line 5 and a second transmission line 6 is connected. Between the connection point 30 of the first transmission line 5 and the second transmission line 6 and ground, a resistance element 7 is connected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency semiconductor switch circuit used in a high frequency band such as a microwave band and a millimeter wave band.

[0002]

2. Description of the Related Art A conventional high-frequency semiconductor switch circuit generally has a structure in which semiconductor elements are connected in series or in parallel with a signal line and several circuits are stacked. FIG. 4 shows a configuration example of a conventional high-frequency semiconductor switch circuit using a field effect transistor (hereinafter referred to as FET).

As shown in FIG. 4, the input terminal 1 is FET1.
7 is connected to the output terminal 2 via the drain and source of FET 7 and the drain and source of FET 18. FET17
The gate of the FET 18 is connected to the control terminal 14 via the resistance element 20, while the gate of the FET 18 is connected to the control terminal 16 via the resistance element 22. Further, the source of the FET 17 is grounded via the drain and source of the FET 19, and the gate of the FET 19 is connected to the control terminal 15 via the resistance element 21. By applying 0V to each of the control terminals 14 and 16, both the FET 17 and the FET 18 are turned on, and by applying a negative voltage higher than the pinch-off voltage of the FET 19 to the control terminal 15, F
The switch circuit is turned on when the ET 19 is turned off. On the other hand, FET1 is connected to the control terminals 14 and 16 respectively.
The FETs 17 and 18 are both turned off by applying a negative voltage equal to or higher than the pinch-off voltage of 7 and 18, and 0V is applied to the control terminal 15.
When T19 is turned on, the switch circuit is turned off.

[0004]

FIG. 5 shows an example of simulation results of the conventional switch circuit shown in FIG. In the high-frequency semiconductor switch circuit of the conventional example, the FETs 17 and 18 are parasitic due to their parasitic capacitances.
Signal leaks to output terminal 2 when is off. For this reason,
There is a limit to the value that the pass loss ratio between on and off (hereinafter referred to as isolation) can take. In order to achieve higher isolation, it is sufficient to increase the number of stages as a switch, but in such a case, there is a problem that the passage loss when the switch is turned on increases and the circuit area also increases.

An object of the present invention is to solve the above problems and to provide a high frequency semiconductor switch circuit which has a large isolation as compared with the conventional example and has a simple structure and a low loss.

[0006]

A high frequency semiconductor switch circuit according to the present invention turns on / off an input terminal, an output terminal, and a high frequency semiconductor switch circuit connected between the input terminal and the output terminal. In a high frequency semiconductor switch circuit including a control terminal for applying a control signal for controlling, an FE having a gate connected to the control terminal
A pair of electrodes other than the gate of T are used as an input terminal and an output terminal, respectively, and a first electrode is provided between the input terminal and the output terminal.
Connecting a series circuit of the transmission line and the second transmission line, and connecting a resistance element between a connection point between the first transmission line and the second transmission line and ground. And

In the high frequency semiconductor switch circuit configured as described above, the switch circuit is turned on or off by controlling the voltage of the control terminal. When the switch circuit is off, a predetermined parallel resonance frequency is obtained. A kind of parallel resonance trap circuit having is formed, and a large isolation can be obtained in the vicinity of the parallel frequency.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1A is a circuit diagram showing a high frequency semiconductor switch circuit according to an embodiment of the present invention, and FIG. 1B is a circuit diagram showing an equivalent circuit when the switch circuit of FIG. 1A is off. FIG. 1C is a circuit diagram showing an equivalent circuit when the switch circuit of FIG. 1A is turned on.

As shown in FIG. 1A, the high frequency semiconductor switch circuit of the present embodiment has a high frequency semiconductor switch connected between an input terminal 1, an output terminal 2, and an input terminal 1 and an output terminal 2. In a high-frequency semiconductor switch circuit having a control terminal 3 for applying a control signal for controlling ON / OFF of the circuit, a pair of electrodes other than the gate of the FET 4 whose gate is connected to the control terminal 3 are provided respectively. An input terminal 1 and an output terminal 2, and a series circuit of a transmission line 5 and a transmission line 6 is connected between the input terminal 1 and the output terminal 2 to connect the first transmission line 5 and the second transmission line 6. The resistance element 7 is connected between the connection point 30 and the ground.

In FIG. 1A, the input terminal 1 is an FE
It is connected to the output terminal 2 via the drain and source of T4, and is also connected to the output terminal 2 via the series circuit of the transmission line 5 and the transmission line 6. The gate of the FET 4 is connected to the control terminal 3 via the resistance element 8. A DC power supply (not shown) is connected to the control terminal 3, and a control voltage for turning on or off the switch circuit is applied. The connection point 30 between the transmission line 5 and the transmission line 6 is grounded via the resistance element 7 having the resistance value R7.

In the switch circuit of this embodiment configured as described above, by applying 0V or a negative voltage higher than the pinch-off of the FET 4 to the control terminal 3, the FET 6 is turned on or off, and the switching circuit is switched. Perform an action. In this switch circuit, F
When the ET4 is turned on, the input / output terminals of the switch circuit are turned on, while when the FET4 is turned off, the input / output terminals of the switch circuit are turned off.

FIG. 1B is a circuit diagram showing an equivalent circuit when the switch circuit of FIG. 1A is off, and FIG.
FIG. 3 is a circuit diagram showing an equivalent circuit when the switch circuit of FIG. In FIGS. 1B and 1C, the transmission lines 5 and 6 operate equivalently as the inductors (L), so that the inductors 11 and 12 are equivalently represented. Further, 9 is an equivalent off resistance of the FET 4, and 10 is an equivalent off capacitance of the FET 4.

As is apparent from FIG. 1B, this switch circuit has an equivalent off-capacitance 10 and two parallel circuits of two inductors 11 and 12 between the input terminal 1 and the output terminal 2. , Operates as a kind of parallel resonance trap circuit having a predetermined parallel resonance frequency f ₀ . As a result, the passage loss becomes extremely large at the parallel resonance frequency f ₀ . Therefore, the isolation becomes larger than that of the conventional example. The parallel resonance frequency f ₀ can be expressed by the following equation.

[0014]

[Formula 1] f ₀ = 1 / [2π√ {(L ₁₁ + L ₁₂ ) · C ₁₀ }]

Here, L ₁₁ and L ₁₂ are the inductances of the equivalent inductors 11 and 12, respectively, and C ₁₀ is the capacitance of the equivalent off capacitance 10. Therefore, if the value of the inductor, that is, the impedance of the transmission line and the line length are appropriately selected, the input terminal 1 and the output terminal 2 are opened at a target frequency equal to the parallel resonance frequency f ₀ . The switch circuit is turned off. However, the equivalent off-resistance 9 is placed between the input terminal 1 and the output terminal 2.
Therefore, the ideal open state does not occur, and the pass loss at the parallel resonance frequency f ₀ becomes smaller than that in the ideal state. Therefore, in the present invention, the resistance element 7
A larger passage loss, that is, isolation, is obtained by connecting the.

[0016]

EXAMPLE FIG. 2 shows an example of the simulation result of the passage loss of the equivalent circuit (FIG. 1C) at the time of turning off when the value of the resistance element 9 is changed. In the simulation, the circuit constant of each element was set as follows. (A) The gate length Lg = 0.2 μm and the gate width Wg = 100 μ of the FET 4 formed on a GaAs semiconductor substrate having a thickness of 450 μm and a relative dielectric constant εr = 12.6.
m, resistance value of equivalent off resistance 9 of FET4 = 700Ω, resistance value of equivalent on resistance 13 = 5Ω; (b) resistance value of resistance element 8 = 2 kΩ; (c) ground conductor is formed on the GaAs semiconductor substrate. Then, the relative permittivity ε having a thickness of 10 μm on the ground conductor.
A dielectric layer of r = 3.7 is formed, and on the dielectric layer,
Transmission lines 5 and 6 formed by forming microstrip conductors
Width W = 6 μm, length L = 350 μm, inductance of equivalent inductors 11 and 12 = 0.11 nH; and (d) resistance value R7 = 300Ω of resistance element 7, resistance value R7 = 200Ω or ∞Ω of comparative example. ..

As is apparent from FIG. 2, by selecting the resistance value R7 of the resistance element 7 appropriately, it is possible to obtain extremely large isolation as compared with the conventional example.

Next, FIG. 1C shows an equivalent circuit of the high frequency semiconductor switch circuit of the present invention shown in FIG. Here, 13 is the equivalent ON resistance of the FET 4. Here, since the resistance value of the equivalent on-resistance 13 is generally several Ω, the input terminal 1 and the output terminal 2 are almost short-circuited, and the switch circuit is on.

FIG. 3 shows an example of simulation results of the high frequency semiconductor switch circuit of the present invention shown in FIG. It can be seen from FIG. 3 that the high-frequency semiconductor switch according to the present invention can achieve greater isolation at a desired operating frequency than the conventional high-frequency semiconductor switch circuit (FIG. 5).

[0020]

As described above in detail, according to the high frequency semiconductor switch circuit of the present invention, the input terminal, the output terminal, and the high frequency semiconductor switch circuit connected between the input terminal and the output terminal are provided. In a high-frequency semiconductor switch circuit having a control terminal for applying a control signal for controlling on / off, a pair of electrodes other than the gate of a field effect transistor whose gate is connected to the control terminal are input terminals. An output terminal, and a series circuit of a first transmission line and a second transmission line is connected between the input terminal and the output terminal, and the first transmission line and the second transmission line are connected to each other. A resistance element was connected between the connection point between and and the ground. As described above, the present invention has an extremely simple circuit configuration, can be manufactured in a small size and a light weight, and can obtain greater isolation than the conventional example.

[Brief description of drawings]

FIG. 1A is a circuit diagram showing a high frequency semiconductor switch circuit according to an embodiment of the present invention, and FIG. 1B is a circuit diagram showing an equivalent circuit when the switch circuit of FIG. Yes, (c) is a circuit diagram showing an equivalent circuit when the switch circuit of (a) is on.

FIG. 2 is a graph showing a frequency characteristic of a passage loss which is a simulation result of an equivalent circuit when the resistance value of the resistance element 9 is changed when the switch circuit of FIG. 1A is off.

FIG. 3 is a graph showing a frequency characteristic of pass loss which is a simulation result of an equivalent circuit when the switch circuit of FIG. 1A is on and off.

FIG. 4 is a circuit diagram showing a configuration of a conventional high frequency semiconductor switch circuit.

5 is a graph showing a frequency characteristic of a passage loss which is a simulation result of the conventional switch circuit shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Input terminal, 2 ... Output terminal, 3 ... Control terminal, 4 ... FET, 5, 6 ... Transmission line, 7, 8 ... Resistor element, 9 ... FET equivalent off resistance, 10 ... FET equivalent off capacitance, 11 , 12 ... Equivalent inductor of transmission line, 13 ... Equivalent on-resistance of FET, 30 ... Connection point.

Claims (1)

[Claims] 1. An input terminal, an output terminal, and a control terminal for applying a control signal for controlling ON / OFF of a high-frequency semiconductor switch circuit connected between the input terminal and the output terminal. In a high-frequency semiconductor switch circuit including, a pair of electrodes other than the gate of the field effect transistor whose gate is connected to the control terminal are used as an input terminal and an output terminal, respectively. Connecting a series circuit of the first transmission line and the second transmission line, and connecting a resistance element between the connection point between the first transmission line and the second transmission line and the ground. Characteristic high frequency semiconductor switch circuit.