JPH09212134A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device reduced in power consumption, fast in renewal of display memory and improved in the performance of the device. SOLUTION: The CPU 24 renews the displayed content of the internal memory 29 for the external display memory 11 which is faster than the memory 29 by installing a means which transfers the content of the memory 11 to the memory 29 after renewing the memory 11 allotted to the memory region of the CPU 24 and the memories, 29 and 11, built in the liquid crystal display module. And a transfer means transfers the display data of at least the renewed portion of the memory 11 to the memory 29.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention provides a liquid crystal display device which has low power consumption and can shorten the time for updating the contents of the display memory.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display device is used as a display device, and a portable terminal that drives a system with a battery has been commercialized. Along with this, it has been a problem to extend the battery life by using a liquid crystal display device with low power consumption. As a technology for reducing the power consumption of the liquid crystal display device, Hitachi manufactured liquid crystal driver HD66520, HD
There is a liquid crystal display device using 66503 (described in the March 1995 data sheet). FIG. 2 shows a liquid crystal display module using this conventional technique. 20 is a liquid crystal display module, 2
1 is a liquid crystal display screen, 22 is a data driver, 23 is a scan driver with a built-in control circuit, 24 is a CPU, 26 is a data bus, 27 is an address bus, 28 is a read / write control signal, 2
Reference numeral 9 is an internal display memory, 200 is a power supply circuit of the liquid crystal display module, 201 is a power supply line for liquid crystal display, 202 is a power supply line for logic circuit of the liquid crystal display module, and 203 is a ground line. This data driver 22 has a built-in display memory 29 in the driver, and is a CP arranged on the device.
It can be directly assigned to the U24 address area.
The scan driver 23 with a built-in control circuit has a built-in circuit that generates a liquid crystal control signal such as an AC signal necessary for liquid crystal display or a frame signal indicating the top line of the display screen. By using the data driver 22 and the scan driver 23 with a built-in control circuit, for example, 320 dots in the horizontal direction and 24 dots in the vertical direction are used.
In the case of configuring the liquid crystal display module 20 having 0 lines, the number of interface signal lines with the CPU 24 is 20 for the data bus 26, 8 for the address bus 27, and 10 for the read / write control signal 28. Further, since the memory reading for displaying can be delayed with the horizontal period, the total power consumption of the liquid crystal display device is reduced.

[0003]

In the prior art, 30V is used.
LCD driver LS
I was using the 1μ process. Since the 1 μ process is used, the access time of the built-in display memory is delayed to 180 ns for writing and 300 ns for reading, so that the processing time for rewriting the display memory is increased and the performance of the device is significantly deteriorated.

An object of the present invention is to provide a liquid crystal display control device which consumes less power, speeds up the updating of the display memory, improves the performance of the device, and consumes less power.

[0005]

In order to achieve the object of the present invention, an external display memory allocated to a memory area of a CPU, an internal display memory built in a liquid crystal display module and the external display memory are provided. After the update, means for transferring the contents of the external memory to the internal display memory is provided, the CPU updates the display contents in the external display memory faster than the internal display memory, and the transfer means is At least the display data of the updated portion of the external display memory is transferred to the internal display memory.

Since the high-speed external display memory directly updates the display data by the CPU, the display memory can be updated at high speed, and at least the update portion of the external display memory can be updated at high speed not at the entire display screen. To the display memory inside the driver, the performance of the device can be improved and the power consumption can be reduced.

[0007]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a system of a liquid crystal display control device that achieves the first object of the present invention. The display operation of the liquid crystal display module 20 is the same as that of the conventional technique and does not depend on the present invention, and thus the description thereof is omitted. A transfer control circuit 10 is characteristic of the present invention, and an external display memory 11 is also characteristic of the present invention. The external display memory 11 and the display memory 29 inside the data driver 22 are directly connected to the bus of the CPU 24. The operation of the embodiment of the present invention shown in FIG. 1 will be described. The CPU 24 displays the display screen 2
The data displayed in 1 is expanded in the external display memory 11. In order to expand the display data in the external display memory 11, it is usual to read out the portion of the currently displayed content for which the display screen is updated this time, add the calculation, and write it to the same address. That is, one of the display memories
Updating the address information involves at least one read and one write. This is executed within the range of updating the display screen. According to the present invention, the external display memory 11 can use a general-purpose memory such as a high-speed SRAM or DRAM, so that the CPU 24 can finish updating the display screen quickly and execute other processing to improve the performance of the device. Can be improved. Next, the CPU 24 sets the range updated this time in the external display memory 11 and the corresponding transfer destination range of the internal display memory 29 in the transfer control circuit 10. When the CPU 24 instructs the transfer control circuit 10 to start the transfer, the transfer control circuit 10 causes the CPU 24 to read the updated display data from the external display memory 11 and write it to the internal display memory 29.
Request to secure bus right. The CPU 24 issues a permission to use the bus right when the bus is vacant, and when the permission to use the bus right is issued, the transfer control circuit 10 outputs an address of the external display memory 11 designated and a control signal for reading the display data. Output to the external display memory 11. Then, when the display data is read from the external display memory 11 and is output onto the data bus 26, the transfer control circuit 10 outputs the address of the internal display memory 29 which is the transfer destination and the control signal for writing, and reads it. Write the external display memory data. The transfer unit may be a 1-byte unit (referred to as a single mode) or a plurality of bytes (referred to as a block mode). When a plurality of bytes are transferred in 1 block units, the bus of the CPU 24 is occupied accordingly.

If the CPU 24 is an Intel 8086, the transfer control circuit 10 is a direct memory access controller (hereinafter referred to as DM) which is a general-purpose peripheral LSI.
The present invention can be implemented by using a memory transfer function of 8037 which is abbreviated as AC). Also, CP
If U24 is SH7032 or SH7034 manufactured by Hitachi, Ltd., the DMAC that becomes the CPU 24 and the transfer control circuit 10
Since this function is built in, it can be easily realized by using the transfer function between the memories of the DMAC.

As described above, according to the present invention, a high-speed general-purpose memory is used as the display memory 11 read and written by the CPU 24, and the DMAC, which is the transfer control device 10, sees a free bus cycle and transfers from memory to memory. By using the function, the external display memory 11 to the internal display memory 29
By transferring the data of the display screen updating unit and updating the display screen, it is possible to shorten the time spent by the CPU 24 for updating the display screen, reduce the power consumption, and improve the performance of the apparatus.

A second embodiment of the present invention will be described with reference to FIG. In the present embodiment, the transfer control device 10 of FIG. 1 described in the first embodiment is processed by software to transfer display data from the external display memory 11 to the internal display memory 29. The priority is determined for each software process (task), each task issues an execution request to the operating system, and the operating system is configured to execute the requested tasks in descending order of priority. Therefore, it is necessary to set the priority of the task that transfers the display data from the external display memory 11 to the internal display memory 29 to a priority that does not affect other tasks, and transfer from the external display memory 11 to the internal display memory 29. If
Submit a request to the operating system. By doing so, the external display memory 11 is changed to the internal display memory 2
A task having a higher priority than the transfer task to the display task 9 is executed first, and the external display memory 11 to the internal display memory 29 is executed.
For tasks with lower priority than the transfer task to
It is executed after the transfer task from the external display memory 11 to the internal display memory 29 is completed. In this way, the display memory 29 is built in the driver, and at least the display data of the updated part is transferred instead of the entire screen to reduce the power consumption, while the display screen is updated from the external display memory 11 to the internal part. It is possible to eliminate the performance degradation of the device due to the transfer to the display memory 29 of FIG.

4 and 5 show another embodiment of the present invention. 40 is a system memory. In the embodiments described with reference to FIGS. 1 and 3, the system memory 25 and the external display memory 11 are different memories. In the present embodiment, the case where the external display memory 11 is arranged in the same memory as the system memory that stores programs and data is shown. The operation of this embodiment is the same as that of the embodiment described with reference to FIGS. 1 and 3, and the same effect can be obtained. In addition, since the second display memory is not required separately from the system memory, the cost can be reduced by the second display memory.

[0012]

According to the present invention, a data driver having a built-in display memory is used to reduce power consumption by transferring at least an updated portion instead of the entire screen, and a second high speed external device is provided. By providing a display memory and transferring at least the updated part instead of the entire screen to avoid the slow read / write speed of the internal display memory, the bus occupation time is reduced, and the CPU can update the display screen at high speed. By doing so, the performance of the device can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of a conventional technique.

FIG. 3 is a block diagram of a second embodiment of the present invention.

FIG. 4 is a block diagram of a third embodiment of the present invention.

FIG. 5 is a block diagram of a fourth embodiment of the present invention.

[Explanation of symbols]

 10 ... Transfer control circuit, 11 ... External display memory, 20 ... Liquid crystal display module, 22 ... Data driver, 24 ... CPU, 25 ... System memory, 29 ... Internal display memory.

Claims (2)

[Claims] 1. A liquid crystal display module having a data driver including a first display memory, a central processing unit for updating display data stored in the first display memory, and a program and data for the central processing unit. In the liquid crystal display device including a system memory, a second display memory is provided, transfer means for transferring data from the second display memory to a display memory built in the data driver is provided, and the central processing unit is The display data is updated to the second display memory, and after the display data is updated, the transfer means transfers at least the display data of the update unit from the second display memory to the display memory built in the data driver. A liquid crystal display device characterized by being performed. 2. The liquid crystal display device according to claim 1, wherein the second display memory is in the same memory as a system memory that stores programs and data.