JPH09200697A - Image processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To record efficiently image data and to improve the operability for edit or the like by generating code data and low resolution data from received image data and storing the both onto a same storage medium in cross reference and using the low resolution data for the retrieval or the like. SOLUTION: Input digital image data are subject to non-fixed length coding by a high efficiency coding circuit and the image data are given to a retrieval data generating circuit 14. A data compression circuit compresses the data at a reduction rate in response to the desired image quality and a pattern per several fields is stored in a memory 62 according to a control signal from a memory control circuit 64. Then a data synthesis circuit 66 synthesizes the data with retrieval data such as time information, a program number, index information and classification information and recorded at a prescribed position of a recording medium as sub data in relation to the coded data via a switch 18. Thus, the recording efficiency is enhanced through the high efficiency coding and the sub data are referenced for the retrieval to eliminate the need for decoding the coded data on each occasion and then the operation is facilitated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing method for storing image data in a storage medium.

[0002]

2. Description of the Related Art As an apparatus for recording an image as data, a VTR (Video Tape Recorder) is known, and in recent years, a digital V-type digital recording system has been adopted.
TR is also known. In the digital VTR, image information is digitized, compression-coded and error-correction coded, and subjected to predetermined modulation before being recorded on a magnetic tape. At the time of reproduction, a signal reproduced by the reproducing head from the magnetic tape is demodulated, an error relating to the magnetic tape (due to dust or scratches) is corrected using an error correction code, and a decoder decodes it to restore a recorded image.

In such a conventional digital image recording apparatus, in the recording track pattern shown in FIG. 2, one screen is composed of a plurality of tracks. For example, T1, T2 and T3 have the first field. The image signal is recorded, and the image signal of the second field is recorded at T4, T5 and T6. This is because a large amount of data called a digital video signal is handled, but signal distribution is performed so that a plurality of tracks correspond to exactly one screen in order to easily realize special reproduction and search functions. .

[0004]

However, with the above-described image storage or recording method, the redundancy of image data is high, and efficient storage cannot be performed.

On the other hand, by encoding and storing the image data, the image data can be efficiently stored. In that case, for example, when the image data is decoded for searching an image, it takes time and time. There was a problem that it took time and effort.

Therefore, an object of the present invention is to provide an image processing method capable of efficiently storing image data and efficiently performing image editing and the like.

[0007]

An image processing method according to the present invention inputs image data representing a target image, encodes the image data to generate code data, and reduces the resolution of the image data. It is characterized in that low-resolution data is generated, and the code data and the low-resolution data are stored in the same storage medium in association with each other.

Since the data is encoded and stored, the storage efficiency is improved, and the low-resolution data is also stored, so that it is not necessary to decode the code data each time such as searching.
Operability such as editing is improved.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. 10 is digital image data (for example,
Information from the digital image communication network) is an input terminal for inputting the input data to the high efficiency encoding circuit 12 and the search data generating circuit 14. High efficiency coding circuit 1
2 is non-fixed length coding represented by an encoding method using time correlation of images such as an interframe encoder (variable length encoding in which the amount of data per screen changes depending on the content of video information) I do. Such an encoding method is well known in the field of data communication, for example, a video conference system or a video telephone system (see, for example, the Institute of Television Engineers, 19).
October 1985 (11) p.361), the output stage is equipped with a buffer memory, and the output data rate (data amount per hour) is constant.

The search data generation circuit 14 generates the following search data. For example, time-related information such as date, time code, index information such as program number, scene number and cut number, contents (data
Source information, attributes, subject information, etc.). FIG. 3 shows an example of the search data generating circuit 14, and FIG. 4 shows the procedure for creating the search screen. The image data from the input terminal 10 is applied to the data compression circuit 60, and the data is reduced and compressed by a method such as subsampling. As the data reduction rate in the data compression circuit 60, about 1/4 to 1/10 of the data reduction rate of the high-efficiency encoding circuit 12 may be appropriate, but depending on the system to be constructed, for example, a higher speed In order to correspond to the search, the compression rate may be increased, the compression rate may be decreased when higher image quality is desired, and the compression rate may be increased when the movement of the search screen is desired to be smoother.

The output of the data compression circuit 60 is applied to the memory 62, and the memory 62 receives a write control (W) signal from the memory control circuit 64 to display one screen in several fields (# 1 in FIG. 4). Memorize # 6). The time interval at which this storage is done determines the time resolution. 4 (1) is an input image of the data compression circuit 60, and FIG. 4 (2) is a compressed image stored in the memory 62 (# 1c and # 6c in the illustrated example,
The subscript “c” indicates that the data is compressed data. ), (3)
Indicates the recording arrangement on the magnetic tape. Memory control circuit 64
Outputs the stored images in the memory 62 by the number of screens for which writing to the memory 62 is prohibited (that is, the number of screens thinned out). Therefore, in the example of FIG. 4, the memory 62 outputs the same image data five times.

The data synthesizing circuit 66 synthesizes the above-mentioned synthetic data (time information, index, classification information, etc.) with the output image of the memory 62. The output of the data synthesizing circuit 66 becomes the output of the search data generating circuit 14.

The search data generation circuit 14 outputs the search data to the switch 18 according to the timing signal from the timing control circuit 16. The output of the high-efficiency encoding circuit 12 is also applied to the switch 18, and the switch 18 outputs the high-efficiency encoding circuit 12 (hereinafter referred to as main data) in accordance with the switching control signal from the timing control circuit 16.
And the output of the search data generation circuit 14 (hereinafter referred to as sub data) are selected, and three buffers for the recording signal processing system are selected.
It is applied to the memories 20A, 20B and 20C. Switch 1
In the recording arrangement shown in FIG. 4C, the switching of No. 8 is performed so that the sub data is recorded on the upper end of the helical track and the main data is recorded on the other areas.

In FIG. 4, the data amount of one compressed image (for example, # 1c) is set to 1/4, and each of the four divided blocks # 1ca, # 1cb, # 1cc and # 1cd is divided into two.
It records twice. The reason for recording a plurality of times (here, twice) is to increase the probability that the search data will be reproduced during high-speed reproduction. Multiple recordings may be associated with the head / azimuth angle. For example, blocks # 1ca and # 1cc
The first record is a plus azimuth, the second record is a minus azimuth, and the blocks # 1cb and # 1cd are reversed to correspond.

By thus recording the search data (sub-data) at a predetermined position in the recording pattern, the recording position of the image data (main data) is not constant as shown in FIG. , High speed search is possible by referring to the sub data. The locus of the magnetic head at the time of high-speed search is shown in FIG.
The shaded area in FIG. 5 is the search data recording area.

Next, the buffer memories 20A, 20B,
The data arrangement in 20C will be described. FIG. 6 shows the data arrangement for one track, FIG. 7 shows the block structure for recording, and FIG. 8 shows the data arrangement in one track consisting of a plurality of recording blocks in FIG. In FIG. 6, Dm1,
Dm2, Dm3, and Dm4 are main image data divided into four for convenience, Ds is search data (sub data), C1 parity is an inner code, C2 parity is an outer code, and a data error in a data recording / reproducing system is detected. It is for correction. The C1 parity and the C2 parity are only secured as a memory area, and it is the ECC encoders 22A, 22B, 22C in the subsequent stage that actually access the area to form the C1 parity and the C2 parity. . In FIG. 7, Sync is synchronization data and ID is data.
A signal for identifying a block, for example, video data or audio data, main data or sub-data, sub-screen data of sub-data, or a specific number of each sub-screen, and other retrieval of image data or sub-data of sub-data It can be used to classify / identify data (time, index, classification information) and the like.

ECC encoders 22A, 22B, 22C
Generates an error correction code using the C1 parity and C2 parity memory areas of the memories 20A, 20B, and 20C, respectively. In the image recording / reproducing system, for example, Reed-Solomon code cross interleaving (CI-RS) is used. The modulation circuits 24A, 24B, 24C convert the memory contents thus formed into a code string having a frequency spectrum which is considered to have the least deterioration in the electromagnetic conversion system. For example, the 8-9 conversion or the like is used to convert the DC component and the low frequency component into a signal having a spectral distribution that does not substantially include the low frequency component. Modulation circuits 24A, 24B, 2
The output of 4C is applied to recording rotary heads 28A, 28B and 28C via recording amplifiers 26A, 26B and 26C,
It is recorded on the magnetic tape 30.

In the reproducing system, the procedure reverse to the above is followed. The reproducing heads 32A, 32B and 32C (which may also be used as the recording heads 28A, 28B and 28C) reproduce the recorded data on the magnetic tape 30 and reproduce amplifiers 34A and 3A.
4B and 34C for amplification and demodulation circuits 36A and 36
Supply to B and 36C. Demodulation circuits 36A, 36B, 36
C performs the reverse processing of the modulation circuits 24A, 24B, 24C. Then, the ECC decoders 38A, 38B, 38C
However, by using the parity areas of the memories 40A, 40B and 40C, a transmission error in the electromagnetic conversion system (for example, due to a dropout phenomenon due to dust or scratches) is detected.
correct. The data arrangement of the memories 40A, 40B and 40C is the same as that in FIG. Of course, the recording memory 20A,
It may also be used as 20B and 20C.

From the data stored in the memories 40A, 40B and 40C, the main data extraction circuit 42 uses the main image data Dm1 to Dm.
Only m4 is extracted, and the search data extraction circuit 50 extracts only the search data Ds. In this extraction operation, the ID signal of FIG. 7 is referenced. The main video synthesis circuit 44 synthesizes the main image data extracted by the main data extraction circuit 42 and outputs video data corresponding to the input video signal before recording. The search screen synthesizing circuit 48 synthesizes the search image data extracted by the search data extracting circuit 50 and outputs video data corresponding to the output of the search data generating circuit 14. The other data for retrieval extracted by the retrieval data extracting circuit 50 is reproduced by the reproducing circuit 52 and output as it is or input to the character generator 54 for superimposing. The switching circuit 46 selects the output of the main video synthesizing circuit 44 during normal reproduction, and synthesizes and outputs the output of the search screen synthesizing circuit 48 and the output of the character generator 54 during search and reproduction.

Although not shown in FIG. 1, a system control circuit including, for example, a microcomputer controls the whole system.

Next, the mechanism of the rotary head and the tape drive system will be briefly described. In FIG. 9, the rotary drum 7
Heads 71a, 72a, 73a; 71b, 72
b, 73b are attached to the heads 71a, 72
a, 73a and 71b, 72b, 73b are opposite azimuths and are arranged to face each other by 180 °. When forming 6 helical tracks in one rotation,
The azimuth angles of + and-are alternately formed. The input / output signals of these heads are connected to the signal processing circuit 74 via a rotary transformer. The signal processing circuit 74 refers to the entire circuit shown in FIG. The rotary drum 70 is rotationally driven by a drum motor 76, and a drum servo circuit 78
However, the rotation of the rotating drum 70 is controlled by the outputs of the FG pulse generating circuit 79 for detecting the rotation speed and the PG pulse generating circuit 80 for detecting the rotation phase.

The magnetic tape 82 includes guide posts 83, 8
It is wound around the rotary drum 70 by the No. 4 and is conveyed by the capstan motor 87 while being pinched by the pinch roller 85 and the capstan 86. Capstan
The drive state of the motor 87 is detected by the FG pulse generation circuit 88 and controlled by the servo circuit 89.

The system control circuit 90 receives instructions from an external operation panel (not shown) or the like, and receives servo signals from the servo circuits 78 and 8.
9, the operation mode of the signal processing circuit 74 (recording, reproducing, searching, etc.) is controlled.

Since it is necessary to move the tape 82 at a high speed at the time of searching as compared with the time of reproducing, the system control circuit 90 controls the servo circuit 89 at the time of searching to control the motor 8.
Increase the rotation speed of 7. At the time of search, in order to suppress a change in the relative speed between the helical track and the head, a process called a drum offset, which changes the number of rotations of the drum, is also performed at the same time. 78 is applied.

At the time of high-speed search, the servo control is locked so that the reproduction output of the search data recording area (hatched portion in FIG. 5) becomes maximum. As the locking method, as is well known, a method of extracting the timing portion corresponding to the search data recording area from the output of the reproducing head and controlling the capstan motor so that the signal portion is maximized, or pilot multiplexing In the method, there is a method in which the pilot signal is sampled and held in the part corresponding to the search data recording area, a tracking error signal is created based on the sampled and held signal, and the capstan motor is controlled. .

In this embodiment, since the search signal is recorded at a predetermined position on the recording medium and the recording track is formed regardless of the period peculiar to the image information, the recording time can be made as long as possible. At the same time, a visual search can be performed. Therefore, for example, in a video conference system, a video telephone system, or an image recording device for backup of satellite relay, recorded images can be visually searched at high speed.
Operability is improved. Furthermore, video signals having different formats such as the NTSC system and the PAL system can be recorded on the same device and the same tape, and can be continuously and visually searched at high speed. As another application, when recording a large amount of data using a large capacity data recorder, the measurement environment,
If the recording conditions are converted into video information and recorded as search data, the subsequent search will be very easy.

[0028]

As can be easily understood from the above description, according to the present invention, the image information can be efficiently stored in the storage medium, and the coded data does not have to be decoded each time the search is performed. Therefore, operability such as editing is improved.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of an embodiment of the present invention.

FIG. 2 is a conventional track pattern.

3 is a configuration example of a search data generation circuit 14 of FIG.

FIG. 4 is an explanatory diagram of creation and recording arrangement of search data according to the present embodiment.

FIG. 5 is an explanatory diagram of a head locus during a search.

FIG. 6 is an explanatory diagram of a storage arrangement of memories 20A, 20B, and 20C of FIG.

FIG. 7 is a structural example of a recording block.

FIG. 8 is a structural example of a recording track.

FIG. 9 is a schematic configuration diagram of a rotary head peripheral mechanism.

[Explanation of symbols]

 10: Digital image data input terminal 12: High efficiency coding circuit 14: Search data generation circuit 28A, 28B, 28C: Recording head 30: Magnetic tape 32A, 32B, 32C: Reproduction head 42: Main data extraction circuit 50: Search data Extraction circuit

Claims (1)

[Claims] 1. Inputting image data representing a target image, encoding the image data to generate code data, reducing the resolution of the image data to generate low resolution data, and generating the code data and the low data. An image processing method characterized in that the image data is stored in the same storage medium in association with resolution data.