JPH09200579A - Image noise elimination circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the image quality by selecting and using any of an m-line median filter, an n-picture element median filter and a delay circuit so as to eliminate only noise intruded in an image signal without deteriorating the image quality. SOLUTION: A digital image signal is received from an input terminal 1. A discrimination circuit 4 provides an output of selection signals A-C to corresponding delay circuits 5-7 according to a prescribed selection criterion based on information denoting presence of edge received respectively from a vertical edge detection circuit 2 and a horizontal edge detection circuit 3. Signals outputted from the delay circuits 5-7 are fed to corresponding signal selection switches 11-13 as a switch control signal. Either a signal being an output signal of a 3-line median filter 8, an output signal of an 9-picture element median filter 9 or a delayed signal by a delay circuit 10 is selected and outputted for each picture element from an output terminal 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image noise eliminating circuit for eliminating a noise component mixed in an image signal and outputting an image signal having an improved image quality.

[0002]

2. Description of the Related Art An image passing through a transmission line such as a television signal has noises such as a lump noise which appears in a BS (satellite broadcast) received image at the time of rain and a burst noise in a VTR reproduced image. As described above, impulsive noise may be mixed due to various causes. As a known document for a technique for removing this kind of noise, for example, "NHK Giken R & D, No. 7, November 1989, Kazumasa Kobayashi, Nonlinear Digital Filter LSI for Image, p. 27-36".
There is.

In the above-mentioned document, an example in which a sequential filter is adopted as means for removing the impulsive noise mixed in the image is shown. The structure of this sequential filter and the outline of its processing algorithm are as follows. . The order filter in the above-mentioned document specifies (1) a memory circuit for taking out a neighboring pixel of a target pixel, (2) a parallel sorter circuit for determining an order relation between the neighboring pixels, and (3) a neighboring pixel. And a selector that selects pixels in the order. The order filter having the above configuration ranks the pixels existing in the vicinity of the pixel of interest (also called the processing window) in the sampled image with respect to the signal level, and corresponds to a specific rank. The pixel signal to be selected is selected and output. Since these operations are non-linear operations, this order filter is a kind of non-linear digital filter.

Next, a median filter, which is a kind of the above-described order filter, will be described. The median filter uses a pixel signal existing in the vicinity of the pixel of interest in the pixel signal as a signal level, for example, in the case of a monochrome signal, a gray level indicating a gradation between black (lowest level) and white (highest level). In the case of a color signal, the luminance (Y) signal levels of the three primary colors R, G, and B are arranged in this order, and a pixel signal having a median value between the lowest level and the highest level is selected and output. is there.

As the target pixel and its neighboring pixels, there are 3 pixels of the target pixel in the horizontal direction and the pixels on the left and right thereof, and 3 pixels × 3 lines consisting of the line of the target pixel in the vertical direction and three lines above and below the line. It is common. Figure 3 shows 3 pixels
It is a figure which shows the object pixel of a 3-line median filter, 1 pixel shown by the hatching of a figure is a target pixel, and 8 pixels of the surrounding white background are neighboring pixels.

The conventional use of the median filter as described above is as follows: (1) Median filter processing of 3 pixels × 3 lines in a field is performed. (2) Median filter processing of 3 pixels × 3 lines is performed between fields. Etc. were common. This is to input the pixel signals of 3 pixels x 3 lines and a total of 9 samples to the median filter,
The result of performing the median filter process (that is, the process of selectively outputting the pixel signal of the median value among the signal levels of the 9 pixels) on the target pixel at the center position by using the 8 pixels in the vicinity is output. It is a thing.

[0007]

However, in the conventional method of using the median filter, 3 pixels × 3 lines (9
Since it is a filter that outputs the median value of the signal level of (sample), there is a problem that, for example, when the image signal is a line of one line or points within 4 pixels, these are judged as noise and are removed. It was Therefore, there has been a demand for an image noise elimination circuit capable of effectively eliminating only noise mixed in the image signal and improving the image quality without degrading the image quality of the image signal.

[0008]

An image noise eliminating circuit according to the present invention is a circuit for eliminating a noise component mixed in an input image signal and outputting an image signal having an improved image quality. An m-line median filter that outputs an image signal that has been input and has undergone median filter processing for m (m is an integer of 2 or more) lines in the vertical direction, and n pixels (n is an integer of 2 or more) in the horizontal direction when the image signal is input. N pixel median filter for outputting the image signal subjected to the median filter processing, a delay circuit for inputting the image signal and delaying and outputting the image signal for a predetermined time, and a vertical edge and a horizontal direction of the image signal for inputting the image signal. The m-line median fill is determined by an edge detection circuit that individually detects a direction edge and a selection criterion based on the detection result of the edge detection circuit. , A selection determination circuit that outputs a selection signal that selects one of an n-pixel median filter and a delay circuit, and an output signal of the m-line median filter, an output signal of the n-pixel median filter, and an output signal of the delay circuit, respectively. And a signal selection circuit for inputting and selecting and outputting one of the three input signals based on the selection signal output by the selection determination circuit. Since the image noise elimination circuit is configured as described above,
It is possible to improve the image quality by effectively removing only the noise mixed in the image signal without causing the image quality deterioration by using an inappropriate median filter.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing an example of an image noise elimination circuit according to the present invention. In FIG. 1, 1 is an input terminal, 2 is a vertical edge detection circuit, 3 is a horizontal edge detection circuit, 4 is a determination circuit, 5, 6 and 7 are delay circuits, and 8 respectively.
Is a 3-line median filter, 9 is a 9-pixel median filter, 10 is a delay circuit, 11, 12, and 13 are signal selection switches, and 14 is an output terminal. FIG. 2 shows FIG.
2 is a diagram showing two target pixels of the median filter, one pixel indicated by hatching in the figure is a target pixel, and the other pixels on a white background are neighboring pixels.

First, the basic operation of the present invention will be described. In the image noise elimination circuit of the present invention, a first median filter, a second median filter and a delay circuit are provided between the input and output terminals of the image signal, and these two median filters and one delay circuit are respectively passed. Any one of the three image signals is adaptively (adaptively) selected and output according to the selection determination criteria based on the detection result of the vertical and horizontal edges of the image signal. The first median filter is a median filter of m lines in the vertical direction of the image (3 lines in the example of FIG. 1), and the second median filter is n pixels in the horizontal direction of the image (9 pixels in the example of FIG. 1). It is a median filter of. Further, the delay circuit simply outputs the input signal for a predetermined time (the above-mentioned 2
(Time equal to the transit time of one median filter)
The output is delayed by only, and has no filtering function.

Next, one of the three image signals
What selection criterion is used to select one will be described. In general, the characteristics of impulse noise are as follows.
Points can be considered. (1) There is no correlation between lines. (2) There is no correlation between fields (meaning between fields in the case of interlace) or between frames. (3) There is some correlation between the pixels in the line (since the size of noise is always 1 pixel or more in a normal quantized image).

Therefore, in general, in order to effectively remove the impulsive noise, a vertical three-line median filter (corresponding to three pixels in this case) having no correlation between lines may be used. However, if the 3-line median filter process is performed when there is an image edge (one line or the like) in the vertical direction, the edge portion of the image may be removed as noise.

Therefore, whether or not there is a vertical edge in the image,
The presence or absence of the horizontal edge is individually detected, and when only the vertical edge is detected, the median filter is switched to the horizontal 9-pixel median filter. The reason for using 9 pixels here is 4
This is because the number of pixels is effective for removing noise that extends between pixels. When edges are detected in both the vertical direction and the horizontal direction, the delay circuit is switched to and the median filter process is not performed in order to prevent image quality deterioration due to the median filter process. In other cases, that is, when there are no vertical edges (that is, regardless of the presence of horizontal edges), the 3-line median filter is used. Table 1 below summarizes the selection criteria of the above output signals (note that the median filters and the like used those shown in FIG. 1).

[0014]

[Table 1]

The operation of FIG. 1 will be described. In FIG.
First, it is assumed that the image signal input from the input terminal 1 is a digital image signal sampled at a predetermined sampling frequency, and then the process when the image signal is an analog signal will be described. When a digital image signal is input from the input terminal 1, the image signal is supplied to the vertical edge detection circuit 2, the horizontal edge detection circuit 3, the 3-line median filter 8, the 9-pixel median filter 9 and the delay circuit 10, respectively. It

The vertical edge detection circuit 2 detects a vertical image edge by using the image signal of only the vertical direction of the line to be filtered and the lines above and below the line, and the edge presence / absence information as a detection result (for example, 1). Or information of 0) is supplied to the determination circuit 4. At the same time, the horizontal edge detection circuit 3
Detects a horizontal image edge using the pixel of interest and several pixels on the left and right of the pixel on the scan line to be filtered, and determines the edge presence / absence information (for example, 1 or 0 information) that is the detection result. Supply to 4.

The judgment circuit 4 is based on the selection judgment criteria shown in the above Table 1 based on the information of the presence / absence of edges inputted from the vertical edge detection circuit 2 and the horizontal edge detection circuit 3, respectively.
A selection signal that selects any one of the three output signals, that is, a selection signal A that selects the output signal of the 3-line median filter 8, a selection signal B that selects the output signal of the 9-pixel median filter 9, or a delay signal. Any one of the selection signals C for selecting the output signal of the circuit 10 is output to the corresponding delay circuit 5, 6 or 7.

On the other hand, the 3-line median filter 8 to which the digital image signal is input from the input terminal 1 has the highest and lowest signal levels of the target pixel and the three pixels above and below it as shown in FIG. The pixel signal of the median value between is selectively output and supplied to the input side of the signal selection switch 11. Similarly, the 9-pixel median filter 9 to which the digital image signal is input from the input terminal 1 has the highest signal level of the pixel of interest and the four pixels on the left and right of the pixel of interest on the corresponding scanning line shown in FIG. A pixel signal having a median value between the lowest level and the lowest level is selectively output and supplied to the input side of the signal selection switch 12.

Here, the time required for the filter processing of the 3-line median filter 8 (that is, the filter passing time) and the time required for the filter processing of the 9-pixel median filter 9 are the same time (this time is t). Keep it. Similarly, the delay circuit 10 to which the digital image signal is input from the input terminal 1 delays the input signal by a time t equal to the processing time of the two median filters 8 and 9, and selects the delayed image signal as a signal. Supply to the input side of the switch 13.

Selection signals A and B output from the judgment circuit 4
When C and C are input to the corresponding delay circuits 5, 6 and 7, the delay circuits 5, 6 and 7 respectively input the input signals to the 3-line median filter 8, 9 pixel median filter 9 and delay circuit 10. The output signal is delayed by a time equal to the required transit time t, and the output signal is supplied to the corresponding signal selection switches 11, 12 and 13 as a switch opening / closing control signal.

The signal selection switches 11, 12 and 13 are
For example, selection signals A and B which are composed of selectors for digital signals and are delayed from the outputs of the delay circuits 5, 6 and 7
Only when C and C are supplied to the own switch, the switches are turned on to pass the signal on the input side to the output side.
When the selection signal is not supplied to its own switch, the switch is turned off and the input signal is not passed.
Since only one selection signal A, B, and C is always supplied when one pixel is output, the output signal of the 3-line median filter 8 from the output terminal 14 for each pixel, 9 Any one of the output signal of the pixel median filter 9 or the signal that is simply delayed without performing the filtering process is sequentially selected and output. Since the switch response speeds of the signal selection switches 11, 12 and 13 are sufficiently high, even if the switches are opened and closed for each pixel, they can be sufficiently followed.

The 3-line median filter 8 shown in FIG.
If the three lines are set to general m lines, m becomes an odd number in the central portion of the display screen. However, with respect to the uppermost scanning line and the lowermost scanning line of the screen, m is an even number because there is no scanning line above or below the corresponding scanning line. Therefore, general m is an integer of 2 or more. Similarly, if 9 pixels of the 9-pixel median filter 9 are set to general n pixels, n becomes an odd number in the central portion of the screen. However, for the left and right end areas of the screen, there are areas where there are no neighboring pixels to the left or right of the relevant pixel, and there are areas where the number of pixels on the left and right of the relevant pixel is not the same.
In some cases, n may be an even number. Therefore, general n is an integer of 2 or more.

Next, a processing method when the image signal input from the input terminal 1 of FIG. 1 is an analog signal will be described. The simplest method is to provide an A / D converter immediately after the input terminal 1, convert an analog image signal into a digital image signal at a predetermined sampling frequency, and then supply it to each circuit in FIG. D / A just before the output terminal 14
By providing a converter, the signal selection switches 11, 12 and 13
The output signal of 1 is converted into an analog image signal and then supplied to the output terminal 14. Since the mutual conversion between the analog signal and the digital signal is extremely easy as described above, the image signal input to and output from the circuit of FIG. 1 may be either a digital signal or an analog signal.

According to the image noise eliminator of FIG. 1, if there are both vertical edges and horizontal edges according to the selection criterion of Table 1, there is a possibility of an image signal instead of noise, so median filtering is performed. If there is no vertical edge, the three-line median filter that is effective for removing impulsive noise is performed. If there is only a vertical edge and no horizontal edge, the vertical image component is affected. Since the 9-pixel median filter processing that removes only the horizontal noise component is performed without
It is possible to effectively remove only the noise mixed in the image signal without deteriorating the image quality by using an inappropriate median filter or removing the image signal as noise.

[0025]

As described above, according to the present invention, in the circuit for removing the noise component mixed in the input image signal and outputting the image signal having the improved image quality, the m-line median filter outputs the image signal. Input vertical direction m (m
Is an integer of 2 or more) and outputs an image signal subjected to median filter processing, and the n-pixel median filter inputs the image signal and performs median filtering of n pixels in the horizontal direction (n is an integer of 2 or more). Output the image signal, the delay circuit inputs the image signal and outputs it after delaying it for a predetermined time, and the edge detection circuit inputs the image signal and individually detects the vertical edge and the horizontal edge of the image signal. The selection determination circuit outputs a selection signal for selecting one of the m-line median filter, the n-pixel median filter or the delay circuit according to a selection determination criterion based on the detection result of the edge detection circuit, and the signal selection circuit. Is the output signal of the m-line median filter, n
The output signal of the pixel median filter and the output signal of the delay circuit are respectively input, and one of the three input signals is selected and output based on the selection signal output by the selection determination circuit. By using an appropriate median filter, the image quality is not deteriorated, and only the noise mixed in the image signal can be effectively removed to improve the image quality.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of an image noise elimination circuit according to the present invention.

2 is a diagram showing target images of the two median filters of FIG. 1. FIG.

FIG. 3 is a diagram showing a target image of a 3 pixel × 3 line median filter.

[Explanation of symbols]

 1 Input Terminal 2 Vertical Edge Detection Circuit 3 Horizontal Edge Detection Circuit 4 Judgment Circuit 5, 6, 7 Delay Circuit 8 3 Line Median Filter 9 9 Pixel Median Filter 10 Delay Circuit 11, 12, 13 Signal Selection Switch 14 Output Terminal

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Hiroyuki Shimano 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (4)

[Claims] 1. A circuit for removing a noise component mixed in an input image signal and outputting an image signal having an improved image quality, wherein the image signal is input in a vertical direction m (m is an integer of 2 or more).
An m-line median filter that outputs an image signal that has undergone line median filtering, and a horizontal direction n (n is an integer of 2 or more) that receives the image signal.
An n-pixel median filter that outputs an image signal that has undergone pixel median filtering, a delay circuit that inputs the image signal and delays and outputs the image signal for a predetermined time, and a vertical edge of the image signal that receives the image signal. An edge detection circuit for individually detecting horizontal edges, and a selection criterion for selecting one of the m-line median filter, the n-pixel median filter, and the delay circuit according to a selection criterion based on the detection result of the edge detection circuit. A selection determination circuit that outputs a signal, an output signal of the m-line median filter, an output signal of the n-pixel median filter, and an output signal of a delay circuit are respectively input, and the three selection signals are output based on the selection signal output by the selection determination circuit. And a signal selection circuit for selecting and outputting one of the input signals. Image noise elimination circuit to be. 2. The image noise elimination circuit according to claim 1, wherein the image signal is a digital image signal sampled at a predetermined sampling frequency. 3. The selection judgment circuit outputs a selection signal for selecting an m-line median filter when the detection result of the edge detection circuit does not detect a vertical edge, and the vertical edge is detected and the horizontal direction is detected. Selection criterion that outputs a selection signal that selects the n-pixel median filter when no direction edge is detected, and outputs a selection signal that selects a delay circuit when both a vertical edge and a horizontal edge are detected 3. The image noise elimination circuit according to claim 1, wherein the image noise elimination circuit is a selection determination circuit having: 4. The m-line median filter is a three-line median filter that inputs the image signal and outputs an image signal that has been subjected to median filter processing of three lines in the vertical direction, and the n-pixel median filter is the image signal. 4. The image noise removal according to claim 1, wherein the image signal is a 9-pixel median filter that outputs an image signal that has undergone 9-pixel median filter processing in the horizontal direction. circuit.