JPH09200081A - Correlation peak detection type frequency error detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a frequency error detection circuit used for an AFC circuit with an inexpensive reference clock source in which a lock range of a frequency error is set larger in a demodulation circuit after reverse spread processing at a receiver side in the direct spread spectrum communication. SOLUTION: A base band complex signal subject to orthogonal detection is given to complex MFs 1, 2, in which complex correlation with each complex spread code is taken and two mean sections 5, 6 are used to average several symbol times with a maximum peak in a maximum timing detected by a peak position detection section 7 and two power calculation sections 8, 9 calculate a power. The difference is obtained and normalized and a frequency error conversion section 12 obtains a corresponding frequency error and provides an output of it.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AFC (Automatic Frequency) used in a receiver of a direct sequence spread spectrum (DSSS) communication system.
ncy Control: Automatic frequency control) related to improvement of frequency error detection circuit.

[0002]

2. Description of the Related Art Generally, a TCXO (Temperature Compensate) for generating a reference clock in a transmitter and a receiver.
d Crystal Oscillator: AFC if the frequency of the reference clock source such as a temperature-compensated crystal oscillator is sufficiently stable
Is not particularly necessary. However, TC with high stability
XO is expensive and unsuitable for portable mobile terminals aiming to reduce the price. Therefore, AFC is generally needed.

[0003]

Conventionally, in the direct spread spectrum communication system (hereinafter referred to as DS), AF is performed in the area of the primary demodulation after the secondary demodulation (despreading) of the received signal.
The method of equipping C is adopted. However, the conventional AFC circuit has a drawback in that the frequency error pull-in range is narrowed due to the influence of the rotation of the complex signal due to the frequency error in the spread code length section.

It is an object of the present invention to provide a frequency error detection circuit for AFC which can set a large frequency error pull-in range and can use an inexpensive reference clock generation source.

[0005]

According to a first aspect of the present invention, there is provided a first complex spreading code generator for outputting a complex spreading code calculated by applying a positive frequency offset, and the positive frequency. A second complex spreading code generator that outputs a complex spreading code calculated in advance by giving a negative frequency offset whose absolute value is equal to that of the offset, and the baseband complex signal that receives the baseband complex signal from the quadrature detection unit as an input And first and second complex matched filters for obtaining complex correlations between the complex spread codes from the first and second complex spread code generators, and output signals of the first and second complex matched filters, respectively. A peak position detection unit that compares and detects the timing of the position where the absolute value of both peaks or one of them shows the maximum value, and the output signals of the first and second complex matched filters From the first and second peak detection and averaging units that respectively extract peak values at the timings and average and output the plurality of symbol times, and output power values of the first and second peak detection and averaging units. The difference between the outputs of the first and second power calculation units and the outputs of the first and second power calculation units, which are respectively calculated, is calculated, and the output is normalized by the sum of the outputs of the first and second power calculation units. And a frequency error conversion unit that converts the output of the power difference calculation unit into a corresponding frequency error and outputs the frequency error.

According to a second aspect of the present invention, a synchronization circuit for inputting a baseband complex signal from a quadrature detection section and outputting a symbol timing at the maximum peak position of the baseband complex signal, and a positive frequency offset are provided. A first complex spreading code generator for outputting a complex spreading code calculated in advance at the symbol timing, and a complex spreading code calculated in advance by giving a negative frequency offset whose absolute value is equal to that of the positive frequency offset. A second complex spreading code generator for outputting according to the symbol timing;
A baseband complex signal from the quadrature detection unit is input, the baseband complex signal and the complex spreading codes from the first and second complex spreading code generators are input, respectively multiplied, and then integrated and output. First and second sliding correlators, first and second averaging units for averaging the output signals of the first and second sliding correlators by a plurality of symbols in time, and outputting the first and second averaging units 1st which calculates each electric power value of the output of the conversion part
And a second power calculation unit, and a power difference calculation unit that obtains a difference between the outputs of the first and second power calculation units, normalizes the sum of the outputs of the first and second power calculation units, and outputs the normalized difference. And a frequency error conversion unit that converts the output of the power difference calculation unit into a corresponding frequency error and outputs the converted frequency error.

According to a third aspect of the present invention, the frequency error conversion unit is set so that the slopes are different in a plurality of stages corresponding to the magnitude of noise power in the received signal, and the correlation power difference vs. frequency error. It has a correspondence table of correspondence curves (S-curves), and switches to an S-curve with a large slope when the noise power in the received signal is large, and switches to an S-curve with a small slope when the noise power is small to change the noise power. It is characterized by having a function of outputting a corresponding frequency error.

Further, according to the present invention as set forth in claim 4, when the outputs of the first and second power calculation units are added and the desired reception wave signal drops significantly, the frequency error conversion unit detects it. It is characterized in that a calculation determination unit is provided so as not to perform calculation.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention described in claim 1 will be described in detail below. FIG. 1 shows a configuration example of the first embodiment of the correlation peak detection type frequency error detection circuit of the present invention. The received baseband complex signal input from the quadrature detector is converted into 2
Matched Filters (MF) 1, 2
, The complex correlation with the complex spreading code of the receiver is obtained. That is, the complex spreading code given to one of the complex matched filters 1 is created by the complex spreading code generator 3. This complex spreading code has a set positive frequency offset (eg +1
Rotation of 0 kHz) is complex-multiplied by the same complex spreading code as that on the transmitting side, is created in advance, and is stored in the memory. Similarly, the complex spreading code given to the other complex matched filter 2 is generated by the complex spreading code generator 4.
At this time, the frequency offset given is negative (example: -1)
0 kHz), but its absolute value is the same as the above-mentioned positive frequency offset amount. If the complex matched filters 1 and 2 are MF, the signal after correlation acquisition has a sharp peak in one symbol period. However, this peak level is
It depends on the frequency error of the received signal. For example, if the received signal has a positive frequency error (eg +5 kHz),
The output of the complex matched filter 1 has a higher level than the output of the complex matched filter 2.

A description will be given with reference to FIG. FIG. 2 shows the frequency error and the spectrum of the received signal, and shows the influence of the frequency error on the frequency axis. FIG. 2A shows the received signal spectrum when there is no frequency error. Due to the baseband processing, there is a received signal spectrum centered on DC. FIG. 2B shows the transfer function of the complex matched filter of the receiver. In general, the correlator has a transfer function equivalent to that of the LPF due to the integral operation existing inside the correlator. FIG.
(C) is a received signal spectrum that has received a frequency error of + Δf. Due to the frequency error, there is a spectrum centered around + Δf. When this received signal is received by the complex matched filter shown in FIG. 2 (B), as shown in FIG. 2 (D), only the shaded portion passes through the complex matched filter, and the portion protruding from the transfer function of the complex matched filter. It can be seen that there is a loss of.

From this, as shown in FIG. 2E, the transfer function of the complex matched filter of the receiver is + Δf or −Δf.
If the received signal is a positive frequency error even if it does not match the set frequency offset of the receiver, the output of the complex matched filter 1 becomes 2, the output of the complex matched filter 2 becomes larger than the output of the complex matched filter 1 if the received signal has a negative frequency error. The shift amount of the transfer function of the two complex matched filters 1 and 2 is determined by the frequency offset amount given to the complex spreading code which is the tap coefficient, and the offset amount is fixed.

The peak position detecting section 7 extracts the timing at which the maximum peak value (= absolute value) is obtained from the outputs of the two complex matched filters 1 and 2, and the two peak detection averaging sections 5, Output to 6. This is due to the frequency error of the received signal, a single complex matched filter (eg:
This is because it is necessary to observe the outputs of both the complex matched filters 1 and 2 because the peak level or the appearance of the peak itself is uncertain at the output of the complex MF1 only or only the complex MF2.

The two peak detection and averaging units 5 and 6 respectively extract peak levels at the timing designated by the peak position detecting unit 7 and average a plurality of symbols for noise reduction. The peak levels from the averaged complex matched filters 1 and 2 are two power calculation units 8 and 9.
Each of them is converted to electric power in order to remove the instability of the phase due to the information signal and the fluctuation of the transmission line. Then, the adder 10 takes the difference between the two complex correlation powers. This value is normalized in the normalization circuit 11 by the sum of the outputs of the power calculation units. The power calculator 13 is configured by the adder 10 and the normalization circuit 11. Assuming that the output of the power calculation unit 8 is P ₊ , the output of the power difference calculation unit 9 is P _−, and the envelope level indicating the transmission line fluctuation is A, the output of the power difference calculation unit 13 is as follows.

[0014]

[Equation 1]

The reason for normalizing is to prevent the output of the power difference calculation unit 10 from fluctuating and the detection error being affected by the fluctuation of the reception level even if the frequency error does not fluctuate.
This shows that the input signal to the frequency error conversion unit 12 does not change even if the outputs of the power calculation units 8 and 9 change (= A changes) due to the transmission line change. The frequency error conversion unit 12 correlates this value with the S-shaped curve (= correlation power difference vs. frequency error curve) acquired in advance to obtain and output the corresponding frequency error.

FIG. 3 shows an S-shaped curve (= complex correlation power difference vs. frequency error curve) obtained in advance. Here, FIG.
Is the complex correlation power difference obtained by varying the frequency error of the input signal on the horizontal axis from +20 kHz to -20 kHz by computer simulation. The conditions for the calculation are as follows. The primary modulation method is QPSK having a symbol rate of 20 kHz, and the complex spreading code is 256-chip M series. The frequency attached to the curve in the figure is the frequency offset amount (absolute value) given to the complex matched filter of the receiver, and is 20 kHz, 15 kHz, 1
The case where the frequency is changed to 0 kHz is compared. From the figure,
It can be seen that when an offset amount of 10 kHz is given, it is possible to sufficiently cope with the input of a frequency error having a magnitude of half the symbol rate. Giving a frequency offset amount of 15 kHz has the merit of further increasing the frequency error pull-in range. However, considering the presence of noise, the larger the slope of the straight part of the S-shaped curve, the stronger the resistance to noise. preferable.

As described above, the present invention realizes a frequency error detection circuit for the DS system, which has not been studied so far, by giving a frequency offset to the complex spreading code essential for the DS system in advance. You can Further, since it operates regardless of the determination system, it is possible to realize a frequency error detection circuit independent of the primary modulation method.

Next, the structure of the present invention described in claim 2 will be described. FIG. 4 is a block diagram showing a second embodiment corresponding to the second aspect. In the configuration of FIG. 4, the complex MF (Matched Filter) in the first embodiment is replaced with a sliding correlator (SC) to realize a large reduction in circuit scale.

7A and 7B are explanatory views showing the difference between MF and SC. FIG. 7A is a configuration example of MF, and FIG. 7B is a configuration example of SC.
(C) shows an output example. As shown in FIG. 7A, the MF is generally a delay element 71 to 75 and a multiplier 76 to 80.
And an adder 81 is a transversal filter. When MF is applied to DS, the tap coefficient is given a spreading code, and therefore its output is shown in FIG.
As shown by the broken line in (C), a sharp peak appears in one symbol period (T _S ) (= called autocorrelation function). Therefore, the peak point always exists somewhere, and the maximum value can be obtained by the peak search for one symbol time.

On the other hand, the SC is composed of a multiplier 82 for multiplying the input by the spread code from the spread code generator 84 and an integrator 83 for integrating the output, as shown in the configuration example of FIG. 7B. , The correlation calculation can be performed only once in one symbol time (T _S ) with respect to the input signal. Therefore, as shown by the thick solid line in FIG. 7C, the SC output is
Only one of the autocorrelation functions can be obtained. Since the point where S / N becomes maximum is the peak point, MF is used in SC configuration.
To obtain an S / N equivalent to, a DLL synchronization circuit or the like that synchronizes the input signal with the reception spread code is required. Considering the circuit scale, the difference is clear from FIGS. 7A and 7B, and even if a synchronous circuit such as DLL is required, SC
The circuit scale can be significantly reduced by applying the configuration.

In FIG. 4, a multiplier 41 and an integrator 43,
And the multiplier 42 and the integrator 44 are respectively shown in FIG.
It has the SC configuration shown in. Since the outputs of the integrators 43 and 44 are the S / N best points (= peak points) in the MF output due to the DLL synchronizing circuit 47 and the SC configuration, the peak position detecting unit in the first embodiment of FIG. 7 and complex MF1,2 no longer need peak detection. The two averaging units 45 and 46 average the peak levels. The outputs of the averaging units 45 and 46 are the same as the operations of the peak detection averaging units 5 and 6 in FIG. The correlation power difference calculation unit 48 uses the adder 10 in FIG.
And the normalization circuit 11 are integrated into one.

Next, the structure of the present invention described in claim 3 will be described. FIG. 5 is a block diagram showing a third embodiment corresponding to the third aspect. Generally, when the received signal power greatly drops due to a transmission line fluctuation or the like, the signal power to noise power ratio (S / N) deteriorates, and the AFC characteristic deteriorates. As a countermeasure against this, the third embodiment is effective. In general, the spreading code used for DSSS has 0 cross points in its autocorrelation function. Therefore, when the 0 cross point is observed in the symbol period, since the original signal component does not exist, the signal level appearing at that point should be a noise component. As a result, when implementing the third embodiment with a sliding correlator, at least two sliding correlators are required because one sliding correlator is also required for noise detection.

However, it is not known whether the zero cross point of the autocorrelation function is stable even in the presence of frequency error. Therefore, in order not to be affected by the frequency error of the input signal, the complex M
When the noise levels obtained from F1 and F2 are combined by the adder 51, the noise detection / table switching unit 53 can detect stable noise power with respect to the input frequency error. The noise detection / table switching unit 53 prepares a plurality of S-shaped curves obtained by changing the noise power in advance, and carries out the S-shaped curve corresponding to the measured noise power, and the frequency error conversion unit 12 Is given to. With this configuration, it is possible to realize a correlation peak detection type frequency error detection circuit in which the detection error of the frequency error is small even if the S / N greatly changes. The correlation power difference calculation unit 52 is a combination of the adder 10 and the normalization circuit 11 of the first embodiment shown in FIG.

Next, the structure of the present invention described in claim 4 will be described. FIG. 6 is a block diagram showing a fourth embodiment corresponding to the fourth aspect. When the outputs of the two complex MFs 1 and 2 largely drop due to transmission line fluctuations and the like, it is conceivable that the noise power becomes dominant in each complex MF output and the frequency error detection error increases. In the fourth embodiment, the envelope fluctuation of the power of the desired reception wave is obtained by the calculation determination unit 63 from the signal obtained by combining the outputs of the two power calculation units 8 and 9 by the adder 62, thereby obtaining the desired reception wave. It has the function of not performing the frequency error detection operation when the power drops significantly. Here, the desired received wave power is different from the total received signal power including all of noise, interference wave, and desired wave, and only the desired wave is obtained by the correlator (since the correlator can be regarded as an LPF,
Noise and interference wave power is reduced),
Indicates the received signal power.

Further, as described above, the adder 62 uses two complex MFs depending on the frequency error of the received signal.
This is because the peak of the output of 1 or 2 may not appear. The operation determination unit 63 has an envelope level necessary for maintaining the frequency error detection operation accuracy that it has internally and compares the value with the input signal level.
When it is determined that the received signal power is low, the frequency error conversion unit 12 is instructed to hold the output value of the estimated frequency error. According to the fourth embodiment, it is possible to reduce the error that the S / N, which largely varies due to the fluctuation of the transmission line, gives to the detection of the frequency error. The correlation power difference calculation unit 61 is the adder 1 of the first embodiment in FIG.
This is a combination of 0 and the normalization circuit 11.

Next, the structure of the present invention described in claim 5 will be described. FIG. 8 is a block diagram showing the fifth embodiment of the present invention. The fifth embodiment is the same as FIG. 1 except that a power ratio calculation unit 14 is provided instead of the power difference calculation unit 13 in the configuration of the first embodiment shown in FIG. Yes, the same reference numerals are used.

A signal (correlation power) converted into electric power by the power calculation units 8 and 9 to remove the instability of the phase due to the information signal and the transmission line fluctuation is input to the power ratio calculation unit 13, and both correlations are calculated. The power ratio is calculated. This is to remove the detection error of the frequency error due to the fluctuation of the received signal power. This will be explained using formulas.

When the output of one power calculation unit 8 is P ₊ , the output of the other power calculation unit 9 is P _−, and the envelope level of the received signal is a, the difference between the correlation powers is simply taken. if, (aP ₊ -ap _-), and the constant frequency error of the received signal _- even (= P _+, P is constant), the envelope level a that varies a transmission path fluctuation, the power difference is large The fluctuation causes an error in the detection of the frequency error. In this configuration, since the received signal level input to each complex MF is the same, the output of the power ratio calculation unit 14 is (aP ₊
/ AP ₋ ) = (P ₊ / P ₋ ), and is not affected by the envelope level a of the received signal. The frequency error conversion unit 12 correlates this value with the S-shaped curve (= correlation power ratio vs. frequency error curve) acquired in advance to obtain the corresponding frequency error.

FIG. 9 shows an S-shaped curve used in this fifth embodiment. The configuration of the frequency error conversion unit 12 is
This S-curve may be configured as a table to obtain the corresponding frequency error, but a configuration example in which the S-curve is functionalized is also possible. Here, FIG. 9 shows the complex correlation power ratio obtained by computer simulation when the frequency error of the input signal on the horizontal axis is changed from +20 kHz to −20 kHz. Here, the primary modulation method is QPSK with a symbol rate of 20 kHz and a spreading code of 256.
It is an M series of chips. The frequency in the figure is the frequency offset amount (absolute value) given to the complex MF of the receiver, and
The case where the frequency is varied from kHz to 12 kHz is compared. From the figure, if the offset amount is from 2 kHz to 12 kHz, the range of the frequency error that should be compensated for (± 3 kHz
The linearity of the S-curve at (Hz) is maintained, and it can be seen that any frequency can be set enough for the receiver. However, in consideration of the presence of noise, the larger the slope of the linear portion of the S curve, the stronger the resistance to noise, so 10 kHz and 12 kHz are preferable.

10 and 11 are examples of data acquired by the prototype device. FIG. 10 shows the operational effectiveness of this system under static conditions in which there is no transmission line fluctuation.
The horizontal axis is the frequency error given to the input signal, and the vertical axis is the error rate. The primary modulation is QPS with a symbol rate of 20 kHz.
K is a direct spread spectrum spread communication system using 256-bit M series as the spread code used. In the actual device, the frequency offset given to the correlator of the receiver was fixed at 10 kHz. MFC in the figure is Manual Fre
This is the upper limit of the AFC characteristic, which is obtained by correcting the frequency difference of the input signal by the quency control by cheating and correcting it. From the figure, it can be seen that this method has almost the same characteristics as the MFC characteristics and is effective as a frequency error detection method of AFC. The reason why the frequency error is only up to ± 5 kHz is that the compensation frequency range prepared as the S-shaped table is ± 5 kHz and the range higher than that is outside the compensation range. Further, the characteristics of the method of the present invention in the synchronous detection exceeding the upper limit of AFC are improved due to an error in data acquisition.

FIG. 11 shows the experimental results of a prototype using the present invention under flat Rayleigh fading. The setting conditions of the prototype are the same as in the case of FIG. The horizontal axis is the frequency error given to the input signal, and the vertical axis is the error rate. AFC
Is normally operating, the deterioration of the error rate within the compensation range is obviously smaller than that in the case where AFC is not used, and the deterioration of the error rate characteristic is almost unrelated to the AFC characteristic.
Of the parameters in FIG. 11, Eb / No indicates the signal energy per one bit to noise power density, and fd is the fading Doppler frequency. From Figure 11,
It can be seen that the AFC using the frequency error detection circuit of the present invention operates normally even under high speed fading. In FIG. 11, the AFC characteristics for the negative frequency error and the positive frequency error do not change, so the AFC characteristics for the negative frequency error are omitted. As described above, the problem that the conventional technique cannot follow the fluctuation of the transmission path is solved.

Similar to the above-mentioned fifth embodiment, the power difference calculators 48 and 52 are also provided in the second, third and fourth embodiments of the present invention shown in FIGS. 4, 5 and 6, respectively. , 61 can be replaced with a power ratio calculation unit.

[0033]

As described in detail above, by implementing the present invention, a frequency error detection method independent of the primary modulation method can be realized, and there is a great advantage that an inexpensive TCXO can be used. Further, it has a great feature that the pull-in range of the frequency error can theoretically be compensated up to ± 10 kHz.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a conceptual diagram showing a relationship between a frequency error, a spectrum of a received signal, and a transfer function of a complex matched filter.

FIG. 3 is an S-shaped curve when a frequency offset given to a complex matched filter is used as a parameter.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a block diagram showing a third embodiment of the present invention.

FIG. 6 is a block diagram showing a fourth embodiment of the present invention.

FIG. 7 is an explanatory diagram of complex MF and SC.

FIG. 8 is a block diagram showing a fifth embodiment of the present invention.

FIG. 9 is an S-shaped curve used in the fifth embodiment.

FIG. 10 is a diagram showing an example of actually measured characteristics according to a fifth embodiment.

FIG. 11 is a diagram of an actual measurement characteristic example according to the fifth embodiment.

[Explanation of symbols]

 1, 2 Complex MF 3,4 Complex spreading code generator 5,6 Peak detection averaging unit 7 Peak position detection unit 8,9 Power calculation unit 10,51,62,81 Adder 11 Normalization circuit 12 Frequency error conversion unit 13 Power Difference Calculation Unit 14 Power Ratio Calculation Unit 41, 42, 76-80, 82 Multiplier 43, 44, 84 Integrator 45, 46 Averaging Unit 47 DLL Synchronous Circuit 48, 52, 61 Power Difference Calculation Unit 53 Noise Detection Table switching unit 63 Calculation determination unit 71 to 75 Delay element 84 Spread code generator

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Mamoru Sawabashi 2-10-1 Toranomon, Minato-ku, Tokyo NTT Mobile Communications Network Co., Ltd.

Claims (5)

[Claims] 1. A first complex spread code generator which outputs a complex spread code which is given a positive frequency offset and is calculated in advance, and a negative frequency offset which is equal in absolute value to said positive frequency offset and is given a negative frequency offset in advance. A second complex spreading code generator for outputting the calculated complex spreading code; and a baseband complex signal for inputting the baseband complex signal from the quadrature detection unit and the first and second complex spreading code generators. The output signals of the first and second complex matched filters are respectively compared with the first and second complex matched filters for obtaining the complex correlation with the complex spreading code of From a peak position detection unit that detects and outputs the timing of the position showing the maximum value, and from the output signals of the first and second complex matched filters,
A peak value at each of the timings is extracted, and the first and second peak detection and averaging units that output the signals after averaging a plurality of symbols are calculated, and the power values of the outputs of the first and second peak detection and averaging units are calculated. And a difference between the outputs of the first and second power calculation units that perform
And a power difference calculation unit for normalizing and outputting the sum of the outputs of the second power calculation unit, and a frequency error conversion unit for converting the output of the power difference calculation unit into a corresponding frequency error and outputting the frequency error. And a correlation peak detection type frequency error detection circuit. 2. A synchronization circuit which inputs a baseband complex signal from a quadrature detection unit and outputs a symbol timing of a maximum peak position of the baseband complex signal, and a complex spread code calculated in advance by giving a positive frequency offset. A first complex spreading code generator for outputting at the symbol timing, and a second complex spreading code for outputting at the symbol timing a complex spreading code calculated in advance by giving a negative frequency offset whose absolute value is equal to that of the positive frequency offset. And a baseband complex signal from the quadrature detection unit as an input, and the baseband complex signal and the complex spread codes from the first and second complex spreading code generators are input and multiplied respectively. Then, the first and second sliding correlators for integrating and outputting, and the first and second slurry The outputs an output signal of the loading Correlator each plurality symbol time averaged 1
And a second averaging unit, first and second power calculating units that respectively calculate power values of the outputs of the first and second averaging units, and the first and second power calculating units The difference between the outputs is obtained and the first
And a power difference calculation unit for normalizing and outputting the sum of the outputs of the second power calculation unit, and a frequency error conversion unit for converting the output of the power difference calculation unit into a corresponding frequency error and outputting the frequency error. And a correlation peak detection type frequency error detection circuit. 3. The frequency error conversion unit of a correlation power difference vs. frequency error correspondence curve (S-shaped curve) set so that the slopes are different in a plurality of steps corresponding to the magnitude of noise power in the received signal. A function that has a correspondence table and switches to an S-shaped curve with a large slope if the noise power in the received signal is large and to an S-shaped curve with a small slope if the noise power is small, and outputs the frequency error corresponding to the size of the noise power. It is configured to have
The correlation peak detection type frequency error detection circuit described. 4. A calculation determination unit that adds the outputs of the first and second power calculation units and prevents the frequency error conversion unit from performing a detection calculation when the desired reception wave signal drops significantly. The correlation peak detection type frequency error detection circuit according to claim 1 or 2, further comprising: 5. The correlation peak detection type frequency error detection circuit according to claim 1, further comprising a power ratio calculation unit in place of the power difference calculation unit.