JPH09199302A - Chip thermistor and its manufacture - Google Patents

Chip thermistor and its manufacture

Info

Publication number
JPH09199302A
JPH09199302A JP890696A JP890696A JPH09199302A JP H09199302 A JPH09199302 A JP H09199302A JP 890696 A JP890696 A JP 890696A JP 890696 A JP890696 A JP 890696A JP H09199302 A JPH09199302 A JP H09199302A
Authority
JP
Japan
Prior art keywords
opening
electrode layer
layer
electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP890696A
Other languages
Japanese (ja)
Inventor
Toshiyuki Iwao
敏之 岩尾
Koichi Morimoto
光一 森本
Koji Nishida
孝治 西田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP890696A priority Critical patent/JPH09199302A/en
Publication of JPH09199302A publication Critical patent/JPH09199302A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To reduce the change of a resistance value due to the alteration of a conductive polymer layer by providing a first electrode layer having a first opening in the one-side part, a conductive polymer layer and a second electrode layer having a second opening in the side part on the opposite side to the first opening. SOLUTION: A first electrode layer 2 made of a phenol series conductive resin and having a first opening 3 is provided in the one-side part on the upper surface of a substrate 1. A conductive polymer layer 4 comprising a composition of a crystalline polymer and a conductive particle is provided in the upper surfaces of the first electrode layer 2 and the first opening 3. In the upper surface of the conductive polymer layer 4, a second electrode layer 5 made of a phenol series conductive resin and having a second opening 6 in the side part on the opposite side to the first opening 3. Further, a protective layer 7 made of an epoxy series insulating resin is provided, and an end surface electrode 8 is provided. Therefore, the change of a resistance value due to the alteration of a conductive polymer layer is reduced, the divergence of a connection part between an electrode and a metal terminal is reduced at the time of mounting it on a printed circuit board.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、PTC(Positive
Temperature Coefficient)特性を有する導電性ポリマ
を用いたチップ型PTCサーミスタおよびその製造方法
に関するものである。
TECHNICAL FIELD The present invention relates to a PTC (Positive
The present invention relates to a chip type PTC thermistor using a conductive polymer having a temperature coefficient and a manufacturing method thereof.

【0002】[0002]

【従来の技術】従来、結晶性ポリマにカーボンブラック
あるいは金属粒子を分散させたPTC特性を有する導電
性ポリマを用いたPTCサーミスタが知られていた。P
TC特性は、結晶ポリマが融点において結晶質より非晶
質に転換する際に示す急激な体積増大のため、その中に
分散された導電性粒子同士の間隔が押し広げられて、粒
子間の接触抵抗が急激に増大するために生じるものであ
る。
2. Description of the Related Art Conventionally, a PTC thermistor using a conductive polymer having PTC characteristics in which carbon black or metal particles are dispersed in a crystalline polymer has been known. P
The TC characteristic is that the crystalline polymer rapidly changes in volume from a crystalline state to an amorphous state at the melting point, so that the spacing between the conductive particles dispersed in the crystalline polymer is widened, resulting in contact between the particles. This is caused by the sudden increase in resistance.

【0003】以下、従来のPTCサーミスタである導電
性ポリマを含む電気デバイスを例にとり説明する。
An electric device including a conductive polymer which is a conventional PTC thermistor will be described below as an example.

【0004】従来の導電性ポリマを含む電気デバイスに
ついては特開昭62−98601号公報に、少なくとも
2つの電極および導電性ポリマからなる要素を有し、電
極の少なくとも1つが導電性ポリマの要素と直接物理的
に接しているものが開示されている。
Japanese Patent Application Laid-Open No. 62-98601 discloses a conventional electric device containing a conductive polymer, which has at least two electrodes and a conductive polymer element, and at least one of the electrodes is a conductive polymer element. Those that are in direct physical contact are disclosed.

【0005】以下に、従来の電気デバイスについて説明
する。導電性ポリマは有機ポリマ中に分散させた、粒状
の導電性充填剤を含んで成り、PTC(正温度係数)挙
動として知られた挙動を示す。また、このPTC特性を
有する導電性ポリマと共に使用される電極には単線、金
属箔、金属シート等があり、このような金属箔等は、導
電性ポリマ層の両面にはんだ接合により電気的に接続さ
れていた。
A conventional electric device will be described below. The conductive polymer comprises a particulate conductive filler dispersed in an organic polymer and exhibits what is known as PTC (Positive Temperature Coefficient) behavior. Further, the electrodes used together with the conductive polymer having the PTC property include a single wire, a metal foil, a metal sheet, etc. Such a metal foil etc. is electrically connected to both surfaces of the conductive polymer layer by soldering. It had been.

【0006】以上のように構成された電気デバイスは、
電気電子機器のプリント基板上に実装される。その回路
の短絡等の異常が生じた場合、自己発熱による急激な抵
抗値の増大によって、回路に流れる電流を所定の電流以
下に制限する。その後回路の短絡等の異常が取り除かれ
た場合に復帰する回路保護素子として用いられる。
The electric device configured as described above is
It is mounted on a printed circuit board of an electric / electronic device. When an abnormality such as a short circuit occurs in the circuit, the current flowing through the circuit is limited to a predetermined current or less by a rapid increase in resistance value due to self-heating. After that, it is used as a circuit protection element that recovers when an abnormality such as a circuit short circuit is removed.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、上記従
来のPTCサーミスタである電気デバイスにおいては、
電極をはんだ接合するとき、PTC特性を有する導電性
ポリマ層(以下、「導電性ポリマ層」と記す。)が、は
んだの融点である183℃以上の温度にさらされるた
め、導電性ポリマ層が変質して所望の抵抗値より高くな
ったり、このPTCサーミスタである電気デバイスをフ
ロー法等によりプリント基板上に実装する際、電極と金
属端子との接合部のはんだの溶解時に金属端子がずれる
ことがあるため、はんだの溶融温度の影響を受けにくい
ものが要求されている。
However, in the electric device which is the conventional PTC thermistor described above,
When the electrodes are soldered, the conductive polymer layer having PTC characteristics (hereinafter referred to as “conductive polymer layer”) is exposed to a temperature of 183 ° C. or higher, which is the melting point of solder, so that the conductive polymer layer is It may deteriorate and become higher than the desired resistance value, or the metal terminal may be displaced when the solder at the joint between the electrode and the metal terminal is melted when mounting this PTC thermistor electric device on the printed circuit board by the flow method etc. Therefore, there is a demand for a material that is less susceptible to the melting temperature of solder.

【0008】本発明は、導電性ポリマ層の変質による抵
抗値の変化が少なく、プリント基板への実装時に電極と
金属端子との接合部がずれることが少ないPTCサーミ
スタおよびその製造方法を提供することを目的とするも
のである。
The present invention provides a PTC thermistor and a method for manufacturing the PTC thermistor, in which the resistance value hardly changes due to the deterioration of the conductive polymer layer and the joint portion between the electrode and the metal terminal is not displaced during mounting on the printed circuit board. The purpose is.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に本発明は、基板の上の一方の側部に第1の開口部を有
するように設けられた第1の電極層と、前記第1の電極
層と第1の開口部との上面に設けられたPTC特性を有
する導電性ポリマ層と、前記導電性ポリマ層の上面に前
記第1の開口部と反対側の側部に第2の開口部を有する
ように設けられた第2の電極層とを備えたものである。
In order to achieve the above object, the present invention provides a first electrode layer provided on one side of a substrate so as to have a first opening, A conductive polymer layer having PTC characteristics provided on the upper surface of the first electrode layer and the first opening, and a second conductive film on the upper surface of the conductive polymer layer on the side opposite to the first opening. And a second electrode layer provided so as to have the opening.

【0010】また、基板の上面の一方の側部に第1の開
口部を有するように第1の電極層を形成し、次に前記第
1の電極層と第1の開口部との上面にPTC特性を有す
る導電性ポリマ層を形成し、次に前記導電性ポリマ層の
上面に前記第1の開口部と反対側の側部に第2の開口部
を有するように第2の電極層を形成して製造するもので
ある。
A first electrode layer is formed so as to have a first opening on one side of the upper surface of the substrate, and then on the upper surface of the first electrode layer and the first opening. A conductive polymer layer having PTC characteristics is formed, and then a second electrode layer is formed on the upper surface of the conductive polymer layer so as to have a second opening on a side opposite to the first opening. It is formed and manufactured.

【0011】[0011]

【発明の実施の形態】本発明の請求項1に記載の発明
は、基板と、前記基板の上面の一方の側部に第1の開口
部を有するように設けられた第1の電極層と、前記第1
の電極層と第1の開口部との上面に設けられたPTC特
性を有する導電性ポリマ層と、前記導電性ポリマ層の上
面に前記第1の開口部と反対側の側部に第2の開口部を
有するように設けられた第2の電極層と、前記第2の電
極層と第2の開口部との上面に設けられた保護層と、前
記基板の端面に前記第1の電極層と第2の電極層と電気
的に接続するように設けられた端面電極とを備えたもの
である。このため、電極と端子とは一体構造となり、プ
リント基板へ実装時に熱が加えられても電極と端子の接
合部がずれることが少ないという作用を有するものであ
る。
BEST MODE FOR CARRYING OUT THE INVENTION The invention according to claim 1 of the present invention comprises: a substrate; and a first electrode layer provided so as to have a first opening on one side of an upper surface of the substrate. , The first
A conductive polymer layer having PTC characteristics provided on the upper surface of the electrode layer and the first opening, and a second conductive film on the upper surface of the conductive polymer layer on the side opposite to the first opening. A second electrode layer provided so as to have an opening, a protective layer provided on the upper surfaces of the second electrode layer and the second opening, and the first electrode layer on the end face of the substrate. And an end face electrode provided so as to be electrically connected to the second electrode layer. Therefore, the electrode and the terminal have an integrated structure, and even if heat is applied to the printed board during mounting, the joint between the electrode and the terminal is less likely to be displaced.

【0012】また、請求項2に記載の発明は、請求項1
記載の発明に、第1、第2の電極層を金属粉を含む樹脂
よりなるものにするため、電極と導電性ポリマ層との接
着部のずれが少ないという作用を有するものである。
The invention described in claim 2 is the first invention.
Since the first and second electrode layers are made of a resin containing metal powder in the invention described above, there is an effect that there is little deviation in the bonded portion between the electrode and the conductive polymer layer.

【0013】また、請求項3に記載の発明は、請求項1
記載の発明に、保護層をポリイミドフィルムで設けるた
め、印刷時の位置合わせの必要がなく、任意の厚みの保
護層を容易に設けることができるという作用を有するも
のである。
[0013] The invention described in claim 3 is the first invention.
Since the protective layer is provided by the polyimide film in the invention described above, there is no need for alignment during printing, and the protective layer having an arbitrary thickness can be easily provided.

【0014】また、請求項4に記載の発明は、まず基板
の上面の一方の側部に第1の開口部を有するように第1
の電極層を形成し、次に前記第1の電極層と第1の開口
部との上面にPTC特性を有する導電性ポリマ層を形成
し、次に前記導電性ポリマ層の上面に前記第1の開口部
と反対側の側部に第2の開口部を有するように第2の電
極層を形成し、前記第2の電極層と第2の開口部との上
面に保護層を形成し、次に前記第1、第2の開口部の端
部に沿って短冊状に切断する1次基板分割を行い、次に
前記1次基板分割で形成された短冊状の基板の前記第
1、第2の開口部を有する端面に前記第1の電極層と第
2の電極層と電気的に接続するように端面電極を形成
し、次に前記短冊状の基板を個片状に2次基板分割して
製造するものである。
According to a fourth aspect of the invention, firstly, the first opening is formed on one side of the upper surface of the substrate.
A conductive polymer layer having PTC characteristics is formed on the upper surfaces of the first electrode layer and the first opening, and then the first conductive layer is formed on the upper surface of the conductive polymer layer. A second electrode layer is formed so as to have a second opening on the side opposite to the opening, and a protective layer is formed on the upper surface of the second electrode layer and the second opening. Next, primary substrate division is performed by cutting along the edges of the first and second openings into strips, and then the first and second strip-shaped substrates formed by the primary substrate division are separated. An end face electrode is formed on the end face having two openings so as to be electrically connected to the first electrode layer and the second electrode layer, and then the strip-shaped substrate is divided into individual secondary substrates. And manufactured.

【0015】以上の製造方法により、素子の抵抗値を低
くすることができ量産性に優れるという作用を有するも
のである。
By the above manufacturing method, the resistance value of the element can be lowered and the mass productivity is excellent.

【0016】(実施の形態1)以下、本発明の一実施の
形態におけるチップ型PTCサーミスタおよびその製造
方法について、図面を参照しながら説明する。
(First Embodiment) A chip type PTC thermistor and a method of manufacturing the same according to an embodiment of the present invention will be described below with reference to the drawings.

【0017】図1は、本発明の一実施の形態におけるチ
ップ型PTCサーミスタの断面斜視図である。
FIG. 1 is a sectional perspective view of a chip type PTC thermistor in one embodiment of the present invention.

【0018】図において、1はアルミナ等よりなる基板
である。2は基板1の上面の一方の側部に第1の開口部
3を有するように設けられた比抵抗10-3Ω・cm以下
のフェノール系の導電性樹脂からなる第1の電極層であ
る。4は第1の電極層2と第1の開口部3との上面に設
けられた結晶性ポリマと導電性粒子との組成物よりなる
導電性ポリマ層である。5は導電性ポリマ層4の上面に
第1の開口部3と反対側の側部に第2の開口部6を有す
るように設けられた比抵抗10-3Ω・cm以下のフェノ
ール系の導電性樹脂からなる第2の電極層である。7は
第2の電極層5と第2の開口部6との上面に設けられた
エポキシ系の絶縁性樹脂からなる保護層である。8は基
板1の端面に第1の電極層2と第2の電極層5とを電気
的に接続するように設けられた端面電極である。
In the figure, 1 is a substrate made of alumina or the like. Reference numeral 2 is a first electrode layer made of a phenolic conductive resin having a specific resistance of 10 −3 Ω · cm or less, which is provided so as to have the first opening 3 on one side of the upper surface of the substrate 1. . Reference numeral 4 is a conductive polymer layer made of a composition of a crystalline polymer and conductive particles provided on the upper surfaces of the first electrode layer 2 and the first opening 3. 5 is a phenolic conductive material having a specific resistance of 10 −3 Ω · cm or less, which is provided on the upper surface of the conductive polymer layer 4 so as to have the second opening 6 on the side opposite to the first opening 3. The second electrode layer is made of a conductive resin. Reference numeral 7 is a protective layer provided on the upper surfaces of the second electrode layer 5 and the second opening 6 and made of an epoxy-based insulating resin. Reference numeral 8 denotes an end face electrode provided on the end face of the substrate 1 so as to electrically connect the first electrode layer 2 and the second electrode layer 5.

【0019】以上のように構成されたチップ型PTCサ
ーミスタについて、以下にその製造方法を図面を参照し
ながら説明する。
The manufacturing method of the chip type PTC thermistor configured as above will be described below with reference to the drawings.

【0020】図2〜図6は本発明の一実施の形態におけ
るチップ型PTCサーミスタの製造方法を示す工程図で
ある。
2 to 6 are process charts showing a method of manufacturing a chip type PTC thermistor in one embodiment of the present invention.

【0021】まず、図2に示すように、アルミナ等より
なる基板1の上面の一方の側部に第1の開口部3を有す
るように比抵抗10-3Ω・cm以下のフェノール系導電
性ペーストをスクリーン印刷し、約150℃で約30分
間硬化させて第1の電極層2を形成する。
First, as shown in FIG. 2, a phenol-based conductive material having a specific resistance of 10 −3 Ω · cm or less so as to have a first opening 3 on one side of the upper surface of a substrate 1 made of alumina or the like. The paste is screen-printed and cured at about 150 ° C. for about 30 minutes to form the first electrode layer 2.

【0022】次に、結晶化度70〜90%の高密度ポリ
エチレンを51重量%と、ファーネス法で製造した平均
粒径58nm、比表面積38m2/gのカーボンブラッ
クを43重量%と、酸化防止剤を1重量%と、カップリ
ング剤5重量%とを、約150℃に加熱した2本ロール
にて約20分間混合し、この混合物を2本ロールからシ
ート状で取り出し、厚みが約0.2mmになるように金
属版で押えながら冷却し、これを基板1と同程度の大き
さに切断し導電性ポリマ層4を作製する。
Next, 51% by weight of high-density polyethylene having a crystallinity of 70 to 90% and 43% by weight of carbon black having an average particle diameter of 58 nm and a specific surface area of 38 m 2 / g produced by the furnace method were used as an antioxidant. 1% by weight of the agent and 5% by weight of the coupling agent were mixed for about 20 minutes by a two-roll heated to about 150 ° C., and the mixture was taken out from the two-roll in a sheet form and had a thickness of about 0. The conductive polymer layer 4 is manufactured by cooling while pressing it with a metal plate so as to have a thickness of 2 mm, and cutting this into a size similar to that of the substrate 1.

【0023】次に、図3に示すように、前工程で作製し
た導電性ポリマ層4を基板1の第1の開口部3および第
1の電極層2の上面に積層し、約150℃に加熱した熱
プレス機で、約20kg/cm2で約10秒間圧着し、
導電性ポリマ層4を基板1の第1の開口部3および第1
の電極層2に接合する。
Next, as shown in FIG. 3, the conductive polymer layer 4 prepared in the previous step is laminated on the upper surfaces of the first opening 3 of the substrate 1 and the first electrode layer 2, and the temperature is raised to about 150.degree. With a heated heat press machine, crimp at about 20 kg / cm 2 for about 10 seconds,
The conductive polymer layer 4 is applied to the first opening 3 and the first opening 3 of the substrate 1.
To the electrode layer 2.

【0024】次に、図4に示すように、導電性ポリマ層
4の上面に、第1の開口部3と反対側の側部に第2の開
口部6を有するように比抵抗10-3Ω・cm以下のフェ
ノール系導電性ペーストをスクリーン印刷し、約120
℃で約30分間硬化させて第2の電極層5を形成する。
Next, as shown in FIG. 4, on the upper surface of the conductive polymer layer 4, the specific resistance 10 −3 is formed so as to have the second opening 6 on the side opposite to the first opening 3. Screen-print a phenolic conductive paste of Ω · cm or less to about 120
The second electrode layer 5 is formed by curing at 30 ° C. for about 30 minutes.

【0025】次に、図5に示すように、第2の電極層5
および第2の開口部6の上面に、エポキシ系の絶縁性樹
脂をスクリーン印刷し、約120℃で約10分間乾燥さ
せて保護層7を形成する。さらに、導電性ポリマ層4
に、電子線照射装置内で電子線を約20Mrad照射
し、導電性ポリマ層4に含まれる高密度ポリエチレンに
放射線架橋を施した後、第1の開口部3と平行に、ダイ
シングで短冊状に切断する1次基板分割を行う。
Next, as shown in FIG. 5, the second electrode layer 5
An epoxy-based insulating resin is screen-printed on the upper surface of the second opening 6 and dried at about 120 ° C. for about 10 minutes to form the protective layer 7. In addition, the conductive polymer layer 4
Then, after irradiating about 20 Mrad of an electron beam in the electron beam irradiating device to crosslink the high-density polyethylene contained in the conductive polymer layer 4 with radiation, parallel to the first opening 3 and formed into strips by dicing. The primary substrate division for cutting is performed.

【0026】次に、図6に示すように、前工程で1次基
板分割した短冊状の基板の、第1の開口部3および第2
の開口部6を有する端面に、第1の電極層2と第2の電
極層5とに電気的に接続するように、フェノール系の導
電性ペーストを塗布し、約120℃で約30分間硬化さ
せて基板1に固着させ、端面電極8を形成する。この
後、この短冊状の基板を1次基板分割の切断面に対して
直角方向にダイシングで切断し、個片状に2次基板分割
を行う。
Next, as shown in FIG. 6, the first opening 3 and the second opening 3 of the strip-shaped substrate divided into the primary substrate in the previous step.
A phenolic conductive paste is applied to the end surface having the opening 6 of the above so as to be electrically connected to the first electrode layer 2 and the second electrode layer 5 and cured at about 120 ° C. for about 30 minutes. Then, the end face electrode 8 is formed by fixing the end face electrode 8 to the substrate 1. After this, the strip-shaped substrate is cut by dicing in a direction perpendicular to the cut surface of the primary substrate division, and the secondary substrate is divided into individual pieces.

【0027】最後に、端面電極8の表面にニッケルめっ
き、はんだめっきを施してチップ型PTCサーミスタを
製造するものである。
Finally, the surface of the end face electrode 8 is nickel-plated or solder-plated to manufacture a chip type PTC thermistor.

【0028】以上のように構成、製造された本発明の一
実施の形態におけるチップ型PTCサーミスタをリフロ
ー法でプリント基板上にはんだ接続により実装した。実
装後の目視検査では、電極のずれ等の異常はなく、端面
電極とプリント基板間のはんだフィレットも十分に形成
されていた。
The chip type PTC thermistor according to the embodiment of the present invention constructed and manufactured as described above was mounted on the printed circuit board by soldering by the reflow method. In visual inspection after mounting, there was no abnormality such as electrode displacement, and solder fillets between the end face electrodes and the printed circuit board were also sufficiently formed.

【0029】図7は本発明の一実施の形態におけるチッ
プ型PTCサーミスタの温度と抵抗値との関係を示す図
である。本図で得られた特性は、チップ型PTCサーミ
スタを恒温槽内に置き、約25℃〜150℃まで温度上
昇させたときの抵抗値を測定したものである。このチッ
プ型PTCサーミスタの常温(25℃)での抵抗値は
0.6Ωであり、常温では1Ω以下の低い抵抗値を示し
ている。また、大電流が流れる等、約120℃になると
抵抗値が急激に変化することより、従来と同様の効果が
得られるものである。
FIG. 7 is a diagram showing the relationship between the temperature and the resistance value of the chip type PTC thermistor in one embodiment of the present invention. The characteristics obtained in this figure are obtained by placing the chip type PTC thermistor in a constant temperature bath and measuring the resistance value when the temperature is raised to about 25 ° C to 150 ° C. The resistance value of this chip type PTC thermistor at room temperature (25 ° C.) is 0.6Ω, and it shows a low resistance value of 1Ω or less at room temperature. Further, since the resistance value changes abruptly at about 120 ° C. such as when a large current flows, the same effect as in the conventional case can be obtained.

【0030】なお、本発明の一実施の形態では、第1の
電極層2、第2の電極層5および端面電極8はフェノー
ル系の導電性樹脂としたが、それぞれエポキシ系、ウレ
タン系あるいはポリエステル系のものであっても良く、
また、保護層7はエポキシ系樹脂としたが、フェノール
系またはポリエステル系のものであっても同様の効果が
得られるものである。
In the embodiment of the present invention, the first electrode layer 2, the second electrode layer 5 and the end surface electrode 8 are made of a phenol-based conductive resin. It may be of a type,
Although the protective layer 7 is made of epoxy resin, a similar effect can be obtained even if it is made of phenol or polyester.

【0031】また、第1の電極層2および第2の電極層
5の表面をプラズマエッチングあるいはブラスト等によ
って0.1μm以上の表面粗さとすると、導電性ポリマ
層4との接着強度を大きくすることができるものであ
る。
If the surfaces of the first electrode layer 2 and the second electrode layer 5 are made to have a surface roughness of 0.1 μm or more by plasma etching or blasting, the adhesive strength with the conductive polymer layer 4 is increased. Is something that can be done.

【0032】また、基板はアルミナ基板でなく、フェノ
ール樹脂等の基板を用いても同様の効果が得られるもの
である。
The same effect can be obtained by using a substrate made of phenol resin or the like instead of the alumina substrate.

【0033】また、2次分割後に端面電極8にニッケル
めっきとはんだめっきを施すと説明したが、1次分割後
にニッケルめっき、はんだめっきを施し、その後2次分
割を行っても同様の効果をもったチップ型PTCサーミ
スタを得ることができる。
Although it has been described that the end surface electrode 8 is nickel-plated and solder-plated after the secondary division, the same effect can be obtained even if nickel-plating and solder-plating are performed after the primary division and then the secondary division is performed. It is possible to obtain a chip type PTC thermistor.

【0034】(実施の形態2)以下、本発明の他の実施
の形態におけるチップ型PTCサーミスタおよびその製
造方法について、図面を参照しながら説明する。
(Second Embodiment) A chip type PTC thermistor and a method of manufacturing the same according to another embodiment of the present invention will be described below with reference to the drawings.

【0035】図8は本発明の他の実施の形態におけるチ
ップ型PTCサーミスタの断面斜視図である。
FIG. 8 is a sectional perspective view of a chip type PTC thermistor according to another embodiment of the present invention.

【0036】図において、11はアルミナ等よりなる基
板である。12は基板11の上面の一方の側部に第1の
開口部13を有するように設けられた比抵抗10-3Ω・
cm以下のフェノール系の導電性樹脂からなる第1の電
極層である。14は第1の電極層12と第1の開口部1
3との上面に設けられた結晶性ポリマと導電性粒子との
組成物よりなる導電性ポリマ層である。15は導電性ポ
リマ層14の上面に第1の開口部13と反対側の側部に
第2の開口部(図示せず)を有するように設けられた比
抵抗10-3Ω・cm以下のフェノール系の導電性樹脂か
らなる第2の電極層である。16は第2の開口部の上面
に設けられたエポキシ系の絶縁性樹脂からなる絶縁性樹
脂部である。17は第2の電極層15と絶縁性樹脂部1
6との上面に設けられたポリイミドフィルムからなる保
護層である。18は基板11の端面に第1の電極層12
と第2の電極層15と電気的に接続するように設けられ
た端面電極である。
In the figure, 11 is a substrate made of alumina or the like. 12 is a specific resistance 10 −3 Ω · which is provided so as to have the first opening 13 on one side of the upper surface of the substrate 11.
The first electrode layer is made of a phenol-based conductive resin having a size of cm or less. 14 is the first electrode layer 12 and the first opening 1
3 is a conductive polymer layer made of a composition of a crystalline polymer and conductive particles provided on the upper surface of the conductive polymer. Reference numeral 15 designates a specific resistance of 10 −3 Ω · cm or less provided on the upper surface of the conductive polymer layer 14 so as to have a second opening (not shown) on the side opposite to the first opening 13. The second electrode layer is made of a phenolic conductive resin. Reference numeral 16 is an insulating resin portion made of an epoxy insulating resin provided on the upper surface of the second opening. Reference numeral 17 denotes the second electrode layer 15 and the insulating resin portion 1.
6 is a protective layer made of a polyimide film provided on the upper surface. Reference numeral 18 denotes the first electrode layer 12 on the end face of the substrate 11.
And an end face electrode provided so as to be electrically connected to the second electrode layer 15.

【0037】以上のように構成されたチップ型PTCサ
ーミスタについて、以下にその製造方法を説明する。
The manufacturing method of the chip type PTC thermistor configured as described above will be described below.

【0038】まず、アルミナ等よりなる基板11の上面
の一方の側部に第1の開口部13を有するように比抵抗
10-3Ω・cm以下のフェノール系導電性ペーストをス
クリーン印刷し、約150℃で30分間硬化させて第1
の電極層12を形成する。
First, a phenolic conductive paste having a specific resistance of 10 −3 Ω · cm or less is screen-printed so as to have a first opening 13 on one side of the upper surface of the substrate 11 made of alumina or the like, and First cure at 150 ° C for 30 minutes
The electrode layer 12 of is formed.

【0039】次に、結晶化度70〜90%の高密度ポリ
エチレンを51重量%と、ファーネス法で製造した平均
粒径58nm、比表面積38m2/gのカーボンブラッ
クを43重量%と、酸化防止剤を1重量%と、カップリ
ング剤5重量%とを、約150℃に加熱した2本ロール
にて約20分間混合し、この混合物を2本ロールからシ
ート状で取り出し、厚みが約0.2mmになるように金
属版で押えながら冷却し、これを基板11と同程度の大
きさに切断し導電性ポリマ層14を作製する。
Next, 51% by weight of high-density polyethylene having a crystallinity of 70 to 90% and 43% by weight of carbon black having an average particle size of 58 nm and a specific surface area of 38 m 2 / g produced by the furnace method were used as an antioxidant. 1% by weight of the agent and 5% by weight of the coupling agent were mixed for about 20 minutes by a two-roll heated to about 150 ° C., and the mixture was taken out from the two-roll in a sheet form and had a thickness of about 0. The conductive polymer layer 14 is manufactured by cooling while pressing the metal plate so as to have a thickness of 2 mm, and cutting this into a size similar to that of the substrate 11.

【0040】次に、前工程で作製した導電性ポリマ層1
4を基板11の第1の開口部13および第1の電極層1
2の上面に積層し、約150℃に加熱した熱プレス機
で、約20kg/cm2で約10秒間圧着し、導電性ポ
リマ層14を基板11の第1の開口部13および第1の
電機層12に接合する。
Next, the conductive polymer layer 1 produced in the previous step
4 to the first opening 13 of the substrate 11 and the first electrode layer 1
2 is laminated on the upper surface of the substrate 2 and heated by a heat press machine at about 150 ° C. and pressure-bonded at about 20 kg / cm 2 for about 10 seconds to form the conductive polymer layer 14 in the first opening 13 of the substrate 11 and the first electric machine. Bond to layer 12.

【0041】次に、保護層17を形成するポリイミドフ
ィルムの一面に、第2の開口部を有するようにウレタン
系の導電性ペーストをスクリーン印刷し、約150℃で
約30分間硬化させて第2の電極層15を形成する。
Next, a urethane-based conductive paste is screen-printed on one surface of the polyimide film forming the protective layer 17 so as to have the second opening, and the paste is cured at about 150 ° C. for about 30 minutes to make the second. The electrode layer 15 of is formed.

【0042】次に、前工程でポリイミドフィルムの上面
に形成された第2の開口部にエポキシ系の絶縁性ペース
トを印刷し、約120℃で約10分間硬化させて絶縁性
樹脂部16を作製した。これを基板11上に接合された
導電性ポリマ層14上に積層し、約150℃に加熱した
熱プレス機を用いて、約20kg/cm2で約10秒間
プレスして第2の電極層15および絶縁性樹脂部16お
よび保護層17を形成する。さらに、導電性ポリマ層1
4に、電子線照射装置内で電子線を約20Mrad照射
し、導電線ポリマ層14に含まれる高密度ポリエチレン
に放射線架橋を施した後、第1の開口部13と平行に、
ダイシングで短冊状に切断する1次基板分割を行う。
Next, an epoxy-based insulating paste is printed in the second opening formed on the upper surface of the polyimide film in the previous step and cured at about 120 ° C. for about 10 minutes to produce the insulating resin portion 16. did. This is laminated on the conductive polymer layer 14 bonded on the substrate 11 and is pressed at about 20 kg / cm 2 for about 10 seconds using a heat press machine heated to about 150 ° C. to form the second electrode layer 15 Then, the insulating resin portion 16 and the protective layer 17 are formed. Further, the conductive polymer layer 1
4 was irradiated with an electron beam of about 20 Mrad in the electron beam irradiation device to perform radiation crosslinking on the high-density polyethylene contained in the conductive wire polymer layer 14, and then in parallel with the first opening 13.
The primary substrate is divided into strips by dicing.

【0043】次に、前工程で1次基板分割した短冊状の
基板の、第1の開口部13および絶縁性樹脂部16を有
する端面に、第1の電極層12と第2の電極層15と電
気的に接続するように、フェノール系の導電性ペースト
を塗布し、約120℃で約30分間硬化させ、基板4に
固着させて端面電極18を形成する。この後、この短冊
状の基板を1次基板分割の切断面に対して直角方向にダ
イシングで個片状に2次基板分割する。
Next, the first electrode layer 12 and the second electrode layer 15 are formed on the end face having the first opening 13 and the insulating resin portion 16 of the strip-shaped substrate obtained by dividing the primary substrate in the previous step. A phenol-based conductive paste is applied so as to be electrically connected to, and cured at about 120 ° C. for about 30 minutes, and fixed to the substrate 4 to form the end face electrode 18. Then, the strip-shaped substrate is divided into individual secondary substrates by dicing in a direction perpendicular to the cut surface of the primary substrate division.

【0044】最後に、端面電極10の表面にニッケルめ
っき、はんだめっきを施して、チップ型PTCサーミス
タを製造するものである。
Finally, the surface of the end face electrode 10 is nickel-plated or solder-plated to manufacture a chip type PTC thermistor.

【0045】以上のように構成、製造されたチップ型P
TCサーミスタを、実施の形態1と同様に温度と抵抗値
との関係を調べると、このチップ型PTCサーミスタの
常温(25℃)での抵抗値は0.8Ωであり、常温では
1Ω以下の低い抵抗値を示していた。また、大電流が流
れる等、約120℃になると抵抗値が急激に変化するこ
とより、従来と同様の効果が得られるものである。
Chip type P constructed and manufactured as described above
When the relationship between the temperature and the resistance value of the TC thermistor is examined as in the first embodiment, the resistance value of this chip type PTC thermistor is 0.8Ω at room temperature (25 ° C.), which is as low as 1Ω or less at room temperature. It showed a resistance value. Further, since the resistance value changes abruptly at about 120 ° C. such as when a large current flows, the same effect as in the conventional case can be obtained.

【0046】なお、本発明の他の実施の形態では、保護
層17としてポリイミドフィルムを用いたが、PET等
のフィルムを用いても同様の効果が得られるものであ
る。
In the other embodiment of the present invention, the polyimide film is used as the protective layer 17, but the same effect can be obtained by using a film such as PET.

【0047】[0047]

【発明の効果】以上のように本発明は、導電性ポリマ層
の変質による抵抗値の変化が少なく、プリント基板への
実装時に電極と金属端子との接合部がずれることが少な
いチップ型PTCサーミスタを提供することができるも
のである。
As described above, according to the present invention, there is little change in resistance value due to alteration of the conductive polymer layer, and the joint portion between the electrode and the metal terminal is less likely to be displaced during mounting on the printed circuit board. Can be provided.

【0048】また、量産性に優れるチップ型PTCサー
ミスタの製造方法を提供することができるものである。
It is also possible to provide a method of manufacturing a chip type PTC thermistor which is excellent in mass productivity.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態におけるチップ型PTC
サーミスタの断面斜視図
FIG. 1 is a chip PTC according to an embodiment of the present invention.
Cross sectional perspective view of the thermistor

【図2】同工程図[Fig. 2]

【図3】同工程図[Fig. 3]

【図4】同工程図[Fig. 4]

【図5】同工程図[Fig. 5]

【図6】同工程図FIG. 6

【図7】同温度と抵抗値との関係を示す図FIG. 7 is a diagram showing the relationship between the same temperature and resistance value.

【図8】本発明の他の実施の形態におけるチップ型PT
Cサーミスタの断面斜視図
FIG. 8 is a chip-type PT according to another embodiment of the present invention.
Sectional perspective view of C thermistor

【符号の説明】[Explanation of symbols]

1 基板 2 第1の電極層 3 第1の開口部 4 導電性ポリマ層 5 第2の電極層 6 第2の開口部 7 保護層 8 端面電極 DESCRIPTION OF SYMBOLS 1 Substrate 2 1st electrode layer 3 1st opening part 4 Conductive polymer layer 5 2nd electrode layer 6 2nd opening part 7 Protective layer 8 End surface electrode

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 基板と、前記基板の上面の一方の側部に
第1の開口部を有するように設けられた第1の電極層
と、前記第1の電極層と第1の開口部との上面に設けら
れたPTC特性を有する導電性ポリマ層と、前記導電性
ポリマ層の上面の前記第1の開口部と反対側の側部に第
2の開口部を有するように設けられた第2の電極層と、
前記第2の電極層と第2の開口部との上面に設けられた
保護層と、前記基板の端面に前記第1の電極層と第2の
電極層とを電気的に接続するように設けられた端面電極
とを備えたチップ型PTCサーミスタ。
1. A substrate, a first electrode layer provided so as to have a first opening on one side of an upper surface of the substrate, the first electrode layer and the first opening. A conductive polymer layer having PTC characteristics provided on the upper surface of the first conductive layer, and a second conductive layer provided on the upper surface of the conductive polymer layer on a side opposite to the first opening. 2 electrode layers,
A protective layer provided on the upper surface of the second electrode layer and the second opening, and provided on the end surface of the substrate so as to electrically connect the first electrode layer and the second electrode layer. Chip-type PTC thermistor having an end face electrode.
【請求項2】 第1、第2の電極層は、金属粉を含む樹
脂よりなる請求項1記載のチップ型PTCサーミスタ。
2. The chip type PTC thermistor according to claim 1, wherein the first and second electrode layers are made of a resin containing metal powder.
【請求項3】 保護層は、ポリイミドフィルムである請
求項1記載のチップ型PTCサーミスタ。
3. The chip type PTC thermistor according to claim 1, wherein the protective layer is a polyimide film.
【請求項4】 まず基板の上面の一方の側部に第1の開
口部を有するように第1の電極層を形成し、次に前記第
1の電極層と第1の開口部との上面にPTC特性を有す
る導電性ポリマ層を形成し、次に前記導電性ポリマ層の
上面の前記第1の開口部と反対側の側部に第2の開口部
を有するように第2の電極層を形成し、前記第2の電極
層と第2の開口部との上面に保護層を形成し、次に前記
第1、第2の開口部の端部に沿って前記基板を短冊状に
切断する1次基板分割を行い、次に1次基板分割で形成
された前記短冊状の基板の前記第1、第2の開口部を有
する端面に前記第1の電極層と第2の電極層とを電気的
に接続するように端面電極を形成し、次に前記短冊状の
基板を個片状に2次基板分割してなるチップ型PTCサ
ーミスタの製造方法。
4. A first electrode layer is first formed on one side of an upper surface of a substrate so as to have a first opening, and then an upper surface of the first electrode layer and the first opening is formed. A conductive polymer layer having PTC characteristics, and then forming a second electrode layer having a second opening on a side opposite to the first opening on the upper surface of the conductive polymer layer. Forming a protective layer on the upper surface of the second electrode layer and the second opening, and then cutting the substrate into strips along the ends of the first and second openings. Primary substrate division is performed, and then the first electrode layer and the second electrode layer are formed on the end face having the first and second openings of the strip-shaped substrate formed by the primary substrate division. A method of manufacturing a chip type PTC thermistor in which an end face electrode is formed so as to electrically connect to each other, and then the strip-shaped substrate is divided into individual secondary substrates. .
JP890696A 1996-01-23 1996-01-23 Chip thermistor and its manufacture Pending JPH09199302A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP890696A JPH09199302A (en) 1996-01-23 1996-01-23 Chip thermistor and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP890696A JPH09199302A (en) 1996-01-23 1996-01-23 Chip thermistor and its manufacture

Publications (1)

Publication Number Publication Date
JPH09199302A true JPH09199302A (en) 1997-07-31

Family

ID=11705725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP890696A Pending JPH09199302A (en) 1996-01-23 1996-01-23 Chip thermistor and its manufacture

Country Status (1)

Country Link
JP (1) JPH09199302A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000003402A1 (en) * 1998-07-08 2000-01-20 Matsushita Electric Industrial Co., Ltd. Method for manufacturing chip ptc thermister
US6704997B1 (en) 1998-11-30 2004-03-16 Murata Manufacturing Co., Ltd. Method of producing organic thermistor devices
US6838972B1 (en) 1999-02-22 2005-01-04 Littelfuse, Inc. PTC circuit protection devices
CN111654987A (en) * 2020-06-04 2020-09-11 维沃移动通信(杭州)有限公司 Electronic device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000003402A1 (en) * 1998-07-08 2000-01-20 Matsushita Electric Industrial Co., Ltd. Method for manufacturing chip ptc thermister
EP1030316A1 (en) * 1998-07-08 2000-08-23 Matsushita Electric Industrial Co., Ltd. Method for manufacturing chip ptc thermister
US6481094B1 (en) 1998-07-08 2002-11-19 Matsushita Electric Industrial Co., Ltd. Method of manufacturing chip PTC thermistor
US6704997B1 (en) 1998-11-30 2004-03-16 Murata Manufacturing Co., Ltd. Method of producing organic thermistor devices
US6838972B1 (en) 1999-02-22 2005-01-04 Littelfuse, Inc. PTC circuit protection devices
CN111654987A (en) * 2020-06-04 2020-09-11 维沃移动通信(杭州)有限公司 Electronic device

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