JPH09198004A - Driving method for plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method of matrix type plasma display panel which allows exact lighting display in accordance with pixel data. SOLUTION: This driving method is related to an AC type plasma display panel which is provided with plural line electrode pairs arranged each in a pair of two electrodes and plural row electrodes arranged in the direction perpendicular to the direction of the line electrode pairs. These line electrode pairs are divided into plural blocks each composed from a specified number of line electrode pairs, and each block is given a priming period in which one of the line electrode pair is successively impressed with priming pulses and a writing period in which the succeeding scanning pulses are successively impressed. And it is required that the priming period and the writing period of the block of 1 in plural blocks do not lie on top of the priming period and the writing period of any block other than 1.

Description

Detailed Description of the Invention

[0002]

[0001]

[0003]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving an AC discharge type matrix type plasma display panel.

[0004]

[0002]

[0005]

2. Description of the Related Art As is well known, various researches have recently been made on a plasma display panel as one of thin secondary screen displays, and one of them is an AC discharge type matrix plasma display having a memory function. Display panels are known.

FIG. 3 is a diagram showing a schematic configuration of a plasma display device including such a plasma display panel.

[0007]

In FIG. 3, the drive unit 100 is
The input video signal is converted into digital pixel data corresponding to each pixel, and pixel data pulses corresponding to the pixel data are applied to the column electrodes D _{1 to} D _m of the PDP (plasma display panel) 11. PDP11
Are the column electrodes D _{1 to} D _m , and the row electrodes X ₁ to X ₁ which are orthogonal to the column electrodes and constitute one row with a pair of X and Y.
And a X _n and Y ₁ to Y _n. Each of these column electrode and row electrode pairs is formed with a dielectric (not shown) in between,
One pixel cell is formed at a portion where one column electrode and one row electrode pair intersect.

[0008]

The driving device 100 has reset write pulses RP _x and RP for forming wall charges by forcibly performing discharge excitation between all the row electrode pairs of the PDP 11.
It generates a _y applying these people to the row electrodes X ₁ to X _n and Y ₁ to Y _n husband PDP 11. Further, the drive device 100 is
A scan pulse SP for writing the pixel data in the PDP 11, sustain pulses IP _x and IP _y for maintaining discharge light emission, and an erase pulse EP for stopping sustain discharge light emission are generated to generate these pulses. Are applied to the row electrodes X _{1 to} X _n and Y _{1 to} Y _n .

[0009]

FIG. 4 is a diagram showing application timings of the above-mentioned various drive pulses.

In FIG. 4, first, the drive unit 100 is
Negative voltage reset write pulse RP _x is applied to all row electrodes X.
And at the same time it applied to ₁ to X _n, and applies the reset write pulse RP _y of a positive voltage to each of the row electrodes Y ₁ to Y _n. By applying the reset write pulse, discharge is generated between all row electrode pairs of the PDP 11. Due to this discharge, charged particles and excited particles (hereinafter referred to as priming particles) are generated in each pixel cell, and wall charges are accumulated and formed after the end of the discharge (reset write process).

[0011]

Next, the driving device 100 sequentially applies the pixel data pulses DP _{1 to} DP _n corresponding to the pixel data of each row to the column electrodes D _{1 to} D _m . The driving device 100
The scanning pulse SP is sequentially applied to the row electrodes Y ₁ to Y _n in synchronization with the application timing of each of the pixel data pulses DP _{1 to} DP _n . At this time, the pixel data pulse D
Discharge occurs only in the pixel cells to which P and the scan pulse SP are simultaneously applied to the column electrode and the row electrode, respectively, and most of the wall charges formed by the reset writing disappear. On the other hand, in the pixel cell to which the scanning pulse SP is applied but the pixel data pulse DP is not applied, the above-mentioned discharge does not occur, so the desired amount of wall charges formed by the reset writing is the content of the pixel data. Is selectively erased in accordance with the above (pixel data writing process).

[0012]

Next, the drive unit 100 continuously applies the positive sustain pulse IP _x to each of the row electrodes X _{1 to} X _n , and the timing is different from the application timing of the sustain pulse IP _x. At, the positive sustain pulse IP _y is continuously applied to each of the row electrodes Y _{1 to} Y _n . Only the pixel cells in which the wall charges remain during the period in which the sustain pulse is continuously applied maintain the discharge light emission (sustain discharge process).

[0013]

Next, the driving apparatus 100 causes the erase pulse EP
Is applied to each of the row electrodes X _{1 to} X _n to stop the sustain discharge (sustain discharge stop step).

In such a plasma display device, the reset writing described above forms a desired amount of priming particles in the discharge space of all pixel cells in advance, so that discharge can be performed even if the pulse width of the scan pulse SP is narrowed. I'm trying to occur.

[0015]

However, since such priming particles gradually disappear with the passage of time, as shown in FIG. 4, after the reset writing is completed, the scan pulse S
The time until the application of P becomes long, for example, the amount of priming particles existing in the discharge space of each pixel cell in the n-th row becomes a minute amount immediately before the application of the scanning pulse SP.

At this time, as shown in FIG. 4, even if the pixel data pulse DP and the scan pulse SP having a narrow pulse width are simultaneously applied to the pixel cell in which only a small amount of the priming particles are present, immediately. Since the discharge is not started, the wall charge corresponding to the pixel data may not be formed. Therefore, in this case, there is a problem that an incorrect light emission display is performed.

[0017]

[0010]

[0018]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a driving method of a matrix type plasma display panel capable of performing accurate light emission display corresponding to pixel data. With the goal.

[0019]

[0011]

[0020]

According to a first aspect of the present invention, there is provided a method of driving an AC type plasma display panel, comprising a plurality of row electrode pairs arranged in pairs of two and a direction orthogonal to the row electrode pair. A method of driving a plasma display panel comprising a plurality of column electrodes arranged in a plurality of row electrodes, wherein a plurality of row electrode pairs are divided into a plurality of blocks each including a predetermined number of row electrode pairs, and each row electrode pair is divided into a plurality of blocks. One of them has a priming period in which a priming pulse is sequentially applied and an address period in which a subsequent scanning pulse is sequentially applied.

An AC type plasma display panel driving method according to a second aspect of the present invention is the plasma display panel driving method according to the first aspect, wherein a priming period and a writing period of one block among a plurality of blocks are provided. Is not overlapped with the priming period and the writing period of blocks other than 1.

[0022]

[0012]

[0023]

A plurality of row electrode pairs are divided into a plurality of blocks each consisting of a predetermined number of row electrode pairs, and a priming period in which a priming pulse is sequentially applied to one of the row electrode pairs and a subsequent scanning pulse is sequentially applied to each of the blocks. Since the writing period is provided, the time interval between the priming pulse and the scanning pulse can be kept constant in any line, a stable display operation can be obtained, and an increase in writing time can be prevented.

[0024]

[0013]

[0025]

FIG. 2 is a diagram showing a configuration of a plasma display device having a driving device for driving a panel by the driving method according to the present invention.

In FIG. 2, the sync separation circuit 1 is
The horizontal and vertical synchronizing signals are extracted from the supplied input video signal and are supplied to the timing pulse generating circuit 2. The timing pulse generation circuit 2 generates an extracted synchronization signal timing pulse based on the extracted horizontal and vertical synchronization signals, and outputs the extracted synchronization signal timing pulse to each of the A / D converter 3, the memory control circuit 5, and the read timing signal generation circuit 7. To supply. The A / D converter 3 converts the input video signal into digital pixel data corresponding to each pixel in synchronization with the extraction sync signal timing pulse, and supplies the digital pixel data to the frame memory 4. The memory control circuit 5 supplies the frame memory 4 with a write signal and a read signal in synchronization with the extracted sync signal timing pulse. The frame memory 4 sequentially takes in each pixel data supplied from the A / D converter 3 according to the write signal. Also, the frame memory 4
Responds to the read signal and sequentially reads the pixel data stored in the frame memory 4 and supplies the pixel data to the output processing circuit 6 in the next stage. The read timing signal generating circuit 7 generates various timing signals for controlling the discharge light emitting operation, and supplies these to the row electrode drive pulse generating circuit 10,
And each of the output processing circuits 6. Output processing circuit 6
Supplies the pixel data supplied from the frame memory 4 to the pixel data pulse generation circuit 12 in synchronization with the timing signal from the read timing signal generation circuit 7.

[0027]

The pixel data pulse generation circuit 12 generates a pixel data pulse DP corresponding to each pixel data supplied from the output processing circuit 6 and applies it to the column electrodes D _{1 to} D _m of the PDP (plasma display panel) 11. Apply.

The row electrode drive pulse generation circuit 10 has the above P
Reset write pulses PP _x and PP _y for forcibly exciting a discharge between all row electrode pairs of the DP 11 to generate priming particles in a discharge space described below, and a priming pulse PP for reforming the priming particles. , A scan pulse SP for writing pixel data, sustain pulses IP _x and IP _y for sustaining discharge light emission,
Further, an erase pulse E for stopping the above-mentioned sustain discharge emission
And generating each of P, these are applied to the row electrodes X ₁ to X _n and Y ₁ to Y _n of the PDP11 at the timing corresponding to the various timing signals supplied from the reading timing signal generating circuit 7.

[0029]

FIG. 5 is a diagram showing the structure of the PDP 11.

In FIG. 5, the row electrodes Y _{1 to} Y _n are paired with each other on the inner surface of the front glass substrate 110 (the surface facing the rear glass substrate 113 described later) which is the display surface.
And row electrodes X _{1 to} X _n are formed. These row electrodes are covered with a dielectric layer 111. The dielectric layer 111 includes the MgO (magnesium oxide) layer 11
2 have been deposited. A discharge space 114 is formed between the MgO layer 112 and the rear glass substrate 113. The rear glass substrate 113 has a column electrode D coated with a phosphor.
_{1 to} D _m are formed. At this time, the row electrodes Y ₁ to
Y _n and row electrodes X _{1 to} X _n form one row of an image by a pair of X and Y, and the row electrode pair for one row intersects with one column electrode ( One pixel cell is formed in the portion (as viewed from the top).

[0031]

Next, a driving method of the matrix type plasma display panel according to the present invention, which is carried out in the plasma display device shown in FIG. 2, will be described.

FIG. 1 is a diagram showing the application timing of various pulses applied to the PDP 11 when the panel is driven by the driving method of the present invention.

[0033]

In FIG. 1, first, the row electrode drive pulse generation circuit 10 (FIG. 2) applies a reset write pulse RP _x having a positive voltage to all the row electrodes X _{1 to} X _n , and at the same time,
The negative voltage reset write pulse RP _y is applied to the row electrodes Y _{1 to} Y.
_Apply to each of _n . By applying the reset write pulse, discharge is excited between all row electrode pairs of the PDP 11, and priming particles are generated in the discharge space 114 of all pixel cells. After the end of this discharge, the dielectric layer 1 of all pixel cells
A predetermined amount of wall charges are uniformly formed on 11 (reset write process).

[0034]

Next, the pixel data pulse generation circuit 12 (FIG. 2) sequentially applies the positive voltage pixel data pulses DP _{1 to} DP _n corresponding to the pixel data for each row to the column electrodes D _{1 to} D _m . . At this time, the row electrode drive pulse generation circuit 10 (FIG. 2) synchronizes with each application timing of the pixel data pulses DP _{1 to} DP _n , and the scan pulse S having a small pulse width.
P is sequentially applied to the row electrodes Y ₁ to Y _n . Here, the row electrode drive pulse generation circuit 10 (FIG. 2) immediately before applying the scan pulse SP to each of the row electrodes Y _{1 to} Y _n , the priming pulse PP of a positive voltage as shown in FIG.
Is applied to each of the row electrodes Y _{1 to} Y _n . The period from the start of application of the priming pulse PP to the end of application of the scan pulse SP is processed so as not to overlap the corresponding period of another scan block as shown in FIG. That is, the priming pulse P is simultaneously applied to a plurality of scanning blocks.
The processing from the start of the application of P to the end of the application of the scan pulse SP is not performed.

[0035]

By applying the priming pulse PP, the priming particles obtained by the reset writing and reduced with the passage of time are reformed in the discharge space 114. Therefore, while the desired amount of priming particles are present in the discharge space 114, the scan pulse SP
That is, the pixel data is written by applying the voltage.

For example, when the content of the pixel data is logic "0", the pixel data pulse DP is applied simultaneously with the scan pulse SP, so that the wall charges formed inside the pixel cell disappear. On the other hand, when the content of the pixel data is logic "1", only the scan pulse SP is applied, so that no discharge occurs, and the wall charges formed inside the pixel cell are retained as they are. That is, the scanning pulse SP can be said to be a selective erasing pulse serving as a trigger for selectively erasing the wall charges formed in the pixel cell according to the pixel data (pixel data writing process).

[0037]

Next, the row electrode drive pulse generating circuit 10 (FIG. 2) continuously supplies the positive voltage sustaining pulse IP _x to the row electrode X.
_The sustain pulse I is applied to each of _{1 to} X _n.
A positive voltage sustaining pulse IP _y is continuously applied to each of the row electrodes Y _{1 to} Y _n at a timing deviated from the application timing of P _x . During the period in which the sustain pulse is continuously applied, only the pixel cells in which the wall charges remain remain maintain discharge light emission (sustain discharge step).

[0038]

Next, the row electrode drive pulse generation circuit 10 (FIG. 2) applies the erase pulse EP to each of the row electrodes X _{1 to} X _n to stop the above sustain discharge (sustain discharge stop step).

As described above, in such a plasma display panel driving method, the reset write pulse is applied to all the row electrodes all at once to perform the reset write all at once, and thereafter the charged particles in the discharge space are reformed. A priming pulse and a scanning pulse for writing pixel data are continuously applied to write pixel data for each row.

[0040]

Therefore, the time from the reformation of the priming particles by the priming pulse to the writing of the pixel data is the same in all rows. Therefore, the discharge space 11 of FIG.
Since the pixel data is written by applying the scan pulse SP while the predetermined amount of priming particles are present in 4, the pixel data can be written accurately. Further, even if the priming pulse is applied immediately before the scanning pulse, by sequentially applying the priming pulse and the scanning pulse to a predetermined number of blocks,
It is possible to relatively reduce the increase in the pixel data writing period.

[0041]

In the embodiment of the invention described above,
A priming pulse PP of a positive voltage and a scan pulse SP of a negative voltage are applied to one electrode of the pair of row electrodes X and Y, respectively, and these are scanned for each row. It is not limited.

[0042]

[0024]

[0043]

EFFECTS OF THE INVENTION A plurality of row electrode pairs are divided into a plurality of blocks each consisting of a predetermined number of row electrode pairs, and a priming period in which a priming pulse is sequentially applied to one of the row electrode pairs and a subsequent scanning pulse are sequentially applied to each block. Since the writing period to be applied is provided, it is possible to prevent an increase in the writing period time and to make the priming effect in each scanning line constant. That is, it is possible to eliminate the difference in the address discharge characteristic that occurs for each scanning line, expand the operation margin, and obtain a stable display operation.

[Brief description of drawings]

FIG. 1 is a diagram showing a drive pulse application timing according to a driving method of the present invention.

FIG. 2 is a diagram showing a configuration of a plasma display device according to the present invention.

FIG. 3 is a diagram showing a schematic configuration of a plasma display device including a matrix type plasma display panel.

FIG. 4 is a diagram showing a conventional drive pulse application timing.

FIG. 5 is a diagram showing a structure of a PDP.

[Explanation of symbols]

 1 ・ ・ ・ Synchronous separation circuit 2 ・ ・ ・ Timing pulse generation circuit 3 ・ ・ ・ ・ ・ A / D converter 4 ・ ・ ・ Frame memory 5 ・ ・ ・ ・ ・ Memory control circuit 6 ・ ・... Output processing circuit 7 ... Readout timing signal generation circuit 10 ... Row electrode drive pulse generation circuit 11 ... PDP 12 ... Pixel data pulse generation circuit 100 ...・ ・ ・ Driving device 110 ・ ・ ・ ・ ・ Front glass substrate 111 ・ ・ ・ Dielectric layer 112 ・ ・ ・ MgO layer 113 ・ ・ ・ Rear glass substrate 114 ・ ・ ・ ・ ・ Discharge space

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] December 19, 1996

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Detailed description of the invention

[Correction method] Change

[Correction contents]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving an AC discharge type matrix type plasma display panel.

[0002]

2. Description of the Related Art As is well known, various researches have recently been made on a plasma display panel as one of thin secondary screen displays, and one of them is an AC discharge type matrix plasma display having a memory function. Display panels are known. FIG. 3 is a diagram showing a schematic configuration of a plasma display device including such a plasma display panel.

In FIG. 3, the drive unit 100 is
Converts the input video signal into digital pixel data corresponding to each pixel, and applies the pixel data pulse corresponding to the pixel data to the column electrodes D ₁ to D _m of the PDP (plasma display panel) 11. PDP11
Are the column electrodes D _{1 to} D _m , and the row electrodes X ₁ to X ₁ which are orthogonal to the column electrodes and constitute one row by a pair of X and Y.
And a X _n and _Y 1 to Y _n. Each of these column electrode and row electrode pairs is formed with a dielectric (not shown) in between,
One pixel cell is formed at a portion where one column electrode and one row electrode pair intersect.

The driving device 100 has reset write pulses RP _x and RP for forming wall charges by forcibly performing discharge excitation between all the row electrode pairs of the PDP 11.
It generates a _y applying these people to the row electrodes _X 1 to X _n and _Y 1 to Y _n husband PDP 11. Further, the drive device 100 is
A scan pulse SP for writing the pixel data in the PDP 11, sustain pulses IP _x and IP _y for maintaining discharge light emission, and an erase pulse EP for stopping sustain discharge light emission are generated to generate these pulses. Are applied to the row electrodes X _{1 to} X _n and Y _{1 to} Y _n .

FIG. 4 is a diagram showing application timings of the above-mentioned various drive pulses. In FIG. 4, first, the driving apparatus 100 applies the reset write pulse RP _x having a negative voltage to all the row electrodes X _{1 to} X _n , and simultaneously applies the reset write pulse RP _y having a positive voltage to the row electrodes Y _{1 to} Y _n. To each of. By applying the reset write pulse, the PD
Discharge occurs between all row electrode pairs of P11. Due to this discharge, charged particles and excited particles (hereinafter referred to as priming particles) are generated in each pixel cell, and wall charges are accumulated and formed after the end of the discharge (reset write process).

Next, the driving device 100 sequentially applies the pixel data pulses DP _{1 to} DP _n corresponding to the pixel data of each row to the column electrodes D _{1 to} D _m . The driving device 100
The scanning pulse SP is sequentially applied to the row electrodes Y ₁ to Y _n in synchronization with the application timing of each of the pixel data pulses DP _{1 to} DP _n . At this time, the pixel data pulse D
Discharge occurs only in the pixel cells to which P and the scan pulse SP are simultaneously applied to the column electrode and the row electrode, respectively, and most of the wall charges formed by the reset writing disappear. On the other hand, in the pixel cell to which the scanning pulse SP is applied but the pixel data pulse DP is not applied, the above-mentioned discharge does not occur, so the desired amount of wall charges formed by the reset writing is the content of the pixel data. Is selectively erased in accordance with the above (pixel data writing process).

Next, the driving apparatus 100 continuously applies the positive sustain pulse IP _x to each of the row electrodes X _{1 to} X _n , and the timing is different from the application timing of the sustain pulse IP _x. At, the positive sustain pulse IP _y is continuously applied to each of the row electrodes Y _{1 to} Y _n . Only the pixel cells in which the wall charges remain during the period in which the sustain pulse is continuously applied maintain the discharge light emission (sustain discharge process).

Next, the driving apparatus 100 causes the erase pulse EP
Is applied to each of the row electrodes X _{1 to} X _n to stop the sustain discharge (sustain discharge stop step). In such a plasma display device, by the reset writing, a desired amount of priming particles are formed in advance in the discharge space of all pixel cells so that discharge can be generated even if the pulse width of the scan pulse SP is narrowed. ing.

However, since such priming particles gradually disappear with the passage of time, as shown in FIG. 4, after the reset writing is completed, the scan pulse S
The time until the application of P becomes long, for example, the amount of priming particles present in the discharge space of each pixel cell in the n-th row becomes a minute amount immediately before the application of the scan pulse SP. At this time, as shown in FIG. 4, for a pixel cell in which only a small amount of priming particles are present,
Pixel data pulse DP and scan pulse S with narrow pulse width
Even if the P is simultaneously applied, the discharge does not start immediately, so that the wall charge corresponding to the pixel data may not be formed in some cases. Therefore, in this case, there is a problem that an incorrect light emission display is performed.

[0010]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a driving method of a matrix type plasma display panel capable of performing accurate light emission display corresponding to pixel data. With the goal.

[0011]

According to a first aspect of the present invention, there is provided a method of driving an AC type plasma display panel, comprising a plurality of row electrode pairs arranged in pairs of two and a direction orthogonal to the row electrode pair. A method of driving a plasma display panel having a plurality of column electrodes arranged in a plurality of row electrode pairs, wherein a plurality of row electrode pairs are divided into a plurality of blocks each including a predetermined number of row electrode pairs, and each row electrode pair is One of them has a priming period in which a priming pulse is sequentially applied and an address period in which a subsequent scanning pulse is sequentially applied. An AC type plasma display panel driving method according to a second aspect of the present invention is the plasma display panel driving method according to the first aspect, wherein the priming period and the writing period of one of the plurality of blocks are other than one. It is characterized in that it does not overlap with the priming period and the writing period of the block.

[0012]

A plurality of row electrode pairs are divided into a plurality of blocks each consisting of a predetermined number of row electrode pairs, and a priming period in which a priming pulse is sequentially applied to one of the row electrode pairs and a subsequent scanning pulse is sequentially applied to each of the blocks. Since the writing period is provided, the time interval between the priming pulse and the scanning pulse can be kept constant in any line, a stable display operation can be obtained, and an increase in writing time can be prevented.

[0013]

FIG. 2 is a diagram showing a configuration of a plasma display device having a driving device for driving a panel by the driving method according to the present invention. In FIG.
The sync separation circuit 1 extracts horizontal and vertical sync signals from the supplied input video signal and supplies them to the timing pulse generation circuit 2. Timing pulse generation circuit 2
Generates an extracted synchronizing signal timing pulse based on the extracted horizontal and vertical synchronizing signals, and
The signal is supplied to each of the converter 3, the memory control circuit 5, and the read timing signal generation circuit 7. The A / D converter 3 converts the input video signal into digital pixel data corresponding to each pixel in synchronization with the extraction synchronization signal timing pulse,
This is supplied to the frame memory 4. Memory control circuit 5
Supplies to the frame memory 4 a write signal and a read signal which are synchronized with the extracted sync signal timing pulse. The frame memory 4 sequentially takes in each pixel data supplied from the A / D converter 3 according to the write signal. or,
The frame memory 4 sequentially reads the pixel data stored in the frame memory 4 in accordance with the read signal and supplies the pixel data to the output processing circuit 6 of the next stage. The read timing signal generation circuit 7 generates various timing signals for controlling the discharge light emission operation and supplies them to the row electrode drive pulse generation circuit 10 and the output processing circuit 6. The output processing circuit 6 supplies the pixel data supplied from the frame memory 4 to the pixel data pulse generation circuit 12 in synchronization with the timing signal from the read timing signal generation circuit 7.

The pixel data pulse generation circuit 12 generates a pixel data pulse DP corresponding to each pixel data supplied from the output processing circuit 6 and applies it to the column electrodes D _{1 to} D _m of the PDP (plasma display panel) 11. Apply. The row electrode drive pulse generation circuit 10 resets the write pulses PP _x and PP _y for forcibly exciting the discharge between all the row electrode pairs of the PDP 11 to generate priming particles in the discharge space described later, and the priming. A priming pulse PP for reforming particles, a scan pulse SP for writing pixel data, sustain pulses IP _x and IP _y for maintaining discharge emission, and an erase pulse EP for stopping the sustain discharge emission. each generates a, these are applied to the row electrodes X ₁ to X _n and Y ₁ to Y _n of the PDP11 at the timing corresponding to the various timing signals supplied from the reading timing signal generating circuit 7.

FIG. 5 is a diagram showing the structure of the PDP 11. In FIG. 5, the front glass substrate 1 which is the display surface
Row electrodes Y _{1 to} Y _n and row electrodes X _{1 to} X _n are formed on the inner surface of 10 (the surface facing a rear glass substrate 113 described later) so as to be paired with each other. These row electrodes are covered with a dielectric layer 111. On the dielectric layer 111, an MgO (magnesium oxide) layer 112 is deposited. MgO layer 112 and rear glass substrate 11
3, a discharge space 114 is formed. On the rear glass substrate 113, column electrodes D ₁ to
D _m is formed. At this time, the row electrodes Y _{1 to} Y _n
And the row electrodes X _{1 to} X _n form one row of an image with a pair of X and Y. The row electrode pair for one row intersects with one column electrode (from the top surface). One pixel cell is formed in the portion to be seen.

Next, a driving method of the matrix type plasma display panel according to the present invention, which is carried out in the plasma display device shown in FIG. 2, will be described. FIG. 1 is a diagram showing the application timing of various pulses applied to the PDP 11 when the panel is driven by the driving method of the present invention.

In FIG. 1, first, the row electrode drive pulse generation circuit 10 (FIG. 2) applies a reset write pulse RP _x having a positive voltage to all the row electrodes X _{1 to} X _n , and at the same time.
The negative voltage reset write pulse RP _y is applied to the row electrodes Y _{1 to} Y.
applied to each of _n . By applying the reset write pulse, discharge is excited between all row electrode pairs of the PDP 11, and priming particles are generated in the discharge space 114 of all pixel cells. After the end of this discharge, the dielectric layer 1 of all pixel cells
A predetermined amount of wall charges are uniformly formed on 11 (reset write process).

Next, the pixel data pulse generation circuit 12 (FIG. 2) sequentially applies positive voltage pixel data pulses DP _{1 to} DP _n corresponding to the pixel data of each row to the column electrodes D _{1 to} D _m . . At this time, the row electrode drive pulse generation circuit 10 (FIG. 2) synchronizes with each application timing of the pixel data pulses DP _{1 to} DP _n and scan pulse S having a small pulse width.
P is sequentially applied to the row electrodes Y ₁ to Y _n . Here, the row electrode drive pulse generation circuit 10 (FIG. 2) immediately before applying the scanning pulse SP to each of the row electrodes Y _{1 to} Y _n , the priming pulse PP of a positive voltage as shown in FIG.
Is applied to each of the row electrodes Y _{1 to} Y _n . The period from the start of application of the priming pulse PP to the end of application of the scan pulse SP is processed so as not to overlap the corresponding period of another scan block as shown in FIG. That is, the priming pulse P is simultaneously applied to a plurality of scanning blocks.
The processing from the start of the application of P to the end of the application of the scan pulse SP is not performed.

By applying the priming pulse PP, the priming particles obtained by the reset writing and reduced with the passage of time are reformed in the discharge space 114. Therefore, while the desired amount of priming particles are present in the discharge space 114, the scan pulse SP
That is, the pixel data is written by applying the voltage.
For example, when the content of the pixel data is logical "0", the pixel data pulse DP is applied simultaneously with the scan pulse SP, so that the wall charges formed inside the pixel cell disappear. On the other hand, when the content of the pixel data is logic "1", only the scan pulse SP is applied, so that no discharge occurs, and the wall charges formed inside the pixel cell are retained as they are. That is, the scanning pulse SP
It can be said that the selective erase pulse serves as a trigger for selectively erasing the wall charges formed in the pixel cell according to the pixel data (pixel data writing process).

Next, the row electrode drive pulse generating circuit 10 (FIG. 2) continuously supplies the positive voltage sustaining pulse IP _x to the row electrode X.
_{1 to} X _n , and the sustain pulse I is applied.
A positive voltage sustaining pulse IP _y is continuously applied to each of the row electrodes Y _{1 to} Y _n at a timing deviated from the application timing of P _x . During the period in which the sustain pulse is continuously applied, only the pixel cells in which the wall charges remain remain maintain discharge light emission (sustain discharge step).

Next, the row electrode drive pulse generating circuit 10 (FIG. 2) applies the erase pulse EP to each of the row electrodes X _{1 to} X _n to stop the above sustain discharge (sustain discharge stop step). As described above, in the plasma display panel driving method, after performing the reset write pulse by applying the reset write pulse to all the row electrodes all at once, a priming pulse for reforming the charged particles in the discharge space, Also, the scan pulse for writing the pixel data is continuously applied to write the pixel data for each row.

Therefore, the time from the reformation of the priming particles by the priming pulse to the writing of the pixel data is the same in all rows. Therefore, the discharge space 11 of FIG.
Since the pixel data is written by applying the scan pulse SP while the predetermined amount of priming particles are present in 4, the pixel data can be written accurately. Further, even if the priming pulse is applied immediately before the scanning pulse, by sequentially applying the priming pulse and the scanning pulse to a predetermined number of blocks,
It is possible to relatively reduce the increase in the pixel data writing period.

In the embodiment of the invention described above,
A priming pulse PP of a positive voltage and a scan pulse SP of a negative voltage are applied to one electrode of the pair of row electrodes X and Y, respectively, and these are scanned for each row. It is not limited.

[0024]

EFFECTS OF THE INVENTION A plurality of row electrode pairs are divided into a plurality of blocks each consisting of a predetermined number of row electrode pairs, and a priming period in which a priming pulse is sequentially applied to one of the row electrode pairs and a subsequent scanning pulse are sequentially applied to each block. Since the writing period to be applied is provided, it is possible to prevent an increase in the writing period time and to make the priming effect in each scanning line constant. That is, it is possible to eliminate the difference in the address discharge characteristic that occurs for each scanning line, expand the operation margin, and obtain a stable display operation.

Claims (2)

[Claims] 1. A method of driving a plasma display panel, comprising a plurality of row electrode pairs arranged in pairs of two and a plurality of column electrodes arranged in a direction orthogonal to the row electrode pairs. The plurality of row electrode pairs are divided into a plurality of blocks each including a predetermined number of row electrode pairs, and a priming period in which a priming pulse is sequentially applied to one of the row electrode pairs in each block and a scanning pulse subsequent thereto is sequentially applied. And a write period for controlling the plasma display panel. 2. The plasma display panel according to claim 1, wherein the priming period and the writing period of one block of the plurality of blocks do not overlap with the priming period and the writing period of blocks other than the one block. Driving method. [0001]