JPH09196952A - Circuit for detecting pulse train integration frequency value - Google Patents
Circuit for detecting pulse train integration frequency valueInfo
- Publication number
- JPH09196952A JPH09196952A JP2215596A JP2215596A JPH09196952A JP H09196952 A JPH09196952 A JP H09196952A JP 2215596 A JP2215596 A JP 2215596A JP 2215596 A JP2215596 A JP 2215596A JP H09196952 A JPH09196952 A JP H09196952A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- frequency
- value
- pulse train
- integrated value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電動機駆動装置に
おける電動機の回転数を検出するパルス発振器等の測定
パルス信号を得てパルス列の積算値およびパルス周波数
の検出を行うパルス列積算周波数値検出回路に、関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse train integrated frequency value detection circuit for obtaining a measured pulse signal of a pulse oscillator or the like for detecting the rotation speed of an electric motor in an electric motor drive device to detect an integrated value of the pulse train and a pulse frequency. , Is related.
【0002】[0002]
【従来の技術】パルス発振器等による測定パルス信号よ
り、そのパルス列の積算値およびパルス周波数の検出を
行うパルス列積算周波数値検出回路が、慣用されてい
る。図3は従来例の要部構成を示すもので、1はパルス
発生源、2は分配器、3は積算計測器、4は周波数検出
器である。すなわち、パルス発生源1から測定パルス入
力PLを得る分配器2を介し、それぞれ測定パルス入力
PL1 ,PL2 を得る積算計測器3および周波数検出器
4により、一つのパルス列の積算値PVとそのパルスの
周波数値PFとを、求めるものである。ここで分配器2
は、積算計測器3と周波数検出器4に確実にパルス列を
伝達するため、設置されることが多い。かように従来技
術は、一つのパルス列の積算計測とそのパルス周波数検
出を、それぞれ独立した積算計測器と周波数検出器によ
り行うものであった。2. Description of the Related Art A pulse train integrated frequency value detecting circuit for detecting an integrated value and a pulse frequency of a pulse train from a pulse signal measured by a pulse oscillator or the like is commonly used. FIG. 3 shows a configuration of a main part of a conventional example. 1 is a pulse generator, 2 is a distributor, 3 is an integrating measuring instrument, and 4 is a frequency detector. That is, the integrated value PV of one pulse train and its pulse are measured by the integration measuring instrument 3 and the frequency detector 4 which obtain the measurement pulse inputs PL1 and PL2 via the distributor 2 which obtains the measurement pulse input PL from the pulse generation source 1. The frequency value PF is obtained. Distributor 2 here
Is often installed in order to reliably transmit the pulse train to the integration measuring instrument 3 and the frequency detector 4. As described above, in the conventional technique, the integrated measurement of one pulse train and the detection of the pulse frequency thereof are performed by the independent integrated measuring device and frequency detector.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、この種
の従来技術においては、独立した積算計測器と周波数検
出器を用いなければならず、またそのためのパルス分配
器を必要としていた。さらには、これらの機器の間をケ
−ブルで接続せねばならず、外乱ノイズの侵入を受け易
かった。However, in the prior art of this kind, an independent integrating measuring instrument and a frequency detector must be used, and a pulse distributor for that purpose is required. In addition, cables must be connected between these devices, which makes it easy to receive disturbance noise.
【0004】しかして本発明の目的とするところは、パ
ルス列積算値およびパルス周波数値が同時に得られる簡
便な構成のパルス列積算周波数値検出回路を提供する、
ことにある。An object of the present invention, therefore, is to provide a pulse train integrated frequency value detection circuit having a simple structure capable of simultaneously obtaining a pulse train integrated value and a pulse frequency value.
It is in.
【0005】[0005]
【課題を解決するための手段】本発明は上述したような
点に鑑みなされたものであって、つぎの如くに構成した
ものである。すなわち、パルス発生源より測定パルス信
号を得てパルス列の積算値を得る積算計測部と、積算値
および基準パルスを入力として基準パルスの第1の時刻
の積算値Kと時間間隔T後の第2の時刻の積算値Lより
算出式{(L−K)/T}にてパルス周波数を得る周波
数算出部とを、設けて成るものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has the following structure. That is, an integrated measurement unit that obtains a measurement pulse signal from a pulse generation source to obtain an integrated value of a pulse train, and an integrated value K of a reference pulse at a first time and a second value after a time interval T with the integrated value and the reference pulse as inputs. And a frequency calculation unit that obtains a pulse frequency from the integrated value L of the time by the calculation formula {(L−K) / T}.
【0006】かかる解決手段により、パルス発生源より
測定パルス信号を入力してパルス列の積算値を求め、か
つその積算値と基準パルスを入力してパルス周波数を求
めることができ、また機器間の接続構成も簡単化された
ものとすることができる。According to such a solution, the measured pulse signal can be input from the pulse generation source to obtain the integrated value of the pulse train, and the integrated value and the reference pulse can be input to obtain the pulse frequency. The configuration can also be simplified.
【0007】[0007]
【発明の実施の形態】具体的には、CPUの演算機能を
用い、すなわち、パルス発生源より測定パルス信号を得
てパルス列の積算値を得る積算計測部と、その積算値お
よび基準発振部の基準パルスを入力として基準パルスの
第1の時刻の積算値Kと時間間隔T後の第2の時刻の積
算値Lより算出式{(L−K)/T}にてパルス周波数
を得る周波数算出部とを、効用してなるものである。さ
らに、本発明を実施例図面を参照して、詳細説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Specifically, an integrated measuring unit that uses the arithmetic function of a CPU, that is, obtains a measured pulse signal from a pulse generation source to obtain an integrated value of a pulse train, and an integrated value of the integrated value and a reference oscillating unit. Frequency calculation to obtain a pulse frequency from the integrated value K at the first time of the reference pulse and the integrated value L at the second time after the time interval T using the reference pulse as an input according to the formula {(L−K) / T} The parts and parts are effectively used. Further, the present invention will be described in detail with reference to the accompanying drawings.
【0008】[0008]
【実施例】図1は本発明の一実施例を図3に類して示し
たものであって、5はCPUである。ここにCPU5に
おいては、51は積算計測部、52は基準発振器、53は周波
数算出器である。すなわち、積算計測部51はパルス発生
源1よりの測定パルス入力PLのパルスをアツプまたは
ダウンカウントし、よって、積算計測部51よりいつでも
パルス列の積算値PVが得られる。基準発振器52は定め
られた時間間隔の信号を発生するものであって、その時
間間隔は一定でもよく測定パルス入力PLの周波数に応
じた可変としてもよい。また、周波数算出器53は基準発
振器52からの基準パルス入力PBにより、積算計測部51
により得られた積算値PVを読み出し、周波数値PFを
算出する。なお、周波数算出器53はその積算値PVを記
憶する機能を有する。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention similar to FIG. 3, and 5 is a CPU. Here, in the CPU 5, 51 is an integrating and measuring unit, 52 is a reference oscillator, and 53 is a frequency calculator. That is, the integration measuring unit 51 counts up or down counts the pulses of the measurement pulse input PL from the pulse generation source 1, and therefore the integration measuring unit 51 can always obtain the integrated value PV of the pulse train. The reference oscillator 52 generates a signal at a predetermined time interval, and the time interval may be constant or may be variable according to the frequency of the measurement pulse input PL. In addition, the frequency calculator 53 uses the reference pulse input PB from the reference oscillator 52 to calculate the integration measuring unit 51.
The integrated value PV obtained by is read and the frequency value PF is calculated. The frequency calculator 53 has a function of storing the integrated value PV.
【0009】さらには、図2は図1の各部波形、すなわ
ち、測定パルス入力PL波形と基準パルス入力PB発生
のタイミング位置を示す。図2においては、時刻T0 と
時刻T1 にタイミング信号を発生し、時刻T0 では積算
値PVがK,時刻T1 では積算値PVがLである例を示
している。ここで、周波数算出器53がその積算値PVの
K,Lを記憶し、また時刻T0 と時刻T1 の時間間隔は
Tであるため、算出式{(L−K)/T}にて、周波数
値PFが求められる。なお、本例では積算計測部および
基準発振器をCPUの内部に設けるものとしたが、これ
をCPUの外部に配するようにしてもよい。Further, FIG. 2 shows the waveforms of the respective parts of FIG. 1, that is, the timing positions of the measured pulse input PL waveform and the reference pulse input PB generation. FIG. 2 shows an example in which a timing signal is generated at time T0 and time T1, and the integrated value PV is K at time T0 and the integrated value PV is L at time T1. Here, since the frequency calculator 53 stores K and L of the integrated value PV and the time interval between the time T0 and the time T1 is T, the frequency is calculated by the calculation formula {(L-K) / T}. The value PF is determined. In this example, the integrated measuring unit and the reference oscillator are provided inside the CPU, but they may be provided outside the CPU.
【0010】[0010]
【発明の効果】以上詳述したように本発明によれば、パ
ルス列積算値およびパルス周波数値が同時に得られ、機
器間配線も少なくし得る簡便な構成の装置を、提供でき
る。As described above in detail, according to the present invention, it is possible to provide a device having a simple structure in which the pulse train integrated value and the pulse frequency value can be obtained at the same time and the wiring between devices can be reduced.
【図面の簡単な説明】[Brief description of drawings]
【図1】図1は本発明の一実施例を示すブロツク図であ
る。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図2】図2は図1の各部波形を示す波形図である。FIG. 2 is a waveform diagram showing waveforms at various points in FIG.
【図3】図3は従来例を示すブロツク図である。FIG. 3 is a block diagram showing a conventional example.
1 パルス発生源 2 分配器 3 積算計測器 4 周波数検出器 5 CPU 51 積算計測部 52 基準発振器 53 周波数算出器 PL 測定パルス入力 PV 積算値 PF 周波数値 PB 基準パルス入力 1 pulse generator 2 distributor 3 integrating measuring instrument 4 frequency detector 5 CPU 51 integrating measuring unit 52 reference oscillator 53 frequency calculator PL measurement pulse input PV integrated value PF frequency value PB reference pulse input
Claims (1)
ルス信号を得てパルス列の積算値およびパルス周波数の
検出を行うパルス列積算周波数値検出回路において、 前記測定パルス信号入力よりパルス列の積算値を得る積
算計測部と、該積算値および基準パルスを入力として基
準パルスの第1の時刻の積算値Kと時間間隔T後の第2
の時刻の積算値Lより算出式{(L−K)/T}にてパ
ルス周波数を得る周波数算出部とを、 設けて成ることを特徴とするパルス列積算周波数値検出
回路。1. A pulse train integrated frequency value detection circuit for detecting a pulse train integrated value and a pulse frequency by obtaining a measured pulse signal from a pulse generation source of a rotating body to be measured, wherein an integrated value of the pulse train is input from the measurement pulse signal input. An integrated measuring section for obtaining, and an integrated value K of the reference pulse at the first time and a second value after the time interval T with the integrated value and the reference pulse as inputs.
A pulse train integrated frequency value detection circuit, comprising: a frequency calculation unit that obtains a pulse frequency from the integrated value L of the time according to the formula {(L−K) / T}.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2215596A JPH09196952A (en) | 1996-01-12 | 1996-01-12 | Circuit for detecting pulse train integration frequency value |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2215596A JPH09196952A (en) | 1996-01-12 | 1996-01-12 | Circuit for detecting pulse train integration frequency value |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09196952A true JPH09196952A (en) | 1997-07-31 |
Family
ID=12074960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2215596A Pending JPH09196952A (en) | 1996-01-12 | 1996-01-12 | Circuit for detecting pulse train integration frequency value |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09196952A (en) |
-
1996
- 1996-01-12 JP JP2215596A patent/JPH09196952A/en active Pending
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