JPH09191464A - Picture processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transfer picture data from a camera to a finder and the display device of a computer and the like with the small number of signals. SOLUTION: In a camera unit 100, picture data processing the signal which is image-pick up in CCD 2 is processed in a process part 4 is accumulated in a memory 5. A data transfer part 8 processes the luminance signal and a color difference signal of eight bit width from the memory 5. The luminance signal and the color difference signal alternately and time-sequentially output data of highest six bit width. Identification information showing the lowest two bits of the luminance signal, a horizontal synchronizing signal and invalid data are time-sequentially outputted at prescribed timing. A display unit 200 displays a picture in a display part 12 using liquid crystal. Thus, the number of the signals of a connector and a cable connecting the camera with the display device can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus suitable for use in processing image data of a subject image captured by a solid-state image sensor or the like and transferring the processed image data to a liquid crystal display device or the like.

[0002]

2. Description of the Related Art In a conventional electronic camera that converts a subject image into an electric signal by a solid-state image sensor such as a CCD and electrically records the signal on a recording medium, an electronic viewfinder or liquid crystal is used to confirm the captured image. Images are displayed on the television monitor used. For such applications, conventionally, an output terminal for outputting a standard video signal of NTSC system or the like is provided on the camera side. On the other hand, in recent years, applications for capturing images into a personal computer, a mobile information terminal, etc. for editing and transmitting have been increasing. For this reason, as a camera, there is an increasing demand for displaying on a display unit of a personal computer or a mobile information terminal in addition to the purpose of outputting an image to an electronic viewfinder or the like.

[0003]

In response to the above demands, in the case of a standard video signal output like a conventional electronic camera, NT is respectively provided on the camera side and the display device side.
An encoder circuit and a decoder circuit of the SC system and the like are required, and the circuit is wasted. For data transfer to a personal computer, a so-called PC card I / F (PCM
CIA / JEIDA). However, it is already used in cameras as interfaces for memory cards that typically record image data. Therefore, when it is used for other purposes, a plurality of PC card slots must be provided. However, the number of pins of the connector is as large as 68 pins, which is large relative to the size of the camera body.
The addition of such an interface is disadvantageous for downsizing and cost reduction. There is serial communication as another transmission method, and in this case, the number of signal lines for communication can be reduced. But to the finder, it's a few per second
Since it is necessary to transmit zero images, serial communication requires a high-speed clock, and there is a problem of reflection on the signal transmission path, which is not simple.

The present invention has been made to solve the above problems, and an object thereof is to obtain an image processing apparatus capable of processing input image data and transferring it with a small number of signals.

[0005]

According to the present invention, there is provided the following:
Processing the input image data consisting of a luminance signal having a bit width of 1 and a color difference signal having a second bit width, and obtaining a color difference having an upper third bit width smaller than the second bit width of the color difference signal. Image data processing means is provided for outputting the signal in time series together with the luminance signal.

[0006]

According to the present invention, since the luminance signal and the color difference signal having the narrowed bit width are output in time series, it is possible to reduce the number of signals and transfer them to a display device, a computer or the like.

[0007]

1 is a block diagram of an electronic camera according to an embodiment of the present invention. In the figure, 100 is a camera unit for capturing a subject image and obtaining image data, and 200 is a display unit for displaying the image data.

In the camera unit 100, 1 is an image pickup lens, 2 is a solid-state image pickup device such as a CCD, and 3 is an A / A for converting an analog image signal read from the solid-state image pickup device 2 into digital image data. D converter, 4
Is a process unit for generating a luminance signal and a color difference signal based on the digital image data, 5 is a memory for temporarily storing the luminance signal and the color difference signal, 6 is a microcomputer for controlling the entire camera unit, Reference numeral 7 is a memory for system control, 8 is a data transfer unit for reading the luminance signals and color difference signals stored in the memory 5 in time series and transferring them to peripheral devices, 9a is a time series from the data transfer unit 8. A connector for transferring image data to peripheral devices,
Reference numeral 10 is a timing signal generation unit for generating a drive clock of the solid-state image sensor, various data transfer timing signals, and the like, and 14 is a data bus.

Next, in the display unit 200, 9b is a connector on the display unit 200 side, which is paired with the connector 9a on the camera side. Image data is transferred from the camera side through these connectors 9a and 9b. Reference numeral 11 is a memory for display, 12 is a display unit using a liquid crystal panel, and 13 is a display control unit for controlling writing and reading of data in the memory 11 for display.

Next, the operation will be described. The present invention is characterized by the transfer of image data from the camera unit 100 to the display unit 200. This will be described in detail below. FIG. 2 is a diagram showing the transfer timing of the time-series image data from the camera unit 100 to the display unit 200. The luminance signal and the color difference signal input to the memory 5 and the data to be transferred from the memory 5 have a desired timing. And the part to be read with. The data transfer unit 8 controls the operation of writing to the memory 5 and reading out by adding predetermined data. In FIG. 2, HSYNC is a horizontal synchronizing signal, which is a television signal output from the timing generator 10. YCLK is a data write clock signal from the process unit 4 to the memory 5. SCLK is a system clock, and reading from the memory 5 and the like are performed in synchronization with this clock.

Y (7: 0) is a luminance signal generated from the output signal of the solid-state image sensor 2 by the process unit 4.
Here, (7: 0) indicates that the digital data has an 8-bit width (the same description will be used hereinafter). C (7:
Similarly, 0) is an 8-bit color difference signal generated from the output signal of the solid-state image sensor 2 by the process unit 4. As described above, in the process unit 4, the 8-bit luminance signal Y (7:
0) and an 8-bit color difference signal are generated. here,
Ru and Rx are RY signals, and Bv and By are BY signals.

The luminance signals Yu, Yv, Yw, and Yx are input to the memory 5 every write clock YCLK. On the other hand, as the color difference signals, RY and BY are alternately input. Further, the luminance signal is read from the memory 5 in the order of Yu, Yv, Yw, and Yx. On the other hand, the color difference signal is R
It is read from the memory 5 in the order of u, Bv, Rw, and Bx. The data transfer unit 8 generates higher-order 6-bit width transfer data OUT (5: 0) from the 8-bit width luminance signal Y (7: 0) and the color difference signal (7: 0). The generated transfer data is output from the connector 9a in synchronization with the system clock SCLK.

Further, during the blanking period of the horizontal synchronizing signal HSYNC (low level period in the figure), data is not taken into the memory 5. Transfer data OU during this period
T (5: 0) is set to "00 (hex)" so as to be output separately from other image data. Also, when it takes time to process the process (at this time, YCLK in FIG.
It is conceivable that the writing interval to the memory 5 will be long during the period (when is stopped). In this case, since the writing rate becomes slower than the reading rate from the memory 5, the data to be read from the memory 5 may become empty. In that case, the transfer data OUT (5: 0) is set to "01 (hex)" and is output separately from other image data. In other words, "01" is invalid data (INVALI
D DATA).

The lower 2 bits of the luminance signals Yu and Yv
Are temporarily stored as Luv. Then, it is output at the next timing when Yw is output. At this time, this Lu
As for v data, 1 word is 6 bits data, and Yu, Yv
"01" for identifying the lower 2 bits of each and
Consisting of That is, Luv = “01” & Yu (1: 0) & Yv (1: 0). Where & is a bit connector and Yu (1: 0) is Y
The lower 2 bits of u are shown. The “01” data is the upper 2 bits of the 6-bit Luv data.

Similarly, the lower 2 bits of the luminance signals Yw and Yx are temporarily held as Lwx. Then, it is output at the timing after the output of Yx. At this time, this Lw
x data is 6-bit data for 1 word, and is Yw, Yx
"01" for identifying the lower 2 bits of each and
Consisting of That is, Lwx = “01” & Yw (1: 0) & Yx (1: 0). Where & is a bit connector and Yw (1: 0) is Y
Indicates the lower 2 bits of w. The “01” data is the upper 2 bits of the 6-bit Lwx data.

Now, the reason why the upper 2 bits of Luv and Lwx are set to "01" will be described. Yu, Yv,
When the lower 2 bits of Yw and Yx are “00” or “01”, if the respective lower 2 bits are combined as they are, L
The values of uv and Lwx are “00” and “01”. on the other hand,
Blanking data is "00" and invalid data is "01"
It is. Therefore, it is necessary to distinguish from these blanking data and invalid data. Therefore, Luv and Lwx
The upper 2 bits of are set to "01" to prevent the same value. The upper level of the Luv and Lwx may be “10”. Next, the lower 2 bits of Ru and Rv are
Ignored and do not transfer. Similarly, Rw and Bx are thinned out and ignored.

Next, the original data Y (7: 0) or C
The case where (7: 0) is 11 (decimal notation) or less will be described. In this case, if the upper 6 bits are used as the transfer data, the output data (6 bits) is “000000”.
(Binary notation) or "000001" (binary notation). That is, the blanking data is "00", which makes it impossible to distinguish it from the invalid data "01". To prevent this, as shown in FIG. 3, when the original data Y (7: 0) or C (7: 0) is 11 (decimal notation) or less, the output data (6 bits) is "000010" (binary number). (Notation). Furthermore, the original data Y (7: 0) is 8
(Decimal notation) In the following cases, Yu, Yv, Yw, Y
The data of the lower 2 bits of x (data that becomes an element of Luv or Lwx) is set to "00" (binary notation).

By the way, in the above example, when the original data of the luminance signal is 8 bits, it is transferred to the display unit 12 as 8-bit data as it is. On the other hand, in the color difference signal, the quantization bit becomes 6 bits when the original data is 8 bits. Furthermore, sampling along the time axis is also halved. Therefore, the color information is not completely transferred. The original data Y (7: 0) is 8
(Decimal notation) In case of the following, output data (6bi
t) is rounded to "000010" (binary notation).
That is, regarding the luminance signal, an error occurs when the original data is 8 (decimal notation) or less. This has a slight effect on the image quality for the purpose of display on an electronic camera. In other words, the main purpose is to display electronic viewfinders and personal digital assistants,
These display units are liquid crystal or the like, and the number of display pixels is smaller than that of the original data. Therefore, even if the color information is decimated to half as in the present invention, it does not make a great difference in color reproduction. Further, even if the lower level of the luminance data is rounded to 8 (decimal notation), the gradation expression is not so high due to the nature of the liquid crystal, so it can be said that this is not a serious problem in practical use.

Next, the display unit 200 on the receiving side
The method of synchronizing the transmitted data with the transmitting side will be described. First, the received "00" data is HSYN
C, and "01" is invalid data. And
Data other than "01" received next to "00" data is counted as the first image data. Thereafter, the image data is counted in units of 8. Then, the luminance signal or the color difference signal is identified in eight cycles as follows. That is, the first is Yu data, the second is Ru data, the third is Yv data, the fourth is Bv data, the fifth is Yw data, the sixth is Luv data, the seventh is Yx data, the eighth is Lwx data, The ninth is the second Yu data and the tenth is the second Ru data. Thus again "00"
The data until the data is received is image data for one horizontal period.

Further, since the data of 8 (decimal notation) or less is represented by "000010" (binary notation) at the time of transfer, the receiving side does not distinguish values of 8 (decimal notation) or less. Decimal notation) Treated as the following value (see the table in FIG. 3). On the display unit 200 side,
The display control unit 13 performs the demodulation operation of the transfer data as described above, temporarily stores the data in the display memory 11 in order to synchronize with the synchronization signal for display, and reads and displays at a desired timing. The image data is displayed on the section 12. As described above, according to the present invention, image data can be transferred in time series with a small number of signals.

It should be noted that processing (encord) such as time-sequentialization of data from the process unit 4 and addition of an identification code on the camera unit 100 side, and the display unit 200.
The data transfer on the side is performed by the data transfer unit 8 and the display control unit 13, respectively. In this case, there are advantages that the data transfer can be performed at high speed and that the operation of the entire system can be accelerated because the processing load is not applied to the microcomputer 6.

The present invention can also be implemented by software-processing the operations performed by the data transfer section 8 and the display control section 13 by a microcomputer or the like. High-performance CPU or when high-speed operation is not required for the system
When using, there is an advantage that the circuit parts are reduced and the system can be downsized and the cost can be reduced.

Further, in this embodiment, the camera unit 100 and the display unit 200 are separate bodies. In this case, it is easy to replace the display unit 200 with another type, for example, one having a different display size. In addition, the image data is not directly transferred to the display unit 200, but the camera unit 100
A device other than the display device may be attached to. For example, it is possible to connect a mobile phone, an information terminal, or the like, transfer image data to them, edit the image data, or transfer to another medium.

Further, in this embodiment, the connectors 9c and 9c
It is a system that transfers data to the outside via d.
The display unit 200 and the camera unit 100 may be integrated. In this case, it is not easy to replace the display unit 200, but if the purpose is not to replace the display unit 200, it is advantageous not to provide an external connector because the cost is lower and the device can be downsized. Further, although the original data is 8 bits and the transfer data width is 6 bits in the present embodiment, this is not limited to a combination of 8 bits and 6 bits. The quality of the image required by the device, the transfer speed, and the like may be taken into consideration in regard to the bit width.

[0025]

As described above, according to the present invention, image data can be transferred at high speed with a small number of signals. As a result, mounting parts such as connectors and cables for image data transfer in electronic camera bodies, display devices, computers, etc. can be miniaturized, connection durability and reliability can be improved, and cables can be made thinner. Further, there is an effect that the cost can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a timing chart showing data transfer.

FIG. 3 is a configuration diagram illustrating conversion of original data into transfer data.

[Explanation of symbols]

 2 solid-state image sensor 4 process unit 5 memory 6 computer 8 data transfer unit 100 camera unit

Claims (5)

[Claims] 1. A luminance signal having a first bit width and a second luminance signal.
Of the color difference signal having a bit width of ## EQU1 ## is processed, and a color difference signal having a higher third bit width smaller than the second bit width of the color difference signal is time-series together with the luminance signal. An image processing apparatus comprising image data processing means for outputting. 2. The image data processing means outputs a luminance signal having an upper fourth bit width smaller than the first bit width of the luminance signal, and predetermined the remaining lower bit luminance signals. The image processing apparatus according to claim 1, wherein the image processing apparatus outputs the image at the timing. 3. The image data processing means outputs a synchronization signal at a predetermined timing.
The image processing apparatus according to any one of the preceding claims. 4. The image processing apparatus according to claim 1, wherein the image data processing means outputs an identification signal indicating that the output luminance signal and color difference signal are invalid. 5. The image processing apparatus according to claim 1, wherein the input image data is obtained from a signal picked up by an image pickup means using a solid-state image pickup device.