JPH0918807A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPH0918807A
JPH0918807A JP7167221A JP16722195A JPH0918807A JP H0918807 A JPH0918807 A JP H0918807A JP 7167221 A JP7167221 A JP 7167221A JP 16722195 A JP16722195 A JP 16722195A JP H0918807 A JPH0918807 A JP H0918807A
Authority
JP
Japan
Prior art keywords
signal
signal processing
load current
dummy
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7167221A
Other languages
Japanese (ja)
Other versions
JP3379289B2 (en
Inventor
Naoki Shintani
直樹 新谷
Kozo Bando
弘三 阪東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16722195A priority Critical patent/JP3379289B2/en
Publication of JPH0918807A publication Critical patent/JPH0918807A/en
Application granted granted Critical
Publication of JP3379289B2 publication Critical patent/JP3379289B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a means preventing a signal processing part drastically reducing load current for a vertical blanking period from becoming the fluctuation factor of power source voltage to other signal processings without strengthening the smoothing filter of a power source line, in particular, and imparting no hindrance to the output of video to a screen or the output of a signal to an external equipment. SOLUTION: In a signal processing part 11 in which load current is reduced for a vertical blanking period, the control signal 15 showing the period is outputted, and the switching device 13 operating according to the control signal 15 and dummy load 14 are used. The dummy current corresponding to the load current amount reducing for the period is made to flow in the vicinity of the signal processing part 11 and the fluctuation of power source voltage is prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、同期タイミングが異な
った複数のテレビジョン信号を同時に処理するテレビジ
ョン受信機に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver for simultaneously processing a plurality of television signals having different synchronization timings.

【0002】[0002]

【従来の技術】近年、テレビジョン受信機は、単に一つ
の地上波の放送を受信してその映像および音声を出力す
るのみに留まらず、別な地上波放送や衛星放送を受信し
たり、外部機器からのテレビジョン信号入力を受け付け
たりし、これらを同時に処理し、適宜に信号切換を行う
ことにより、一つの画面に同時に複数の映像を出力した
り、画面に出力している信号とは別のテレビジョン信号
を外部機器用に出力するなど、高機能化が進んでいる。
2. Description of the Related Art In recent years, a television receiver is not limited to simply receiving one terrestrial broadcast and outputting its video and audio, but also receiving another terrestrial broadcast or satellite broadcast, or an external broadcast. By receiving the television signal input from the device, processing them simultaneously, and switching the signals appropriately, it is possible to output multiple images simultaneously on one screen, or to separate the signals output on the screen. Advanced functions such as outputting television signals for external devices are being advanced.

【0003】従来、この種のテレビジョン受信機におい
ては、同時に処理している複数のテレビジョン信号間に
おいて、信号同士がクロストークしてしまう不具合が生
じないようにするために気を配った設計がなされてきて
いる。また、これら信号間において、同期信号の周波数
やタイミングが異なるために妨害となって現れるさまざ
まな不具合も存在する。
Conventionally, in this type of television receiver, careful design is performed so as not to cause a problem that signals are cross-talked between a plurality of television signals which are simultaneously processed. Has been done. In addition, there are various problems that appear as interference because the frequency and timing of the synchronization signal differ between these signals.

【0004】図3は、従来のテレビジョン受信機におい
て、異なるテレビジョン信号を処理する2種類の信号処
理部に対する電源供給の構成を示したものであり、以
下、その構成について図面を参照しながら説明する。
FIG. 3 shows a configuration of power supply to two types of signal processing units for processing different television signals in a conventional television receiver. The configuration will be described below with reference to the drawings. explain.

【0005】図3において、1は直流電圧Vsを出力す
る電源出力部で、2は電源内部インピーダンスおよび共
通の伝送路などによるインピーダンスを意味する共通イ
ンピーダンスZsである。5は信号処理部aで、6の入
力信号aを処理し、7の出力信号aを出力する。8は信
号処理部bで、6とは異なる同期タイミングの9の入力
信号bを処理し、10の出力信号bを出力する。3およ
び4はそれぞれ2の共通インピーダンスZs以降の5の
信号処理部aおよび8の信号処理部bへの伝送路などに
よるインピーダンスZaおよびZbである。また、図中
に示してはいないが、電源出力部1のアース、5の信号
処理部aのアース、および、8の信号処理部bのアース
は、お互いにあるインピーダンスを介してつながってい
る。
In FIG. 3, reference numeral 1 is a power source output section for outputting a DC voltage Vs, and 2 is a common impedance Zs which means an impedance of the power source and an impedance due to a common transmission line. A signal processing unit a 5 processes the input signal a of 6 and outputs the output signal a of 7. Reference numeral 8 is a signal processing unit b, which processes 9 input signals b having a synchronization timing different from 6 and outputs 10 output signals b. Reference numerals 3 and 4 respectively denote impedances Za and Zb due to the transmission path to the signal processing unit a of 5 and the signal processing unit b of 8 after the common impedance Zs of 2. Further, although not shown in the drawing, the ground of the power output unit 1, the ground of the signal processing unit a of 5, and the ground of the signal processing unit b of 8 are connected to each other through a certain impedance.

【0006】同図に示すように、テレビジョン受信機に
おいては、共通の電源出力部から種々の信号処理部など
に電源電圧を供給することが多い。電源出力部1では安
定に直流電圧Vsを出力するように動作するが、2の共
通インピーダンスZsなどのために、負荷電流の増減に
よって共通の電源電圧Voは変動してしまう。電源出力
部1から2の共通インピーダンスZsおよび3の伝送路
などによるインピーダンスZaを通して電源供給される
5の信号処理部aでは、その負荷電流Iaに応じて入力
電圧Vaが変動するのみならず、8の信号処理部bの負
荷電流Ibに応じて電源電圧Voが変動するために、結
果として5の信号処理部aの入力電圧Vaが影響を受け
ることになってしまい、7の出力信号aには8の信号処
理部bによる妨害が心配となる。
As shown in the figure, in a television receiver, a common power supply output section often supplies a power supply voltage to various signal processing sections. The power supply output unit 1 operates so as to stably output the DC voltage Vs, but due to the common impedance Zs of 2 and the like, the common power supply voltage Vo fluctuates due to an increase or decrease in the load current. In the signal processing unit a of 5, which is supplied with power through the common impedance Zs of the power output units 1 to 2 and the impedance Za of the transmission line of 3, not only the input voltage Va varies according to the load current Ia, but also 8 Since the power supply voltage Vo fluctuates in accordance with the load current Ib of the signal processing unit b, the input voltage Va of the signal processing unit a of 5 is affected, and the output signal a of 7 There is concern about interference by the signal processing unit b of 8.

【0007】この電源電圧の変動を抑えるには、2およ
び3や4の伝送路などによるインピーダンスを減少させ
ることが大切で、更には、変動する周波数がテレビジョ
ン信号の水平同期周波数程度以上の場合には電源ライン
にコンデンサなどによる平滑フィルタを強化する事によ
る効果も大きく、信号処理部自身も電源電圧変動に強い
ことが望まれる。
In order to suppress the fluctuation of the power supply voltage, it is important to reduce the impedance due to the transmission lines 2 and 3 and 4, and further, when the fluctuating frequency is about the horizontal synchronizing frequency of the television signal or more. In addition, the effect of strengthening the smoothing filter such as a capacitor in the power supply line is great, and it is desired that the signal processing unit itself is resistant to power supply voltage fluctuation.

【0008】また一方、テレビジョン信号の一つに情報
量の大きなハイビジョン信号があるが、この圧縮伝送信
号であるMUSE信号を受信しデコードする信号処理回
路に代表されるように、低い電圧で駆動する信号処理回
路ではあるが、他の信号処理部に比べて負荷電流が非常
に大きく、かつ、垂直ブランキング期間に負荷電流が大
きく減少する傾向をもつ信号処理回路をも、テレビジョ
ン受信機は内蔵しなければならなくなっている。
On the other hand, one of the television signals is a high-definition signal having a large amount of information, which is driven by a low voltage as typified by a signal processing circuit which receives and decodes the MUSE signal which is the compressed transmission signal. However, the television receiver also has a signal processing circuit that has a significantly larger load current than other signal processing units and that the load current tends to greatly decrease during the vertical blanking period. It has to be built.

【0009】[0009]

【発明が解決しようとする課題】しかしながら上記の従
来のテレビジョン受信機では、同期タイミングの異なる
複数のテレビジョン信号を同時に処理する信号処理部の
一つに、垂直ブランキング期間に負荷電流が大きく減少
する傾向をもつ信号処理回路を備えた場合、電源内部イ
ンピーダンス、伝送路などによるインピーダンス、およ
び、アース間のインピーダンスなどのために、上記負荷
電流の変動が他の信号処理部への入力電圧の変動要因と
なり、その変動がたいへん遅い周波数60Hz程度の垂
直ブランキング期間の変動であるため、電源ラインの平
滑フィルタをかなり強化しても変動のリップル電圧を十
分に除去することは難しく、その結果、信号処理部に影
響を与え、画面への映像出力、あるいは、外部機器への
信号出力に妨害となって現れてしまうという問題点を有
していた。
However, in the above-mentioned conventional television receiver, one of the signal processing units for simultaneously processing a plurality of television signals having different synchronization timings has a large load current during the vertical blanking period. When a signal processing circuit that has a tendency to decrease is provided, fluctuations in the load current due to the internal impedance of the power supply, the impedance due to the transmission path, and the impedance between the ground, etc. It becomes a fluctuation factor, and the fluctuation is a very slow fluctuation of the vertical blanking period of about 60 Hz, so it is difficult to sufficiently remove the fluctuation ripple voltage even if the smoothing filter of the power supply line is considerably strengthened. This may affect the signal processing unit and interfere with the video output to the screen or the signal output to external devices. We had a problem that appeared me.

【0010】本発明は、上記従来の問題点を解決するも
ので、垂直ブランキング期間に負荷電流が大きく変動す
る傾向をもつ信号処理部が他の信号処理部への入力電圧
の変動要因となるのを、電源ラインの平滑フィルタを特
別に強化することなく防ぎ、画面への映像出力、あるい
は、外部機器への信号出力に妨害を与えることのないテ
レビジョン受信機を提供することを目的とする。
The present invention solves the above-mentioned conventional problems, and a signal processing unit having a tendency that the load current largely fluctuates during the vertical blanking period becomes a factor of fluctuation of the input voltage to other signal processing units. It is an object of the present invention to provide a television receiver that does not interfere with the video output to the screen or the signal output to an external device by preventing the power supply line smoothing filter from being specially strengthened. .

【0011】[0011]

【課題を解決するための手段】この目的を達成するため
に本発明のテレビジョン受信機は、垂直ブランキング期
間に負荷電流が大きく減少する傾向をもつ信号処理部に
おいて、その負荷電流が減少する期間を表すパルス制御
信号を出力させ、そのパルス制御信号に応じて動作する
切換回路を設け、ダミー負荷を用いて上記期間に減少す
る負荷電流量相当の電流をダミー電流として同信号処理
部の近傍にて流す手段を用いる。
In order to achieve this object, the television receiver of the present invention reduces the load current in a signal processing section which tends to greatly decrease the load current during the vertical blanking period. A switching circuit that outputs a pulse control signal indicating a period and operates according to the pulse control signal is provided, and a current equivalent to the load current amount that decreases in the above period by using a dummy load is used as a dummy current in the vicinity of the signal processing unit. The method of flowing in is used.

【0012】[0012]

【作用】この手段によって、垂直ブランキング期間に負
荷電流が大きく減少する傾向をもつ信号処理部が他の信
号処理部への入力電圧の変動要因となるのを、電源ライ
ンの平滑フィルタを特別に強化することなく防ぎ、画面
への映像出力、或いは、外部機器への信号出力に妨害を
与えることのないテレビジョン受信機を実現することが
できる。
With this means, the smoothing filter of the power supply line is specially designed so that the signal processing section having a tendency that the load current greatly decreases during the vertical blanking period becomes a factor of fluctuation of the input voltage to the other signal processing section. It is possible to realize a television receiver that is prevented without strengthening and does not interfere with image output to a screen or signal output to an external device.

【0013】[0013]

【実施例】以下本件発明の一実施例について、図面を参
照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0014】図1は本実施例によるテレビジョン受信機
の、異なるテレビジョン信号を処理する2種類の信号処
理部に対する電源供給の構成を示したものである。
FIG. 1 shows the configuration of power supply to two types of signal processing units for processing different television signals in the television receiver according to this embodiment.

【0015】図1において、1〜7および9と10は図
3の従来のテレビジョン受信機における電源供給の構成
に同じであるため、説明を省略するが、11は8と同じ
く、9の入力信号bを処理し、10の出力信号bを出力
する信号処理部bで、負荷電流Ibが9の入力信号bに
同期した垂直ブランキング期間に大きく減少する傾向を
もつものとする。12はダミー電流切換部で、11の信
号処理部bの直近に配置し、負荷電流Ibが大きく減少
する期間を表すダミー電流制御信号(垂直ブランキング
同期信号)15(11の信号処理部bから出力する)に
より動作し、切換器13および14のダミー負荷Zcか
らなる。
In FIG. 1, 1 to 7 and 9 and 10 have the same structure as the power supply in the conventional television receiver shown in FIG. It is assumed that the signal processing unit b which processes the signal b and outputs the output signal b of 10 has a tendency that the load current Ib greatly decreases in the vertical blanking period synchronized with the input signal b of 9. Reference numeral 12 denotes a dummy current switching unit, which is arranged in the immediate vicinity of the signal processing unit b of 11, and is a dummy current control signal (vertical blanking synchronization signal) 15 representing a period during which the load current Ib greatly decreases (from the signal processing unit b of 11). Output) and is composed of the dummy loads Zc of the switches 13 and 14.

【0016】以上のように構成されたテレビジョン受信
機において、その電源供給の動作を説明する。
The operation of supplying power to the television receiver configured as described above will be described.

【0017】11の信号処理部bの負荷電流Ibは、9
の入力信号bに同期した垂直ブランキング期間に減少す
る。ダミー電流切換部12は、11の信号処理部bから
入力されるダミー電流制御信号(垂直ブランキング同期
信号)15により切換器13を動作させ、14のダミー
負荷Zcにより、負荷電流Ibが減少するタイミングに
その減少量に相当する電流をダミー電流Icとして流
す。
The load current Ib of the signal processing section b of 11 is 9
It decreases during the vertical blanking period synchronized with the input signal b. The dummy current switching unit 12 operates the switch 13 by the dummy current control signal (vertical blanking synchronization signal) 15 input from the signal processing unit b of 11, and the dummy load Zc of 14 reduces the load current Ib. At the timing, a current corresponding to the reduced amount is passed as the dummy current Ic.

【0018】図2(a)は従来の構成(図3)による負
荷電流および電源電圧の波形の例を、図2(b)は本実
施例による構成(図1)による負荷電流、ダミー電流お
よび電源電圧の波形の例を示したものである。
FIG. 2A shows an example of the waveforms of the load current and the power supply voltage according to the conventional configuration (FIG. 3), and FIG. 2B shows the load current, the dummy current and the configuration according to the present embodiment (FIG. 1). It is an example of a waveform of the power supply voltage.

【0019】同図に示すように、従来では、8の信号処
理部bの負荷電流Ibの減少に伴い、2の共通インピー
ダンスZsの影響を受けて電源電圧Voが変動し、その
結果、5の信号処理部aの入力電圧Vaが変動していた
が、本実施例の構成によれば、11の信号処理部bの負
荷電流Ibの減少に同期してダミー電流Icを流すこと
により、電源電圧Voひいては入力電圧Vaの変動を防
ぐことができる。
As shown in the figure, conventionally, as the load current Ib of the signal processing unit b of 8 decreases, the power supply voltage Vo fluctuates under the influence of the common impedance Zs of 2, and as a result, 5 Although the input voltage Va of the signal processing unit a fluctuates, according to the configuration of the present embodiment, the dummy current Ic is caused to flow in synchronization with the decrease of the load current Ib of the signal processing unit b of 11, so that the power supply voltage is reduced. It is possible to prevent the fluctuation of Vo and eventually the input voltage Va.

【0020】[0020]

【発明の効果】以上のように本発明によれば、同期タイ
ミングが異なった複数のテレビジョン信号を同時に処理
するテレビジョン受信機において、垂直ブランキング期
間に負荷電流が大きく減少する傾向をもつ信号処理部
に、その負荷電流が減少する期間を表すパルス制御信号
を出力させ、そのパルス制御信号に応じて動作する切換
回路を設け、ダミー負荷を用いて上記期間に減少する負
荷電流量相当の電流をダミー電流として同信号処理部の
近傍にて流す手段を用いることによって、他の信号処理
部への入力電圧が変動するのを、電源ラインの平滑フィ
ルタを特別に強化することなく防ぎ、画面への映像出
力、あるいは、外部機器への信号出力に妨害を与えるこ
とのないテレビジョン受信機を実現することができる。
As described above, according to the present invention, in a television receiver for simultaneously processing a plurality of television signals having different synchronization timings, a signal having a tendency that the load current greatly decreases during the vertical blanking period. The processing section is provided with a switching circuit that outputs a pulse control signal indicating a period during which the load current decreases, and a switching circuit that operates according to the pulse control signal is provided. Is used as a dummy current in the vicinity of the same signal processing unit to prevent fluctuations in the input voltage to other signal processing units without specially strengthening the smoothing filter of the power supply line, It is possible to realize a television receiver that does not interfere with the video output of the above or the signal output to the external device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における電源供給回路のブロ
ック図
FIG. 1 is a block diagram of a power supply circuit according to an embodiment of the present invention.

【図2】(a)従来の電源供給回路による負荷電流およ
び電源電圧の波形図 (b)本発明の一実施例における電源供給回路による負
荷電流、ダミー電流および電源電圧の波形図
2A is a waveform diagram of a load current and a power supply voltage by a conventional power supply circuit, and FIG. 2B is a waveform diagram of a load current, a dummy current, and a power supply voltage by the power supply circuit in one embodiment of the present invention.

【図3】従来の電源供給回路のブロック図FIG. 3 is a block diagram of a conventional power supply circuit.

【符号の説明】[Explanation of symbols]

1 電源出力部 2 共通インピーダンスZs 3 インピーダンスZa 4 インピーダンスZb 5 信号処理部a 6 入力信号a 7 出力信号a 9 入力信号b 10 出力信号b 11 信号処理部b 12 ダミー電流切換部 13 切換器 14 ダミー負荷Zc 15 ダミー電流制御信号(垂直ブランキング同期信
号)
1 Power Output Unit 2 Common Impedance Zs 3 Impedance Za 4 Impedance Zb 5 Signal Processing Unit a 6 Input Signal a 7 Output Signal a 9 Input Signal b 10 Output Signal b 11 Signal Processing Unit b 12 Dummy Current Switching Unit 13 Switcher 14 Dummy Load Zc 15 Dummy current control signal (vertical blanking synchronization signal)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 複数のテレビジョン信号を同時に処理す
る複数の信号処理部を備えたテレビジョン受信機であっ
て、入力信号の垂直ブランキング期間に負荷電流が減少
する信号処理部から上記期間を表すダミー電流制御信号
を出力させ、同制御信号に応じて動作する切換器とダミ
ー負荷からなるダミー電流切換部を設け、上記期間に減
少する負荷電流に相当するダミー電流を上記ダミー電流
切換部において上記信号処理部の近傍で流すことを特徴
とするテレビジョン受信機。
1. A television receiver comprising a plurality of signal processing units for simultaneously processing a plurality of television signals, wherein the signal processing unit reduces the load current during a vertical blanking period of an input signal, A dummy current control signal that outputs a dummy current control signal is provided, and a dummy current switching unit that includes a switch and a dummy load that operates according to the control signal is provided, and a dummy current that corresponds to the load current that decreases during the above period is provided in the dummy current switching unit. A television receiver characterized in that the signal is sent in the vicinity of the signal processing section.
JP16722195A 1995-07-03 1995-07-03 Television receiver Expired - Fee Related JP3379289B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16722195A JP3379289B2 (en) 1995-07-03 1995-07-03 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16722195A JP3379289B2 (en) 1995-07-03 1995-07-03 Television receiver

Publications (2)

Publication Number Publication Date
JPH0918807A true JPH0918807A (en) 1997-01-17
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015534A1 (en) * 2003-07-28 2005-02-17 Sony Corporation Delay time correction circuit, video data processing circuit, and flat display apparatus
CN100442347C (en) * 2003-07-28 2008-12-10 索尼株式会社 Delay time correction circuit, video data processing circuit, and flat display device
WO2011024308A1 (en) * 2009-08-31 2011-03-03 パイオニア株式会社 Image signal processing device, image signal processing method and av device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015534A1 (en) * 2003-07-28 2005-02-17 Sony Corporation Delay time correction circuit, video data processing circuit, and flat display apparatus
CN100442347C (en) * 2003-07-28 2008-12-10 索尼株式会社 Delay time correction circuit, video data processing circuit, and flat display device
WO2011024308A1 (en) * 2009-08-31 2011-03-03 パイオニア株式会社 Image signal processing device, image signal processing method and av device
JPWO2011024308A1 (en) * 2009-08-31 2013-01-24 パイオニア株式会社 Video signal processing apparatus, video signal processing method, and AV equipment

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