JPH09182462A - Inverter and on-of control method for switching element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To properly set the timing of the control operation of a switching element provided with the short circuit prevention period of an inverter without depending on a change in the characteristic of a phase voltage detector used to detect the timing. SOLUTION: The phase voltage of the output of an inverter part 18A is set in such a way that the output signal 11a of a phase voltage detector 14A used to detect the phase voltage becomes L at a phase voltage V0 corresponding to a preset reference voltage value VTH0 , and the phase voltage V0 corresponding to the reference voltage value VTH0 is measured actually. Then, a PWM circuit 29 equipped with a pulse-width correction function measures the time required to reach the voltage Vc of a converter part 21 from a phase voltage of 0, and the time required to reach a voltage Vc/2 from the phase voltage V0 corresponding to the reference voltage value VTH0 is computed as the correction time ΔT. Then, the time which elapses by the correction time ΔT from a point of time in which the output signal becomes L is set as a threshold value which turns on and off switching elements 4, 5 at an upper arm and a lower arm.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device for inversely converting a direct current into an alternating current having a predetermined voltage and frequency,
In particular, it relates to on / off control of switching elements.

[0002]

2. Description of the Related Art FIG. 14 and FIG. 14 relate to a conventional inverter device disclosed in Japanese Unexamined Patent Publication No. 4-69066, FIG. 14 is a diagram showing a configuration of the inverter device, and FIG. 15 is a diagram showing an operation thereof. . In FIG. 14, 1 is an AC power supply, and 2 is a converter unit for converting AC power from the AC power supply 1 into DC power, which is formed by a rectifying element such as a diode. A smoothing unit 3 is connected in parallel to the converter unit 2 and smoothes a direct current having a large pulsating flow. The smoothing unit 3 is formed by a smoothing capacitor.
Reference numerals 4 and 5 denote an upper arm switching element and a lower arm switching element respectively connected in parallel to the smoothing unit 3, and the upper arm switching element 4 and the lower arm switching element 5 are connected in series. 6 and 7 are the upper arm switching element 4 and the lower arm switching element 5, respectively.
Is a flywheel diode connected in parallel to.
Reference numerals 8 and 9 denote voltage dividing resistors connected in parallel to the lower arm switching element 5, and the voltage dividing resistors 8 and 9 are connected in series. Reference numerals 10 and 12 are current limiting resistors connected in series to the input / output line of the photocoupler 11 as the signal insulating means. Reference numeral 13 is a shunt regulator that serves as a signal supply means, which is serially inserted and connected to the input side of the photocoupler 11 and whose control line is connected in series to the voltage dividing resistors 8 and 9.
It is connected to the middle part of.

Voltage dividing resistors 8 and 9, current limiting resistors 10 and 1
2, photo coupler 11 and shunt regulator 13
And form a detection circuit 14 serving as a phase voltage feedback means. In addition, the DC power from the converter unit 2 is supplied to the smoothing unit 3
The inverter unit 18 for converting into an arbitrary frequency and voltage via the upper arm switching element 4, the lower arm switching element 5, the flywheel diode 6,
7 and the detection circuit 14. Numeral 15 detects the phase voltage which is the output of the inverter unit 18 by the detection circuit 14 and inputs the signal with the photocoupler 11 constituting the detection circuit 14 signal-insulated. Short-circuit prevention time T that turns off at the same time
It is a short circuit prevention time correction means for correcting and outputting d. 1
Reference numeral 6 denotes a short-circuit prevention time creating means for setting an optimum short-circuit prevention time based on the corrected input signal from the short-circuit prevention time correcting means 15. Reference numeral 17 denotes an output circuit, which outputs a PWM control signal for each of the upper arm switching element 4 and the lower arm switching element 5 based on a signal input regarding the short circuit prevention time from the short circuit prevention time generation means 16. 1
An induction motor 9 serves as a load.

The short-circuit prevention time correction means 15, the short-circuit prevention time creation means 16, and the output circuit 17 constitute an inverter control section 20 which alternately controls the switching elements 4 and 5 with a time lag Td.

Next, the operation will be described. In the inverter device configured as described above, the switching elements 4 and 5 are controlled by the inverter control unit 20 to generate the time lag T.
PWM control is performed by alternately providing d, and the inverter unit 1
The phase voltage, which is the AC output of 8, is detected by the detection circuit 14, performs signal insulation, and returns to the inverter control unit 20. That is, the detection circuit 14 detects the phase voltage based on the turning on / off of the switching elements 4 and 5, and when the phase voltage reaches about 1/2 of the DC input voltage, turns on the shunt regulator 13 to turn on the photocoupler. An input signal is given to 11, and the output signal of the signal-isolated photocoupler 11 is fed back to the inverter controller 20.

As shown in a period Td of FIG. 15D, even if the potential of the phase voltage is not established and becomes an unstable potential in the short circuit prevention period Td, the upper arm switching element 4 and the lower arm switching element 5 are turned on. , OFF is detected with a half of the DC voltage value, the detection signal becomes a signal as shown in FIG. That is, the value of the phase voltage V _U is divided into voltage dividing resistors 8 and 9.
The voltage is divided by, and the voltage V _R of the lower voltage dividing resistor 9 is set to be the threshold value of the shunt regulator 13 when it becomes half the value of the DC voltage, thereby turning on the photocoupler 11. The signal insulated from the output circuit of the inverter unit 18 is output from the detection circuit 14. In this way, by detecting the value of the phase voltage V _{U at} a value that is half the DC voltage value, the voltage fluctuation during the short circuit prevention period Td is averaged.

[0007]

As described above, the conventional inverter device detects the threshold value for controlling the on / off control of the upper and lower arm switching elements of the inverter with respect to the predetermined converter voltage Vc. Since the voltage is detected at Vc / 2 which is half the voltage, when the characteristics of the elements forming the detection circuit such as the photocoupler for detecting the converter voltage Vc change due to aging, etc. , The detection voltage does not become Vc / 2 correctly, an error occurs in the on / off detection timing of the switching element, and as a result, the short-circuit prevention time correction means does not function properly, which deteriorates the control characteristics of the induction motor. There was a problem.

The present invention has been made in order to solve such a problem, and in a detector of an inverter voltage used for a short-circuit prevention time correction means, for example, a change in characteristics due to aging of elements constituting a detection circuit or the like. Correct the ON / OFF timing of the switching element even for changes in the detection voltage due to changes in the detection voltage, or changes in the detection voltage due to changes in the ambient conditions of the detector, and make the short-circuit prevention time correction means function properly. An object of the present invention is to obtain an inverter device that improves the control characteristics of an induction motor and an on / off control method for its switching element.

[0009]

In an inverter device according to the present invention, a direct current power source and an inverter section composed of a pair of serially connected switching elements for converting direct current from the direct current power source into alternating current, Phase voltage detecting means for detecting a phase voltage which is an AC output of the inverter section,
Turning on the pair of switching elements connected in series
Threshold value setting means for setting a threshold value to be turned off and the paired switching elements connected in series are alternately controlled with a short circuit prevention period based on the threshold value of the threshold value setting means. In an inverter device including inverter control means, reference voltage setting means for setting a value smaller than a voltage value corresponding to a threshold value of the threshold value setting means as a reference voltage value, and phase of the phase voltage detection means. Arrival time calculation means for calculating the time from when the voltage value reaches zero to the DC voltage value of the DC power supply, and the threshold value of the threshold value setting means from the reference voltage value set by the reference voltage setting means Correction time calculating means for calculating the time until reaching the voltage value corresponding to
The threshold value setting means sets the time when the correction time of the correction time calculation means has elapsed from the time when the phase voltage of the phase voltage detection means reaches the reference voltage value set by the reference voltage setting means, to the series. It is set as the time corresponding to the threshold value for turning on / off the pair of connected switching elements.

The voltage value corresponding to the threshold value of the threshold value setting means is set to 1/2 of the DC voltage value of the DC power supply.

Further, the reference voltage value of the reference voltage setting means is set to 20 to 40% of the DC voltage value of the DC power supply.

The correction time calculation means changes the setting of the correction time based on the ambient temperature of the phase voltage detection means.

The correction time calculating means changes the setting of the correction time based on the temperature of the switching element.

The correction time calculating means changes the setting of the correction time based on the magnitude of the load current of the inverter section.

The correction time calculating means changes the setting of the correction time based on the magnitude of the DC voltage of the DC power supply.

Further, the correction time calculating means makes the setting of the correction time different between the rising and falling of the phase voltage of the phase voltage detecting means.

In addition, in the method for controlling the on / off of the switching element of the inverter device, a direct current power source and an inverter section composed of a pair of serially connected switching elements for converting direct current from the direct current power source into alternating current are provided. A threshold value setting means for setting a threshold value for turning on / off the pair of serially connected switching elements, and the series connected pair based on the threshold value of the threshold value setting means. An inverter control means for alternately controlling a switching element with a short circuit prevention period, and an on / off control method for a switching element of an inverter device, the voltage value being smaller than a voltage value corresponding to a threshold value of the threshold value setting means. A value is set as a reference voltage value, and the phase voltage, which is the AC output of the inverter section, reaches zero from the DC voltage value of the DC power supply. Until the voltage value corresponding to the threshold value for turning on / off the pair of switching elements connected in series is calculated from the reference voltage value as a correction time, The time when this correction time has elapsed from the time when the voltage value is reached is set as the time corresponding to the threshold value for turning on / off the pair of switching elements connected in series.

Further, the voltage value corresponding to the threshold value of the threshold value setting means is set to 1/2 of the DC voltage value of the DC power supply.

Then, the reference voltage value is set to 20 to 40% of the DC voltage value of the DC power supply.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. One embodiment of an inverter device that appropriately corrects the on / off control timing of a switching element of an inverter will be described with reference to FIGS. 1 to 9. FIG. 1 is a block diagram showing the overall configuration of an inverter device used in an elevator drive control panel, and FIG. 2 is T
FIG. 3 is a block diagram showing the configuration of the PWM circuit 29 with a pulse width correction function, FIG. 4 is a block diagram showing the configuration of the PWM circuit 30 of the converter 21, and FIG. 5 is a pulse diagram. FIG. 6 is a block diagram showing the configuration of the pulse width correction circuit 35 used in the PWM circuit 29 with a width correction function, and FIG. 6 is a pulse width correction circuit 35 shown in FIG.
7 is a time chart showing the signal waveform of each part of FIG. 7, FIG. 7 is a flow chart for explaining the operation of the detection circuit 14A for detecting ON / OFF of the switching element in the non-operation mode, and FIG. 8 is an operation mode of the PWM circuit 29 with a pulse width correction function. 9 is a time chart showing the signal waveform of each part of the PWM circuit 29 with the pulse width correction function in the operation mode. In the figure, the same symbols as in the conventional example indicate the same or corresponding parts.

In FIG. 1, reference numeral 104 denotes an elevator drive control panel. In the drive control panel 104, electric power is supplied from the three-phase AC power source 1 to drive the inverter element portion of 103, thereby the elevator motor. Controlled electric power is supplied to 19 to operate an elevator device (not shown). At this time, in order to control the drive timing of the inverter element unit 103, first, the 14A phase voltage detector detects the switching timing of the inverter element unit 103, and the Td timing detection / correction unit 102 determines the timing. A short circuit prevention time (hereinafter referred to as Td) for preventing a power source short circuit due to simultaneous conduction of the upper and lower switching elements of the inverter element unit 103 is obtained, and is sent as a Td signal to the inverter drive control unit 17A which is the inverter control means. Therefore, the inverter drive control unit 17A calculates the timing for making the upper and lower switching elements of the inverter element unit 103 conductive, also referring to the Td signal, and drives the switching elements. This Td value is an appropriate value that changes depending on various conditions of the control device, and the Td correction value detection command unit 101 determines the appropriate value.

Next, a method for obtaining an appropriate Td correction value will be described. In FIG. 2, reference numeral 21 denotes a converter unit, and in the figure, only one phase among three phases is shown, and an upper arm switching element 22 and a lower arm switching element 23 are connected in series. A voltage converter 24 insulates the voltage of the converter unit and changes its voltage level. For example, when the converter voltage is 100v, the output signal 24a of the voltage converter 24 is 1v. 25
Is an analog-to-digital converter (hereinafter A) that inputs an analog voltage and outputs the corresponding digital code.
/ D converter), for example, its output signal 25
a is the output signal 24a of the voltage converter 24 which is the input
When it is v, it is assumed that it is converted into a hexadecimal number 20H (the hexadecimal number is appended with H for omission). 26 is a microprocessor unit (hereinafter referred to as MPU)
The output signal 2 of the A / D converter 25 is connected to the input port of U26.
5a is supplied. Further, the MPU 26 sequentially reads and decodes microcodes stored in advance in a read only memory (hereinafter referred to as ROM) 27, and operates according to the code (hereinafter referred to as a program).

28 is a random access memory (hereinafter referred to as RA
It is referred to as M), and is a storage element for reading and writing data when the MPU 26 operates. ROM27, R
The AM 28 is the address and data bus 26b of the MPU 26.
Connected to. The output signal 26c of the MPU 26 is supplied to the PWM circuit 29 with the pulse width correction function, and
The output signal 26d of is output to the PWM circuit 30. MP
The basic timing for operating the U26 is determined by an output signal 31a (hereinafter referred to as a clock signal) that repeats the logic levels L and H output by the clock oscillator 31 in a constant cycle. The clock signal 31a is supplied to the PWM circuit 29 and the PWM circuit 30 with a pulse width correction function in addition to the MPU 26, and controls the operation timing of these circuits.

Reference numeral 18A denotes an inverter unit according to this embodiment, which shows one phase out of three phases in FIG. 2, and supplies electric power to 19 hoisting machine motors. still,
Turning on the switching elements 4 and 5 of the inverter unit 18A
The phase voltage detector 14A that detects the OFF state is the current limiting resistor 1
0, 12 and the photocoupler 11 to generate an output signal 11a that voltage-insulates the phase voltage that is the output of the inverter unit 18A, and this signal is input to the MPU 26 and the PWM circuit 29 with a pulse width correction function. Output signals 29a, 29 of the PWM circuit 29 with pulse width correction function
b is supplied to the control terminals of the switching elements 4 and 5 of the inverter section 18A via the output circuit 17A, and PWM
The output signals 30a and 30b of the circuit 30 are output to the switching elements 22 and 23 of the converter unit 21 via the output circuit 17B.
Is supplied to the control terminal of.

FIG. 3 shows the configuration of a PWM circuit 29 with a pulse width correction function that performs the characteristic function of this embodiment. The carrier wave generation circuit 32 and the modulated wave generation circuit 3 are shown.
3, a comparison circuit 34, a pulse width correction circuit 35, a selector gate 35B that enables or disables the pulse width correction, and an interlock time generation circuit 36. The output signal 32a of the carrier wave generation circuit 32 is sent to the comparison circuit 34, and the output signal 33a of the modulated wave generation circuit 33 is sent to the comparison circuit 34.
The output signal 34a of the comparison circuit 34 is the pulse width correction circuit 35.
And the selector gate 35B, the pulse width correction circuit 35
Is supplied to the selector gate 35B, and the output signal 35d of the selector gate 35B is supplied to the interlock time generation circuit 36.

FIG. 4 shows the configuration of the PWM circuit 30 that controls the converter section 21 that does not include the pulse width correction circuit 35. Compared with the PWM circuit 29 having the pulse width correction function, the pulse width correction circuit 35 is included. However, the same configuration is adopted except that the output signal 11a obtained by voltage-insulating the phase voltage output from the inverter unit 18A is not supplied.

FIG. 5 shows an example of the configuration of the pulse width correction circuit 35. 37 is a 2 ^{n, that} is, a binary N-bit up / down counter, and the U / D terminal is high (hereinafter referred to as H
Abbreviated) and when the E terminal is H, it counts up in synchronization with the rising clock of the T terminal, and when the U / D terminal is low (hereinafter abbreviated as L) and the E terminal is H, the clock of the T terminal It counts down in synchronization with the rising edge. still,
When the E terminal is L, it is held without counting. The CY terminal is
For example, if n = 8 now, a signal that becomes H at the count value FFH when the U / D terminal is H, becomes H at the count value 00H when the U / D terminal is L, and becomes L at other times. Is output. When the L terminal of the bar becomes L, the data of the D terminal at that time is loaded into the internal counter.
However, in the up / down counter 37, the D terminal and the bar L terminal are not used, and these terminals are both fixed to H.

Reference numeral 38 is a 2 ⁿ up / down counter, and the function of each terminal is the same as that of the up / down counter 37. 39, 40, 41 are D flip-flops, 4
Reference numerals 2 and 43 are SR flip-flops, 44 is an inverter, 45 is an EOR gate, and 46 to 54 are AND gates. A signal with a circle at the input terminal means that the logic is inverted before connection. To do. Reference numerals 55, 56 and 57 are OR gates, and 58 is a NOR gate. The internal configurations of the carrier wave generation circuit 32, the modulated wave generation circuit 33, the comparison circuit 34, and the interlock time generation circuit 36 shown in FIGS. 3 and 4 are easy to explain in the operation using the time chart shown in FIG. Since it can be understood that it is omitted here.

Next, of the control device having the above-mentioned configuration, the operation of the pulse width correction circuit 35, which is a constituent element of the PWM circuit 29 with the pulse width correction function, which performs a characteristic operation to perform the intended function. This will be described with reference to a block diagram showing the configuration of the pulse width correction circuit 35 in FIG. 5 and a time chart showing the signal waveform of each part of the pulse width correction circuit 35 in FIG.

In FIG. 5, for the sake of explanation, the count value 37Q output to the Q terminal of the up / down counter 37 is FB.
The operation from when the count value 38Q output to H or the Q terminal of the up / down counter 38 becomes 02H will be described below. As will be described below, the count value 37Q of the up / down counter 37 changes the output signal 34a of the comparison circuit 34 first, and then follows the change to output the phase voltage output from the inverter unit 18A as a voltage. It is determined by the time until the insulated output signal 11a changes (this time lag is generated by the inverter device) and the count value 38Q of the up / down counter 38.

Here, the count value 38Q of the up / down counter 38 is set by the MPU 26, and the MPU 26 outputs the data to be set as the output signal 26c.
NOR gate 58 while outputting to the signal line 38D as
This is done by setting the input signal 58a to H to H for a certain period of time. (The output signal 26c is the same as the signal on the signal line 38D and NOR.
It is a combination of the input signal 58a to the gate 58. In the following description, the initial value setting operation of the up / down counter 38 has already been completed, and thereafter, the signal on the signal line 38D is 02H and the input signal 58a to the NOR gate 58 is H.

In the time chart showing the signal waveforms of the respective parts of the pulse width correction circuit 35 of FIG. 6, when the output signal 34a of the comparison circuit 34 changes from L to H, the EOR gate 45,
The E terminal of the up / down counter 37 becomes H through the OR gate 55 and the AND gate 48, and up counting is performed. When the count value 37Q counts up to FFH, the value 37CY at the CY terminal becomes H, and the AND gate 49, 50 and the OR gate 56 cause the D terminal of the D flip-flop 40 to have the same H level as the output signal 34a.
Then, the next CP signal input to the T terminal of the D flip-flop 40 is latched by the flip-flop 40 at the rising edge, and at this time, the output signal 35a from the Q terminal of the D flip-flop 40 becomes the same H as the signal 34a. . The output of the AND gate 49 is L except for one clock time when the CY terminal of the up / down counter 37 transits from L to H, and the output of the D flip-flop 40 is output via the AND gate 51 and the OR gate 56. That is, the value of the output signal 35a from the Q terminal of the D flip-flop 40 is H
Is held.

Next, when the output signal 11a changes from H to L, the output of the AND gate 52 becomes H, the SR flip-flop 43 is set, and its output, the output of the Q terminal, becomes H. This sets the E terminal of the up / down counter 38 to H via the AND gate 54 and the OR gate 57 to down-count the up / down counter 38, and also through the AND gate 46, the OR gate 55, and the AND gate 48. Then, the E terminal of the up / down counter 37 is also set to H, and the up / down counter 37
Will continue to be up-counted. here,
When the up / down counter 38 counts down to 00H, the value 38CY of the CY terminal becomes H and the value 38L of the bar L terminal is set to L via the OR gate 58, and the signal line 3
The signal value of 8D, that is, the value set to 02H for the converter unit 21 is preset and at the same time, the SR flip-flop 43 is reset.

Therefore, the E of the up / down counter counter 38 is passed through the AND gate 54 and the OR gate 57.
The terminal is set to L, the counting operation of the up / down counter 38 is stopped, and the output of the AND gate 46 also becomes L. Therefore, the outputs of the OR gate 55 and the AND gate 48 become L, and the up / down counter 37 counts up. Will stop.

Next, when the output signal 34a of the comparison circuit 34 changes from H to L, the up / down counter 3 is passed through the EOR gate 45, the OR gate 55, and the AND gate 48.
The E terminal of 7 becomes H and down counting is performed. When the count value 37Q of the up / down counter 37 counts down to 00H, the value 37CY of the CY terminal becomes H, and the AND gates 49 and 50 and the OR gate 56 cause the D terminal of the D flip-flop 40 to output the output signal 34.
It becomes L which is the value of a, and is latched by the D flip-flop 40 at the next rising edge of the CP signal input to the T terminal of the D flip-flop 40, and at this time, the output signal 35a from the Q terminal of the D flip-flop 40. Is the output signal 34
It becomes L same as a.

On the other hand, when the value 37CY of the CY terminal becomes H, the output of the AND gate 49 becomes H, so that the SR flip-flop 42 is set and its output Q is output.
The output of the terminal is H. This is AND gate 53 and O
E of the up / down counter 38 via the R gate 57
The terminal is set to H, the up / down counter 38 is down-counted, and the output of the AND gate 47 is set to H.
Therefore, the output of the AND gate 48 becomes L and the E terminal of the up / down counter 37 is L, so that the counting of the up / down counter 37 is stopped.

Next, the up / down counter 38 sets 00H.
When counting down to, the value 38CY of the CY terminal is H
And the value of the L terminal at the bar 38L via the OR gate 58
Is set to L and the signal value of the signal line 38D, which is now 02H, is preset, and at the same time, the SR flip-flop 42 is reset, and the up / down counter 38 is operated via the AND gate 53 and the OR gate 57. Is set to L, the counting operation of the up / down counter 38 is stopped, and the output of the AND gate 47 also becomes L. Therefore, the OR gates 45 and 55 and the AND gate 48 are again provided.
The E terminal of the up / down counter 37 becomes H via the, and the down count is restarted. Next, output signal 11a
Is changed from L to H, the output of the OR gate 45 becomes L, the outputs of the OR gate 55 and the AND gate 48 become L, and the down count of the up / down counter 37 is stopped.

The operation of the pulse width correction circuit 35 has been described in detail above with reference to FIGS. 5 and 6, but in summary, basically, the output signal 34a of the comparison circuit 34 and the inverter section 18 will be described.
When the output signal 11a obtained by voltage-insulating the phase voltage, which is the output of A, matches at the logical level, the counting operation is permitted.
However, as an exception, when the output signal 34a is H, the output signal 11a transits from H to L, and even if the output signal 34a and the output signal 34a do not match in logic level, the counting operation is continuously permitted for a certain time. Further, when the output signal 34a is L, even if the output signal 34a and the output signal 11a match at the logical level, the output signal 35a of the pulse width correction circuit 35 is kept for a certain period of time after transitioning from H to L. Prohibits counting operation. This exceptional time for permitting or prohibiting the count is set by the MPU 26. The counting direction is such that when the output signal 34a is H, it counts up, and when it is L, it counts down. Output signal 3
5a is set or reset to the same logical value as the output signal 34a when the up / down counter reaches FFH at the time of counting up and 00H at the time of counting down.

Next, the PWM circuit 29 with a pulse width correction function including the pulse width correction circuit 35 performs the operation of performing the intended function in combination with other constituent elements of the inverter control device in the pulse width in the operation mode of FIG. P with correction function
A time chart showing the signal waveform of each part of the WM circuit 29,
7 is a flowchart showing the operation of the detection circuit 14A in FIG. 7 in the non-operation mode, and P with pulse width correction function in FIG.
This will be described with reference to the flowchart showing the operation of the WM circuit 29 in the operation mode.

First, in the non-operation mode, the detection circuit 1
The operation of measuring the detected voltage of 4 A will be described with reference to the flowchart of FIG. First, the current limiting resistor 10 as a reference voltage setting means is set so that the photocoupler 11 is turned on at a preset reference voltage value V _TH0 . Next, in step S1, the MPU 26 sets its output signal 26c to L,
As shown in FIG. 3, the signal 35c input to the selector gate 35B is set to L to invalidate the output signal 35a of the pulse width correction circuit 35. As a result, an ideal PWM command pulse can be obtained. The output signal 34a of the comparison circuit 34 is supplied to the selector gate 35 without passing through the pulse width correction circuit 35.
It is given to the interlock time generation circuit 36 via B. On the other hand, the MPU 26 controls the output signals 29a and 29b of the direct interlock time generation circuit 36 regardless of the state of the pulse width correction circuit 35 by giving the output signal 26c to the modulated wave generation circuit 33 and setting the data. To do.

Next, in step S2, the inverter section 18A
A control signal for turning on the upper arm switching element 4 and turning off the lower arm switching element 5 is given. this is,
For example, in the case where the carrier generation circuit 32 is configured by an up / down counter that counts up from 01H to FEH and downcounts from FEH to 01H,
A value smaller than the minimum data of the carrier wave (carrier) is set in the modulated wave generation circuit 33. In this case, specifically, the MPU 26 uses the output signal 26c to set the data 00H in the modulated wave generation circuit 33.

As a result, the interlock time generation circuit 36
Output signal 29a becomes H, 29b becomes L, the upper arm switching element 4 is turned on, and the lower arm switching element 5 is turned on.
Is a command to turn off. Next, in step S3, initial values of variables used in the processes performed in steps S4 to S6 are set. For example, the data value 0 is set in the variable V ₀ provided at a predetermined address of the RAM 28, and the data value 1 is set in the variable ΔV _0.
Set 0.

Next, in step S4, V ₀ + ΔV ₀ is calculated, this is substituted for the variable V ₀ , and in step S5, the voltage of the converter section 21 is controlled to be V ₀ calculated in step S4. Next, in step S6, the inverter unit 18
The logic of the output signal 11a obtained by voltage-insulating the phase voltage which is the output of A is determined. Here, the output signal 11a is the detection circuit 14
A is a signal which becomes L when it is detected that the phase voltage V ₀ is equal to the reference voltage value V _TH0 . When this value is H, the photocoupler 11 is not turned on, so steps S4 to S
6 is repeated and the voltage of the converter unit 21 is changed to 10v (ΔV ₀
= 10) increase in steps, step S
This is continued until the photocoupler 11 is turned on at 6 and L is determined. When L is determined in step S6, the process proceeds to step S7, and the value of the variable V ₀ at that time is stored in V _TH0 as the reference voltage value.

Next, the operation of the operation mode will be described with reference to the flowchart of FIG. 8 and the time chart of FIG. First,
In step S101, the MPU 26 outputs the output signal 26c.
To H, and as shown in FIG. 3, selector gate 35B
Signal 35c input to H is set to H and pulse width correction circuit 3
The output signal 35a of 5 is validated. In step S102, the voltage of the converter unit 21 is controlled to be the predetermined voltage value Vc during operation. In step S103, it is determined whether to set the pulse width correction value in the pulse width correction circuit 35. When the correction value is newly set or changed, the process proceeds to step S104, and when it is not necessary to change the correction value, the process proceeds to step S106.

In the case of the initial state, the process proceeds to step S104, where the time Tc during which the phase voltage of the inverter section 18A changes from 0 to Vc is obtained. This value varies depending on the operating state of the inverter unit 18A such as the interlock time of the switching elements 4 and 5 of the upper and lower arms, and for example, Tc = 40 μs, and the following description will be given.

In step S105, the correction value D is calculated.
Correction is made so that the potential is 1/2 when the phase voltage of the inverter unit 18A changes from 0 to Vc and is equivalent to that when the detector 14A operates. Here, the inverter unit 1
When the phase voltage of 8A changes linearly, (1/2) T
c is the time until the phase voltage of the inverter section 18A changes from 0 to Vc / 2, and (V _TH0 / Vc) Tc is the inverter section 1
It is the time until the phase voltage of 8 A changes from 0 to V _TH0 , and is calculated by: correction time ΔT = ((1/2) − (V _TH0 / Vc)) × Tc correction value D = ΔT × f _CLK Then, ΔT is a correction time until the phase voltage of the inverter section 18A becomes from V _TH0 as the reference voltage value to Vc / 2 which is the voltage value corresponding to the threshold value. Here, V _TH0 is a voltage at which the photo coupler 11 is turned on, f _CLK
Is the oscillation frequency of the clock oscillator 31. For example,
Vc = 600v, V _TH0 = 150v, Tc = 40μs,
If f _CLK = 10 _MHZ , then ΔT = 10 μs, D
= 64H.

Next, in step S106, the MPU 26 outputs to its output 26c the data value D obtained in step S105.
= 64H is output to the up / down counter 38 via the signal line 38D and the NOR gate 5
The input signal 58a to 8 is set to H, and the correction value is set in the up / down counter 38 incorporated in the pulse width correction circuit 35. Next, the process proceeds to step S107, the normal operation mode process is performed, and the above process is repeated from step S102.

The above operation will be described with reference to the time chart of FIG. Here, the pulse width of the ideal PWM command pulse (width for turning on the upper arm switching element 4) is Ts, the time width of the phase voltage when the phase voltage of the inverter unit 18A is Vc / 2 is T _R , and the inverter unit 18A When the phase voltage rises from 0 to Vc, the time until the phase voltage reaches 0 to V _TH0 is t _u0 , and similarly, the time until the phase voltage of the inverter unit 18A falls from Vc to V _TH0 is t _d0. Or t _d1 . Here, t _d0 is a time corresponding to t _d1 one carrier cycle before (not shown), and generally t _d0 =
t _d1 .

[0049] At this time, the waveform of the phase voltage of the inverter section 18A shown in FIG. 9, when determining the relationship between T _R and _{Ts, T R = Ts + t} u0 + ΔT + t d1 -ΔT- (t d0 -ΔT + t u0 + ΔT) = the Ts + t _d1 -t _d0. Since t _d0 = t _d1 in general, T
_R = Ts, which means that the actual switching pulse width of the inverter matches the ideal PWM pulse width.

In this way, the phase voltage is the reference voltage value V
_The time when _TH0 is reached and the correction time ΔT is added is taken as the time when the phase voltage becomes Vc / 2, which is the voltage value corresponding to the threshold value. Since this time is set as a threshold value for turning on / off the switching element, when the value of the voltage V _TH0 changes from the initial value of the phase voltage due to the change of the element forming the detection circuit, V is again set to V. _If the value of the phase voltage corresponding to _TH0 and the time Tc when the phase voltage changes from 0 to Vc are measured and the correction time ΔT is newly set,
The time when the phase voltage becomes Vc / 2 can be calculated correctly. In this way, even when the state of the phase voltage detector changes, the on / off timing of the switching element whose short-circuit prevention period has been corrected can be easily corrected, and an ideal PWM with a simple detection circuit can be used. You can give orders.

Here, as the initial value of the phase voltage value corresponding to the reference voltage value V _TH0 , the output voltage of the photocoupler tends to be gradually higher than the initial value due to aging, so the reference voltage value V _TH0. It is not so preferable to set the initial value of s to a value close to the threshold value. On the other hand, if the value of the reference voltage value V _TH0 is too small, it malfunctions due to noise or the like, so it is appropriate to set it to 20 to 40% of the value of Vc.

If, as shown in this embodiment, ΔT
If the correction is not performed, the ideal pulse width Ts of the PWM command pulse becomes equal to the interval T _F between the time when the phase voltage rises from 0 to V _TH0 and the time when the phase voltage falls from Vc to V _TH0. Therefore, T _F = It becomes Ts. Here, from the waveform of the phase voltage of the inverter unit 18A shown in FIG. 9, T _R = T _F −2
Since it is ΔT, Ts is substituted into T _F , and T _R = Ts
-2 · ΔT. That is, the actual PW of the inverter
The M pulse width T _R is 2 · Δ from the ideal PWM pulse width Ts
It will be shortened by T.

Embodiment 2 Here, FIGS.
When the voltage at which the upper arm switching element 4 is turned on is different when the phase voltage of the inverter unit 18A rises from 0 to Vc and when it drops from Vc to 0, the on-state of the switching element of the inverter is turned on. Another embodiment of an inverter device that appropriately corrects the timing of off control will be described. In the figure, the same reference numerals as those in FIGS. 1 to 11 denote the same or corresponding parts. 10 is a block diagram showing the configuration of the pulse width correction circuit 35 corresponding to FIG. 5, FIG. 11 is a time chart showing the signal waveform of each part of the pulse width correction circuit 35 corresponding to FIG. 6, and FIG. 12 is corresponding to FIG. PW with pulse width correction function in operating mode
7 is a time chart showing signal waveforms of respective parts of the M circuit 29.

In the block diagram of FIG. 10, a major difference in configuration from the block diagram of FIG. 5 is that an up / down counter 38A and a NOR gate 59 are added, an OR gate 57 is deleted, and an AND gate 53 is added. The output is supplied to the AND gate 47 and the E terminal of the up / down counter 38A, and the output of the AND gate 54 is supplied to the AND gate 46 and the E terminal of the up / down counter 38. Then, the phase voltage of the inverter unit 18A changes from 0 to Vc.
The up / down counter 38 performs the correction when the voltage rises, and the up / down counter 38A performs the correction when the phase voltage falls from Vc to 0.

In the time chart of FIG. 11, the difference from the time chart of FIG. 6 is that the count value 38AQ of the up / down counter 38A is added, and the count value 38Q of the up / down counter 38 is the output signal of the comparison circuit 34. The state of the up / down counter 38A changes during the period in which 34a is H, and the count value 38AQ of the up / down counter 38A is
That is, the output signal 34a of 1 changes its state during the L period.

[0056] In the time chart of FIG. 12 differs from the time chart of FIG. 9 is a V _TH0a rather than detection voltage V _TH0 to detect a falling edge signal of the detection circuit 14A, the phase voltage of the inverter section 18A This is the point where the time from Vc to V _TH0a falls to t _d0a or t _{d 1a} . Further, the output signal of the AND gate 47 is not ΔT but ΔT _a
Becomes The operation is the same as in the first embodiment, T _R
A relationship of Ts _{is, T R = Ts + t u0} + ΔT + t d1a -ΔT a - a _{(t d0a -ΔT a + t u0} + ΔT) = Ts + t d1a -t d0a. Since t _d0a = t _d1a in general, T
_R = Ts.

As described above, the ON voltage characteristics of the switching elements are different when the phase voltage rises from 0 to Vc and when it falls from Vc to 0, and the same reference voltage value V
Against _TH0, the rise time of the phase voltage V _TH0, even when the falling edge is different from the V _TH0a, fine correction can be performed can be set the correction time [Delta] T, [Delta] T _a in accordance with the respective characteristics.

Embodiment 3 FIG. Here, another embodiment of an inverter device that appropriately corrects the timing of on / off control of a switching element of an inverter when a temperature state inside a control panel changes will be described with reference to FIGS. 1 and 13. To do. FIG. 13 is a flowchart for calculating different correction time ΔT and correction value D depending on the temperature condition in the control panel. The process starts in step S201, and in step S202, the in-panel temperature value K is detected by the in-panel temperature detector 105 of the elevator drive control panel shown in FIG. In steps S203 and S208, one of the three types of flows is selected according to the value of the in-board temperature value K.
In step S203, when the board temperature value K is 20 ° C. or lower, the process proceeds to step S204, and the board temperature value K is 20.
If the temperature exceeds ° C, the following determination is made in step S208. In step S208, the temperature value K in the panel is 40 ° C.
In the following cases, the process proceeds to step S209, and when the board temperature value K exceeds 40 ° C., the process proceeds to step S213.

In step S204, Ga is a flag indicating whether or not the correction value detection mode needs to be executed. When it is 1, it indicates that it is not necessary, and the process proceeds to step S207, when it is 0, the process proceeds to step S205, and step S104 shown in FIG. , S1
The same operation as 05 is performed. Here, the correction value detection mode for obtaining the correction time ΔTa and the correction value Da is executed, and step S
Proceed to 206. In step S206, since the correction value detection has been executed, the flag Ga is set to 1. Further, although not shown here, if it is desired to reset the correction value by any request, the flag Ga may be set to 0.

Next, in step S207, the data value Da is output to the signal line 38D from the MPU 26, and the signal 58a is output.
By outputting an H pulse as the pulse width correction circuit 3
5 can execute proper Td correction. If the board temperature value K is different from the above, step S203 → step S208 → step S209 → step S210.
→ Step S211 → According to the flow shown in Step S212, or Step S203 → Step S208
→ step S213 → step S214 → step S2
15 → Similar operation is executed according to the flow of step S216.

Therefore, even if the temperature in the control panel fluctuates, the correction value D for performing the appropriate Td correction corresponding to the temperature can be detected and used when driving the inverter. The influence of temperature drift can be reduced.

Embodiment 4 In the above-described third embodiment, the case has been described in which the on / off control timing of the switching element of the inverter is appropriately corrected based on the temperature value in the control panel. However, the element temperature of the inverter may be used as a reference. The switching characteristics of the transistors and diodes used in the inverter change depending on the temperature of the transistors. Therefore, the temperature of the element can be directly measured using the inverter element temperature detector 106 shown in FIG. 1, and Td correction can be performed using the value. As another method, the temperature detector 107 of the phase voltage detector shown in FIG. 1 may be used to measure the device temperature of the phase voltage detector, and the value may be used to perform Td correction.

As a factor causing the drift of the control system,
There is output current of the inverter. Since a change in the temperature of the inverter element or a change in the temperature of the phase voltage detector occurs with a certain time delay with respect to the change in the output current, Td is changed based on the change in the current value with time.
Corrections can be made. That is, the inverter output current detector 108 shown in FIG. 1 measures the output current value at appropriate time intervals, sequentially stores the values in the RAM memory 28, and squares a predetermined number of data to sum them. .
Then, as in the case of the temperature shown in FIG. 13, if the value obtained by squaring the currents and summing them is divided and the Td correction is performed,
A change in element temperature or device temperature can be known in advance, and predictive control for Td correction can be performed.

Further, the factor causing the drift of the control system is the input voltage of the inverter section 18A, that is, the voltage of the converter section 21. When the voltage of the converter unit 21 is the normal automatic operation of the elevator (for example, 60 to 750 m
(Rated operating speed per minute) and the voltage of the converter unit 21 may be changed during manual operation in which operation is performed at a lower speed (for example, operating speed of 20 m / min) than during automatic operation for maintenance and the like. . When the voltage of the converter unit 21 is different, the usage region of the element characteristics of the inverter unit 18A is also different, and
Since the temperature drifts of the elements are different, it is desired to carry out an appropriate Td correction according to each situation. Therefore, based on the converter voltage detected by the voltage converter 24 shown in FIG. 1, the Td correction is carried out in some cases similar to the case of the temperature shown in FIG. 13, whereby the drift of the control system can be reduced.

[0065]

Since the present invention is configured as described above, it has the following effects.

An inverter section composed of a DC power supply, a pair of switching elements connected in series for converting DC from the DC power supply into AC, and a phase voltage for detecting a phase voltage which is an AC output of the inverter section. Detection means, threshold value setting means for setting a threshold value for turning on / off the pair of serially connected switching elements, and the series connection based on the threshold value of the threshold value setting means In an inverter device comprising an inverter control means for alternately controlling paired switching elements with a short circuit prevention period, a value smaller than a voltage value corresponding to the threshold value of the threshold value setting means is set to a reference voltage. A reference voltage setting means to be set as a value, and a time when the phase voltage value of the phase voltage detecting means reaches a DC voltage value of the DC power supply from zero Calculating means, and a correction time calculating means for calculating, as a correction time, a time taken to reach a voltage value corresponding to a threshold value of the threshold value setting means from the reference voltage value set by the reference voltage setting means, The threshold value setting means, the time when the correction time of the correction time calculating means has elapsed from the time when the phase voltage of the phase voltage detecting means reaches the reference voltage value set by the reference voltage setting means. Is set as a time corresponding to a threshold value for turning on / off the pair of switching elements connected in series, so that a reference is made after the lapse of the correction time obtained by actual measurement from the time when the phase voltage reaches the reference voltage value. As a result, the switching element is turned on and off, and even when the state of the phase voltage detection means changes, the switching element on and off timing with the short-circuit prevention time corrected is corrected. The effect of the proper packaging.

Further, since the voltage value corresponding to the threshold value of the threshold value setting means is set to 1/2 of the DC voltage value of the DC power supply, the reference voltage value obtained by actual measurement is 1 / DC of the DC voltage value. When the phase voltage reaches the reference voltage value, the switching element is turned on / off based on the correction time after the phase voltage reaches the reference voltage value, and when the state of the phase voltage detection means changes. Also, there is an effect that the ON / OFF timing of the switching element in which the short circuit prevention time is corrected is made proper and the phase voltage fluctuation during the short circuit prevention period is prevented.

Further, since the reference voltage value of the reference voltage setting means is set to 20 to 40% of the DC voltage value of the DC power source, the switching element is turned on / off when the phase voltage reaches the reference voltage value. The correction time until the time corresponding to the threshold value is taken to be sufficiently long, and even when the state of the phase voltage detection means changes significantly from the initial state, the short-circuit prevention time is corrected and the ON / OFF timing of the switching element is corrected. Has the effect of making the appropriate.

Further, since the correction time calculation means changes the setting of the correction time based on the ambient temperature of the phase voltage detection means, when the ambient temperature of the phase voltage detection means changes, the reference voltage value or The correction time will be set again, and the ON / OFF of the switching
This has the effect of properly setting the off timing.

Further, since the correction time calculating means changes the setting of the correction time based on the temperature of the switching element, the reference voltage value and the correction time are reset by actual measurement when the temperature of the switching element changes. Therefore, there is an effect that the ON / OFF timing of the switching element in which the short circuit prevention time is corrected is made appropriate.

Further, since the correction time calculating means changes the setting of the correction time based on the magnitude of the load current of the inverter section, when the magnitude of the load current changes, the reference voltage value and the correction are actually measured. Will reset the time,
By predicting the temperature change of the phase voltage detection means and switching element, the short circuit prevention time is corrected and the switching element is turned on.
This has the effect of properly setting the off timing.

Further, since the correction time calculation means changes the setting of the correction time based on the magnitude of the DC voltage of the DC power supply, when the magnitude of the DC voltage changes, the reference voltage value or the correction is actually measured. The time will be reset, and the temperature change of the phase voltage detection means and switching element will be predicted,
This has the effect of properly adjusting the on / off timing of the switching element with the short-circuit prevention time corrected.

Further, since the correction time calculation means sets the correction time differently depending on the rise and fall of the phase voltage of the phase voltage detection means, the reference voltage value at the rise and fall of the phase voltage and Since the correction times are set independently of each other, there is an effect that the ON / OFF timing of the switching element in which the short circuit prevention time is corrected is made more appropriate.

Further, in the method for controlling the on / off of the switching element of the inverter device, a direct current power source and an inverter portion composed of a pair of serially connected switching elements for converting direct current from the direct current power source into alternating current are provided. A threshold value setting means for setting a threshold value for turning on / off the pair of serially connected switching elements, and the series connected pair based on the threshold value of the threshold value setting means. An inverter control means for alternately controlling a switching element with a short circuit prevention period, and an on / off control method for a switching element of an inverter device, the voltage value being smaller than a voltage value corresponding to a threshold value of the threshold value setting means. A value is set as a reference voltage value, and the phase voltage, which is the AC output of the inverter section, reaches zero from the DC voltage value of the DC power supply. Until the voltage value corresponding to the threshold value for turning on / off the pair of switching elements connected in series is calculated from the reference voltage value as a correction time, Since the time when this correction time has elapsed from the time when the voltage value is reached is set as the time corresponding to the threshold value for turning on and off the pair of switching elements connected in series, the phase voltage reaches the reference voltage value. The switching element is turned on with reference to the time after the correction time obtained by actual measurement from
Even when the state of the phase voltage detecting means changes, it has an effect of properly adjusting the on / off timing of the switching element in which the short circuit prevention time is corrected.

Further, since the voltage value corresponding to the threshold value of the threshold value setting means is set to 1/2 of the DC voltage value of the DC power supply, the reference voltage value obtained by actual measurement is 1 / DC of the DC voltage value. When the phase voltage reaches the reference voltage value, the switching element is turned on / off based on the correction time after the phase voltage reaches the reference voltage value, and when the state of the phase voltage detection means changes. Also, there is an effect that the ON / OFF timing of the switching element in which the short circuit prevention time is corrected is made proper and the phase voltage fluctuation during the short circuit prevention period is prevented.

Since the reference voltage value is set to 20 to 40% of the DC voltage value of the DC power supply, it corresponds to the threshold value for turning on / off the switching element when the phase voltage reaches the reference voltage value. Even if the state of the phase voltage detection means changes largely from the initial state, the correction time until the time to turn on will be sufficiently long, and the effect of making the ON / OFF timing of the switching element with the corrected short circuit prevention time appropriate There is.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an overall configuration of an inverter device used in an elevator drive control panel according to Embodiments 1, 3, and 4 of the present invention.

FIG. 2 is a block diagram of a control unit that generates a Td correction value according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a PWM circuit 29 with a pulse width correction function according to the first embodiment of the present invention.

FIG. 4 is a converter 2 according to the first embodiment of the present invention.
3 is a block diagram showing a configuration of a PWM circuit 30 of No. 1; FIG.

FIG. 5 is a block diagram showing a configuration of a pulse width correction circuit 35 according to the first embodiment of the present invention.

FIG. 6 is a time chart of the signal waveform of each part of the pulse width correction circuit 35 according to the first embodiment of the present invention.

FIG. 7 is a detection circuit 14 according to the first embodiment of the present invention.
It is a flow chart of operation in non-driving mode of A.

FIG. 8 is a flowchart of the operation in the operation mode of the PWM circuit 29 with the pulse width correction function according to the first embodiment of the present invention.

FIG. 9 is a time chart of signal waveforms of respective parts of the PWM circuit 29 with a pulse width correction function in the operation mode according to the first embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of a pulse width correction circuit 35 according to the second embodiment of the present invention.

FIG. 11 is a time chart of signal waveforms of respective parts of the pulse width correction circuit 35 according to the second embodiment of the present invention.

FIG. 12 is a time chart of signal waveforms of respective parts of the PWM circuit 29 with a pulse width correction function in the operation mode according to the second embodiment of the present invention.

FIG. 13 is a flowchart for calculating a correction time ΔT and a correction value D that differ depending on the temperature condition inside the control panel according to the third embodiment of the present invention.

FIG. 14 is a block diagram showing a configuration of a conventional inverter device.

FIG. 15 is a time chart of signal waveforms showing the operation of the conventional inverter device.

[Explanation of symbols]

3 smoothing section, 4 upper arm switching element, 5 lower arm switching element, 10 current limiting resistor, 11 photocoupler, 14A phase voltage detector, 17A inverter drive control section, 18A inverter section, 21 converter section, 24 voltage converter, 29 P with pulse width correction function
WM circuit, 35 pulse width correction circuit, 101 Td correction value detection command unit, 102 Td timing detection correction unit, 1
05 In-panel temperature detector of elevator drive control panel, 106
Inverter element part temperature detector, 107 phase voltage detector temperature detector, 108 inverter output current detector.

Claims (11)

[Claims] 1. An inverter unit composed of a DC power supply, a pair of switching elements connected in series for converting DC from the DC power supply to AC, and a phase voltage which is an AC output of the inverter unit is detected. Phase voltage detecting means, threshold setting means for setting a threshold value for turning on / off the pair of serially connected switching elements, and the serial connection based on the threshold value of the threshold setting means. An inverter control means for alternately controlling the paired switching elements with a short circuit prevention period, and a value smaller than the voltage value corresponding to the threshold value of the threshold value setting means. Reference voltage setting means for setting as the reference voltage value, and when the phase voltage value of the phase voltage detection means reaches the DC voltage value of the DC power supply from zero And a correction time calculating means for calculating, as a correction time, a time from when the reference voltage value set by the reference voltage setting means reaches the voltage value corresponding to the threshold value of the threshold value setting means. And the threshold setting means has passed the correction time of the correction time calculating means from the time when the phase voltage of the phase voltage detecting means reaches the reference voltage value set by the reference voltage setting means. An inverter device, wherein the time is set as a time corresponding to a threshold value for turning on / off the pair of switching elements connected in series. 2. The inverter device according to claim 1, wherein the voltage value corresponding to the threshold value of the threshold value setting means is set to ½ of the DC voltage value of the DC power supply. 3. The inverter device according to claim 1, wherein the reference voltage value of the reference voltage setting means is set to 20 to 40% of the DC voltage value of the DC power supply. 4. The inverter device according to claim 1, wherein the correction time calculation means changes the setting of the correction time based on the ambient temperature of the phase voltage detection means. 5. The inverter device according to claim 1, wherein the correction time calculation unit changes the setting of the correction time based on the temperature of the switching element. 6. The inverter device according to claim 1, wherein the correction time calculating means changes the setting of the correction time based on the magnitude of the load current of the inverter section. 7. The inverter device according to claim 1, wherein the correction time calculation means changes the setting of the correction time based on the magnitude of the DC voltage of the DC power supply. 8. The correction time calculation means makes the setting of the correction time different between the rise and fall of the phase voltage of the phase voltage detection means, according to any one of claims 1 to 7. Inverter device described. 9. An inverter unit composed of a direct current power source, a pair of switching elements connected in series for converting direct current from the direct current power source into an alternating current, and a pair of switching elements connected in series are turned on. Threshold value setting means for setting a threshold value to be turned off and the paired switching elements connected in series are alternately controlled with a short circuit prevention period based on the threshold value of the threshold value setting means. In an on / off control method of a switching element of an inverter device including an inverter control unit, a value smaller than a voltage value corresponding to a threshold value of the threshold value setting unit is set as a reference voltage value, and the inverter unit Of the AC output of the phase voltage from zero to reach the DC voltage value of the DC power supply is calculated, and from the reference voltage value to form the series-connected pair The time until reaching the voltage value corresponding to the threshold value for turning on / off the switching element is calculated as the correction time, and the time when this correction time has passed from the time when the reference voltage value was reached was connected in series. An on / off control method for a switching element of an inverter device, characterized by setting a time corresponding to a threshold value for turning on / off a pair of switching elements. 10. A switching element of an inverter device according to claim 8, wherein the voltage value corresponding to the threshold value of said threshold value setting means is set to 1/2 of the DC voltage value of said DC power supply. On / off control method. 11. The method for controlling ON / OFF of a switching element of an inverter device according to claim 9, wherein the reference voltage value is set to 20 to 40% of a DC voltage value of the DC power supply.