JPH09182447A - Abnormality detecting circuit of power converter - Google Patents

Abnormality detecting circuit of power converter

Info

Publication number
JPH09182447A
JPH09182447A JP7333538A JP33353895A JPH09182447A JP H09182447 A JPH09182447 A JP H09182447A JP 7333538 A JP7333538 A JP 7333538A JP 33353895 A JP33353895 A JP 33353895A JP H09182447 A JPH09182447 A JP H09182447A
Authority
JP
Japan
Prior art keywords
power converter
voltage detector
output
voltage
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7333538A
Other languages
Japanese (ja)
Other versions
JP3269368B2 (en
Inventor
Katsumi Ikeda
勝己 池田
Touma Yamamoto
融真 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP33353895A priority Critical patent/JP3269368B2/en
Publication of JPH09182447A publication Critical patent/JPH09182447A/en
Application granted granted Critical
Publication of JP3269368B2 publication Critical patent/JP3269368B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To control an inverter only by one voltage detector by specifying the abnormal state of a voltage detector when the output of an adder exceeds a specified value, and performing the protecting action for a power converter by a fault processing circuit. SOLUTION: Since the algebraic sum of respective line voltages VUS, VVW and VWU is O in principle, the output of an adder 1 is 0 when a voltage detector 14 is normal. When abnormality is caused at a part of the voltage detector 14, however, the output of a certain magnitude is generated in the adder 1. The output is detected by a comparator 2, the abnormal signal of the voltage detector 14 is outputted and an inverter 10 is stopped. Since there is the detection error in the voltage detector 14, it is necessary to provide the adequate detecting width so that the comparator 2 does not judge the detection error as the abnormality. In this way, the control of the inverter and the protection of a load can be performed without using independent voltage detectors for the control and the protection, respectively.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この発明は、多相交流出力を
発生するように構成した電力変換器の異常検出回路に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormality detection circuit for a power converter configured to generate a polyphase AC output.

【0002】[0002]

【従来の技術】図5は、(社)発明協会発行の発明協会
公開技報Vol.11−37、公技番号86−1104
5号に記載のインバータ装置の異常検出回路(不足電圧
検出回路)である。図において、10は三相ブリッジイ
ンバータ(以下、単にインバータと呼ぶ)、11は漏れ
リアクタンスを有する変圧器、12UV、12VW、12WU
はインバータ10の出力側各線間に挿入したコンデンサ
で、変圧器2の漏れリアクタンスとコンデンサ12UV
12VW、12WUとでフィルタ回路を構成している。13
は負荷、14はインバータ1の出力側線間電圧VUV、V
VW、VWUを検出する電圧検出器、15は電圧検出器14
の出力を整流する整流回路、16は比較器、17’は故
障処理回路である。
2. Description of the Related Art FIG. 5 shows an invention association published technical report Vol. 11-37, Official Skill Number 86-1104
It is an abnormality detection circuit (undervoltage detection circuit) of the inverter device described in No. 5. In the figure, 10 is a three-phase bridge inverter (hereinafter, simply referred to as an inverter), 11 is a transformer having a leakage reactance, 12 UV , 12 VW , 12 WU.
Is a capacitor inserted between the output side lines of the inverter 10, the leakage reactance of the transformer 2 and the capacitor 12 UV ,
A filter circuit is composed of 12 VW and 12 WU . 13
Is a load, and 14 is the output side line voltage V UV , V of the inverter 1.
A voltage detector for detecting VW and VWU , 15 is a voltage detector 14
Is a rectifier circuit for rectifying the output of the comparator, 16 is a comparator, and 17 'is a failure processing circuit.

【0003】次に動作について説明する。インバータ1
0の出力電圧を変圧器11の漏れリアクタンスとコンデ
ンサ12UV、12VW、12WUとで構成するフィルタ回路
を介して制御し、負荷13に安定な電力を供給する。イ
ンバータ10の出力電圧を比較器16で監視し、インバ
ータ10が何らかの原因で異常電圧を出力すると、負荷
に異常電圧を印加しないよう、故障処理回路17’がイ
ンバータ10を停止させる。
Next, the operation will be described. Inverter 1
The output voltage of 0 is controlled via a filter circuit composed of the leakage reactance of the transformer 11 and the capacitors 12 UV , 12 VW , and 12 WU to supply stable power to the load 13. The output voltage of the inverter 10 is monitored by the comparator 16, and when the inverter 10 outputs an abnormal voltage for some reason, the failure processing circuit 17 ′ stops the inverter 10 so that the abnormal voltage is not applied to the load.

【0004】[0004]

【発明が解決しようとする課題】従来のインバータの異
常検出回路は以上のように構成しており、1つの電圧検
出器で検出したインバータ出力電圧でインバータの電圧
制御とインバータの異常電圧保護を行うので、例えば電
圧検出器の検出ゲインが低下すると、インバータの制御
回路には、実際より小さな出力電圧があるものとしてフ
ィードバックするためインバータの出力電圧が過大なも
のになる。異常検出回路は検出ゲインの低下した電圧検
出器出力によって動作するため、この異常電圧を検出す
ることはできない。これを防止するには、制御用と保護
用の2つの電圧検出器を用いなければならないという問
題点があった。
The conventional inverter abnormality detection circuit is configured as described above, and performs inverter voltage control and inverter abnormal voltage protection by the inverter output voltage detected by one voltage detector. Therefore, for example, when the detection gain of the voltage detector is lowered, the control circuit of the inverter feeds back as if there is an output voltage smaller than the actual output voltage, so that the output voltage of the inverter becomes excessive. Since the abnormality detection circuit operates by the output of the voltage detector whose detection gain is lowered, this abnormality voltage cannot be detected. In order to prevent this, there is a problem that two voltage detectors for control and protection must be used.

【0005】この発明は、上述のような課題を解決する
ためになされたもので、電圧検出器の異常を検出するこ
とによって、1つの電圧検出器のみで、電圧検出器に異
常を生じた場合でも負荷に異常電圧を印加することのな
いインバータの制御を行うことのできる異常検出回路を
実現することを目的とする。
The present invention has been made in order to solve the above-mentioned problems, and in the case where an abnormality occurs in the voltage detector with only one voltage detector by detecting the abnormality in the voltage detector. However, it is an object of the present invention to realize an abnormality detection circuit capable of controlling an inverter without applying an abnormal voltage to a load.

【0006】[0006]

【課題を解決するための手段】3相交流を出力するイン
バータ装置とこのインバータ装置に接続した3相変圧器
とこの3相変圧器に接続したフィルタコンデンサとイン
バータ装置の故障を検出をするとともにインバータ装置
の保護動作を行う故障処理回路とを備える電力変換器に
対して、この電力変換器の出力電圧に基づいて異常の検
出を行う電力変換器の異常検出回路において、電力変換
器の出力電圧を検出する電圧検出器と、この電圧検出器
が正常であるときこの電圧検出器の3つの出力を加算し
た結果が原理的に零になるように電圧検出器の3つの出
力を加算する加算器とを備え、この加算器の出力が所定
の値を超えたとき電圧検出器の異常状態として故障処理
回路に電力変換器の保護動作を行わせるように構成し
た。
Means for Solving the Problems An inverter device for outputting a three-phase alternating current, a three-phase transformer connected to the inverter device, a filter capacitor connected to the three-phase transformer, and a failure of the inverter device are detected and the inverter is also provided. In the abnormality detection circuit of the power converter that detects an abnormality based on the output voltage of this power converter, the output voltage of the power converter is A voltage detector for detecting, and an adder for adding the three outputs of the voltage detector so that the result of adding the three outputs of the voltage detector when the voltage detector is normal is theoretically zero When the output of the adder exceeds a predetermined value, the failure processing circuit is configured to perform the protection operation of the power converter as an abnormal state of the voltage detector.

【0007】また、3相交流を出力するインバータ装置
とこのインバータ装置に接続しその負荷側を星形接続し
て3相4線式負荷に給電する3相変圧器とこの3相変圧
器に接続したフィルタコンデンサと前記インバータ装置
の故障を検出をするとともにインバータ装置の保護動作
を行う故障処理回路とを備える電力変換器に対して、こ
の電力変換器の出力電圧に基づいて異常の検出を行う電
力変換器の異常検出回路において、電力変換器出力の相
電圧を検出する電圧検出器と、中性点電流を検出する中
性点電流検出手段と、中性点電流から3相変圧器の漏れ
リアクタンスによる電圧降下を演算によって求める微分
器と、電圧検出器が正常であるとき電圧検出器の3つの
出力と微分器の出力とを加算した結果が原理的に零にな
るように電圧検出器の3つの出力と微分器の出力とを加
算する加算器とを備え、この加算器の出力が所定の値を
超えたとき電圧検出器の異常状態として故障処理回路に
電力変換器の保護動作を行わせるように構成した。
Further, an inverter device for outputting a three-phase alternating current and a three-phase transformer for connecting to the inverter device and connecting the load side thereof in a star shape to feed a three-phase four-wire type load and the three-phase transformer are connected. Power for detecting an abnormality on the basis of the output voltage of the power converter, for a power converter including a filter capacitor and a failure processing circuit for detecting a failure of the inverter device and performing a protective operation of the inverter device. In a converter abnormality detection circuit, a voltage detector for detecting a phase voltage of an output of a power converter, a neutral point current detecting means for detecting a neutral point current, and a leak reactance of a three-phase transformer from the neutral point current. The voltage is detected so that the result of adding the three outputs of the voltage detector and the output of the differentiator is zero in principle when the voltage detector is operating normally and the voltage detector is operating normally. And an adder for adding the output of the differentiator to the output of the differentiator, and when the output of the adder exceeds a predetermined value, an abnormal state of the voltage detector is detected, and the failure processing circuit is provided with a protection operation of the power converter. Configured to do.

【0008】[0008]

【発明の実施の形態】以下、この発明による電力変換器
の異常検出回路について、複数の実施形態を図を用いて
説明する。各図には従来の電力変換器の異常検出回路を
説明するのに用いた図5におけるのと同一もしくは相当
する部分には同一の符号を付し、機能や作用についての
重複する説明は省略する。
BEST MODE FOR CARRYING OUT THE INVENTION A plurality of embodiments of an abnormality detection circuit for a power converter according to the present invention will be described below with reference to the drawings. In each drawing, the same or corresponding portions as those in FIG. 5 used for explaining the conventional abnormality detection circuit of the power converter are designated by the same reference numerals, and the duplicated description of the function and action is omitted. .

【0009】実施形態1.図1は、この発明による第1
の実施形態である電力変換器の異常検出回路であり、1
はインバータ10出力の各線間電圧VUV、VVW、VWU
代数和を得る加算器、2は加算1の出力が所定の値を超
えると異常信号を出力する比較器である。次に動作につ
いて説明する。各線間電圧VUV、VVW、VWUの代数和は
原理的に常に0であるから、電圧検出器14が正常な場
合、加算器1の出力は0である。しかし、電圧検出器1
4の一部に異常が生じると加算器1にある大きさの出力
が生じる。この出力を比較器2により検出して電圧検出
器14の異常信号を出力し、インバータ10を停止させ
る。電圧検出器14には検出誤差があるため、比較器2
がこの検出誤差を異常と判定しないよう、適当な検出幅
をもたせる必要がある。このように、制御用と保護用に
それぞれ独立の電圧検出器を用いることなく、インバー
タの制御と負荷の保護が行なえる。
Embodiment 1 FIG. 1 shows a first embodiment of the present invention.
An abnormality detection circuit for a power converter according to the embodiment of
Is an adder that obtains the algebraic sum of the line voltages V UV , V VW , and V WU of the inverter 10 output, and 2 is a comparator that outputs an abnormal signal when the output of addition 1 exceeds a predetermined value. Next, the operation will be described. In principle, the algebraic sum of the line voltages V UV , V VW , and V WU is always 0. Therefore, when the voltage detector 14 is normal, the output of the adder 1 is 0. However, the voltage detector 1
When an abnormality occurs in a part of 4, the output of the adder 1 having a certain magnitude is generated. This output is detected by the comparator 2, an abnormal signal of the voltage detector 14 is output, and the inverter 10 is stopped. Since the voltage detector 14 has a detection error, the comparator 2
However, it is necessary to have an appropriate detection width so that this detection error is not judged to be abnormal. In this way, inverter control and load protection can be performed without using independent voltage detectors for control and protection.

【0010】実施形態2.図2は、この発明による第2
の実施形態である電力変換器の異常検出回路であり、3
相4線式の負荷13’に電力を供給するようにしたイン
バータ10の異常検出を行うようにしたものである。変
圧器11’の2次側は星形接続で、U相、V相、W相と
ともに中性点Nが負荷4に接続してある。また、U相、
V相、W相と中性点Nの間にはコンデンサ12U 、12
V 、12W が接続してある。電圧検出器14’はインバ
ータ10の各相電圧を、電流検出器3は変圧器11’か
ら中性点Nに流れる電流(以下、N相電流と呼ぶ)を検
出する。4は微分器、5は減算器である。
Embodiment 2 FIG. FIG. 2 shows a second embodiment of the present invention.
3 is an abnormality detection circuit of the power converter according to the embodiment of
This is to detect an abnormality of the inverter 10 that supplies electric power to the load 13 ′ of the phase 4-wire system. The secondary side of the transformer 11 'is star-shaped, and the neutral point N is connected to the load 4 together with the U-phase, V-phase and W-phase. Also, U phase,
Between the V and W phases and the neutral point N, capacitors 12 U and 12
V and 12 W are connected. The voltage detector 14 'detects each phase voltage of the inverter 10, and the current detector 3 detects a current (hereinafter, referred to as N-phase current) flowing from the transformer 11' to the neutral point N. 4 is a differentiator and 5 is a subtractor.

【0011】負荷13’が3相不平衡である場合、相電
圧VU 、VV 、VW の代数和は0にならない。この原因
は、変圧器11’の漏れリアクタンスによる電圧降下が
不平衡になるためである。しかし周知の通り、N相電流
が変圧器11’の各相の漏れリアクタンスに流れるとし
たときに生じる電圧降下は相電圧VU 、VV 、VW の代
数和と等しい。このことから、変圧器11’に流れるN
相電流を定数倍(変圧器2の漏れリアクタンスの大きさ
に応じた倍率)して微分し、相電圧VU 、VV 、VW
代数和から減算した量で電圧検出器の状態を監視すれ
ば、この発明の第1の実施形態と同様に制御用と保護用
にそれぞれ独立の電圧検出器を用いることなく、インバ
ータ10の制御と負荷の保護を行なうことができる。
When the load 13 'is three-phase unbalanced, the algebraic sum of the phase voltages V U , V V and V W does not become zero. This is because the voltage drop due to the leakage reactance of the transformer 11 'becomes unbalanced. However, as is well known, the voltage drop that occurs when the N-phase current flows through the leakage reactance of each phase of the transformer 11 ′ is equal to the algebraic sum of the phase voltages V U , V V , and V W. From this, the N flowing in the transformer 11 '
Phase current is multiplied by a constant (multiplication according to the magnitude of leakage reactance of the transformer 2) and differentiated, and the state of the voltage detector is monitored by the amount subtracted from the algebraic sum of the phase voltages V U , V V , and V W. By doing so, it is possible to control the inverter 10 and protect the load without using independent voltage detectors for control and protection as in the first embodiment of the present invention.

【0012】図2と同様の原理に基づいて、図3に示す
ような保護回路によっても制御用と保護用にそれぞれ独
立の電圧検出器を用いることなく、インバータの制御と
負荷の保護を行なうことができる。一般に、過負荷から
インバータを保護するため、負荷電流を監視してインバ
ータが過負荷になるとゲートを遮断するような保護回路
が設けられている。この保護回路を構成する電流検出器
の検出信号を利用することによって、図2を用いて説明
した電力変換器の異常検出回路のようにN相電流を検出
する電流検出器3を設けることなくインバータの制御と
負荷の保護が行なえる。図3は、N相電流をインバータ
の過負荷を検出する電流検出器18U 、18Vおよび1
W で検出する各相の負荷電流から加算器6を用いて代
数和として求め、コンデンサ12U 、12V 、12W
流れるコンデンサN相電流電流検出器3’によって検出
し、両者の代数和として変圧器N相電流を求め、以下図
2と同様に構成すればよい。
Based on the same principle as that of FIG. 2, the protection circuit shown in FIG. 3 also controls the inverter and protects the load without using independent voltage detectors for control and protection. You can Generally, in order to protect the inverter from overload, a protection circuit is provided that monitors the load current and shuts off the gate when the inverter becomes overloaded. By using the detection signal of the current detector which constitutes this protection circuit, the inverter can be provided without providing the current detector 3 for detecting the N-phase current as in the abnormality detection circuit of the power converter described with reference to FIG. Control and load protection. FIG. 3 shows current detectors 18 U , 18 V and 1 for detecting an N-phase current for an inverter overload.
The load current of each phase detected at 8 W is calculated as an algebraic sum using the adder 6 and detected by the capacitor N-phase current / current detector 3 ′ flowing in the capacitors 12 U , 12 V and 12 W, and the algebraic sum of both Then, the transformer N-phase current is obtained, and the same configuration as that shown in FIG.

【0013】同様に、図4に示すようにコンデンサN相
電流についてはN相電圧を微分することによって求める
ようにしてもよい。
Similarly, the N-phase current of the capacitor may be obtained by differentiating the N-phase voltage as shown in FIG.

【0014】なお、コンデンサN相電流は一般に小さい
ので図4における加算器7および微分器8を省略しても
よい。その理由は、コンデンサ12U 、12V 、12W
の容量および変圧器2の漏れインダクタンスは、装置定
格の数%程度であり、負荷電流に対してコンデンサ電流
は十分小さいので、これを無視しても影響はわずかであ
り、電圧検出器の異常を検出するのにほとんど影響を与
えないからである。
Since the capacitor N-phase current is generally small, the adder 7 and the differentiator 8 in FIG. 4 may be omitted. The reason is that capacitors 12 U , 12 V , 12 W
Capacity and the leakage inductance of the transformer 2 are about several% of the device rating, and the capacitor current is sufficiently small with respect to the load current, so even if this is neglected, the effect is slight and the abnormality of the voltage detector is detected. It has almost no effect on the detection.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の第1の実施形態である電力変換器
の異常検出回路である。
FIG. 1 is an abnormality detection circuit for a power converter according to a first embodiment of the present invention.

【図2】 この発明の第2の実施形態である電力変換器
の異常検出回路である。
FIG. 2 is an abnormality detection circuit for a power converter according to a second embodiment of the present invention.

【図3】 この発明の第2の実施形態の変形例である電
力変換器の異常検出回路である。
FIG. 3 is an abnormality detection circuit for a power converter that is a modification of the second embodiment of the present invention.

【図4】 この発明の第2の実施形態の他の変形例であ
る電力変換器の異常検出回路である。
FIG. 4 is an abnormality detection circuit for a power converter that is another modification of the second embodiment of the present invention.

【図5】 従来の電力変換器の異常検出回路である。FIG. 5 is an abnormality detection circuit of a conventional power converter.

【符号の説明】[Explanation of symbols]

1、5、6、7 加算器 2 比較器 3
電流検出器 4、8 微分器 17 故障処理回路
1, 5, 6, 7 Adder 2 Comparator 3
Current detector 4, 8 Differentiator 17 Fault processing circuit

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 3相交流を出力するインバータ装置とこ
のインバータ装置に接続した3相変圧器とこの3相変圧
器に接続したフィルタコンデンサと前記インバータ装置
の故障を検出をするとともに前記インバータ装置の保護
動作を行う故障処理回路とを備える電力変換器に対し
て、この電力変換器の出力電圧に基づいて異常の検出を
行う電力変換器の異常検出回路において、 前記電力変換器の出力電圧を検出する電圧検出器と、こ
の電圧検出器が正常であるときこの電圧検出器の3つの
出力を加算した結果が原理的に零になるように前記電圧
検出器の3つの出力を加算する加算器とを備え、この加
算器の出力が所定の値を超えたとき前記電圧検出器の異
常状態として前記故障処理回路に前記電力変換器の保護
動作を行わせるように構成したことを特徴とする電力変
換器の異常検出回路。
1. An inverter device for outputting a three-phase alternating current, a three-phase transformer connected to the inverter device, a filter capacitor connected to the three-phase transformer, and a failure of the inverter device are detected and the inverter device In an abnormality detection circuit of a power converter that detects an abnormality based on an output voltage of the power converter for a power converter that includes a failure processing circuit that performs a protection operation, the output voltage of the power converter is detected. And an adder for adding the three outputs of the voltage detector so that the result of adding the three outputs of the voltage detector is zero in principle when the voltage detector is normal. When the output of the adder exceeds a predetermined value, it is configured as an abnormal state of the voltage detector to cause the failure processing circuit to perform the protection operation of the power converter. Abnormality detection circuit for a power converter according to claim.
【請求項2】 3相交流を出力するインバータ装置とこ
のインバータ装置に接続しその負荷側を星形接続して3
相4線式負荷に給電する3相変圧器とこの3相変圧器に
接続したフィルタコンデンサと前記インバータ装置の故
障を検出をするとともに前記インバータ装置の保護動作
を行う故障処理回路とを備える電力変換器に対して、こ
の電力変換器の出力電圧に基づいて異常の検出を行う電
力変換器の異常検出回路において、 前記電力変換器出力の相電圧を検出する電圧検出器と、
中性点電流を検出する中性点電流検出手段と、前記中性
点電流から前記3相変圧器の漏れリアクタンスによる電
圧降下を演算によって求める微分器と、前記電圧検出器
が正常であるとき前記電圧検出器の3つの出力と前記微
分器の出力とを加算した結果が原理的に零になるように
前記電圧検出器の3つの出力と前記微分器の出力とを加
算する加算器とを備え、この加算器の出力が所定の値を
超えたとき前記電圧検出器の異常状態として前記故障処
理回路に前記電力変換器の保護動作を行わせるように構
成したことを特徴とする電力変換器の異常検出回路。
2. An inverter device for outputting a three-phase alternating current, and the inverter device connected to the inverter device, and the load side of which is star-connected.
Power conversion including a three-phase transformer for supplying a four-phase four-wire load, a filter capacitor connected to the three-phase transformer, and a failure processing circuit that detects a failure of the inverter device and protects the inverter device A voltage detector that detects a phase voltage of the power converter output in an abnormality detection circuit of the power converter that detects an abnormality based on the output voltage of the power converter,
A neutral point current detecting means for detecting a neutral point current, a differentiator for calculating a voltage drop due to a leakage reactance of the three-phase transformer from the neutral point current, and a normalizer for the voltage detector. And an adder for adding the three outputs of the voltage detector and the differentiator so that the result of adding the three outputs of the voltage detector and the differentiator becomes zero in principle. A power converter characterized in that when the output of the adder exceeds a predetermined value, the failure processing circuit is caused to perform a protective operation of the power converter as an abnormal state of the voltage detector. Anomaly detection circuit.
【請求項3】 前記中性点電流検出手段が負荷の相電流
を検出する負荷電流検出器と前記フィルタコンデンサを
流れる電流のコンデンサ電流検出器と前記負荷電流検出
器出力と前記コンデンサ電流検出器出力を加算する加算
器からなることを特徴とする請求項2に記載の電力変換
器の異常検出回路。
3. A load current detector for detecting the phase current of a load by the neutral point current detecting means, a capacitor current detector for the current flowing through the filter capacitor, the load current detector output, and the capacitor current detector output. The abnormality detection circuit of the power converter according to claim 2, comprising an adder for adding
【請求項4】 前記コンデンサ電流検出手段が前記電圧
検出器出力を加算する第2の加算器の出力を演算して前
記フィルタコンデンサを流れる電流を演算によって求め
る第2の微分器からなることを特徴とする請求項3に記
載の電力変換器の異常検出回路。
4. The capacitor current detecting means comprises a second differentiator for calculating the output of a second adder for adding the outputs of the voltage detector to obtain the current flowing through the filter capacitor by calculation. The abnormality detection circuit for a power converter according to claim 3.
JP33353895A 1995-12-21 1995-12-21 Power converter abnormality detection circuit Expired - Lifetime JP3269368B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33353895A JP3269368B2 (en) 1995-12-21 1995-12-21 Power converter abnormality detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33353895A JP3269368B2 (en) 1995-12-21 1995-12-21 Power converter abnormality detection circuit

Publications (2)

Publication Number Publication Date
JPH09182447A true JPH09182447A (en) 1997-07-11
JP3269368B2 JP3269368B2 (en) 2002-03-25

Family

ID=18267174

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33353895A Expired - Lifetime JP3269368B2 (en) 1995-12-21 1995-12-21 Power converter abnormality detection circuit

Country Status (1)

Country Link
JP (1) JP3269368B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3327927A1 (en) 2016-11-28 2018-05-30 Toyota Jidosha Kabushiki Kaisha Motor driving device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63253877A (en) * 1987-04-10 1988-10-20 Toshiba Corp Controller for inverter
JPH01177872A (en) * 1988-01-07 1989-07-14 Fuji Electric Co Ltd Current instantaneous-value control type pwm inverter
JPH06245301A (en) * 1993-02-17 1994-09-02 Hitachi Ltd Open-phase detection system in controller for electric vehicle

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63253877A (en) * 1987-04-10 1988-10-20 Toshiba Corp Controller for inverter
JPH01177872A (en) * 1988-01-07 1989-07-14 Fuji Electric Co Ltd Current instantaneous-value control type pwm inverter
JPH06245301A (en) * 1993-02-17 1994-09-02 Hitachi Ltd Open-phase detection system in controller for electric vehicle

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3327927A1 (en) 2016-11-28 2018-05-30 Toyota Jidosha Kabushiki Kaisha Motor driving device
US10044299B2 (en) 2016-11-28 2018-08-07 Toyota Jidosha Kabushiki Kaisha Motor driving device

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