JPH09179637A - Phase control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the high absolute accuracy of the maximum value and the minimum value of the arbitrarily set conducting angle of a switching element and to suppress the fluctuation of the maximum value and the minimum value due to a temperature by comparing a variable voltage obtained in a variable power output means with the voltage level of an integration waveform. SOLUTION: In order to respectively equalize the ratio of the maximum phase angle and the ratio of the minimum phase angle of a phase angle range for driving a load to the phase angle of the half cycle of an AC power source 1 and respective DC voltage rations to a DC voltage detected by a peak voltage value detection circuit 6, the DC voltage detected by the peak voltage value detection circuit 6 is divided by a resistor element and the DC voltage for setting the maximum phase angle and the DC voltage for setting the minimum phase angle are outputted. Then, by selecting the variable voltage in the range of the DC voltages for setting the maximum and minimum phase angles and comparing the variable voltage with the voltage level of the integration waveform, a period when trigger pulses are generated and turning on the switching element is decided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase control circuit for controlling the energization of a load such as a lamp or a heater, and more particularly to controlling the energization rate of the load and performing the on / off operation of the energization. The present invention relates to a phase control circuit.

[0002]

2. Description of the Related Art Conventionally, as a phase control circuit for driving a load by using an AC power source whose phase is controlled by a switching element, various configurations are known, one example of which is shown in FIG. ), (B) are available (NEC Data Book, "Small and Medium Power Semiconductors",
See pages 440-443). FIG. 7A is a circuit configuration diagram showing a conventional phase control circuit, and FIG. 7B is a diagram showing the relationship between voltage and phase during its operation. In FIG. 7A, reference numeral 101 is an AC power source, which is connected to the load 102, the capacitors 103 and 104, and the first electrode of the triac 105. The second electrode of the triac 105 is the load 102
To the resistance elements 106 and 107, and the gate terminal of the triac 105 is connected to the first electrode of the diac 108.
The second electrode of the diac 108 is connected to the capacitor 103 and one ends of the variable resistors 109 and 110, the other end of the variable resistor 109 is connected to the resistor element 106, and the other end of the variable resistor 110 is connected to the resistor element 107 and the capacitor 104. There is. Further, in FIG. 7B, the waveform a shows the waveform of the voltage and phase of the AC power supply 101,
The waveform b shows the voltage and the phase between the terminals of the capacitor 103. V _BO is the breakover voltage of DIAC 108,
V _C is the amplitude voltage between the terminals of the capacitor 103, and φ _T is the conduction angle of the triac 105.

Next, the operation of the phase control circuit having such a configuration will be described. First, in order to explain the basic operation, the circuit operation in a configuration in which the resistance element 107, the capacitor 104 and the variable resistance 110 are omitted will be described. in this case,
The resistance element 106, the variable resistor 109, and the capacitor 103 form a phase shift circuit, and the voltage across the capacitor 103 is diac.
When the breakover voltage V _BO of 108 is reached, the capacitor
The electric charge stored in 103 is discharged through the diac 108. The pulse current obtained here triggers the triac 105, and the triac 105 is made conductive during the remaining part φ _T of the half cycle, whereby phase control can be performed.

During the period of φ _T , the resistance element 106 and the variable resistance 10
Capacitor 10 determined by the time constant of 9 and capacitor 103
It can be set by the voltage between terminals 3 and the breakover voltage V _BO of the diac 108. At this time, when the variable resistor 109 is set to the minimum value, φ _T becomes the maximum value φ _Tmax , and when the variable resistor 109 is set to the maximum value, the minimum value of φ _T becomes φ _Tmin . The resistance value R ₁ , the maximum value R _V1 of the variable resistor 109, the capacitance value C ₁ of the capacitor 103, and the breakover voltage V _BO of the diac 108 are selected.

The resistor element 107 and the capacitor 104 described above
In the operation of the circuit in which the variable resistor 110 is omitted, the resistance element 107, the capacitor 104, and the variable resistor 110 are actually added because the low output portion near the triac conduction start point has a large hysteresis. The reason why the low output part near the triac conduction start point has a large hysteresis is that when the variable resistor 109 is gradually reduced from the maximum value, the amplitude voltage V _C between the terminals of the capacitor 103 becomes equal to that of the diac 108.
Increase until it reaches the breakover voltage V _BO . When the breakover voltage V _BO is reached, at the same time the DIAC 108
Conducts to generate a trigger pulse for conducting the triac 105, and discharges a part of the electric charge of the capacitor 103. As a result, the amplitude voltage V between the terminals of the capacitor 103 is
_{Since C} decreases, a phase difference occurs in the conduction phase in the next half cycle. Therefore, once triggered,
Triggering continues even if the variable resistor 109 becomes larger than it was when first turned on, allowing phase control until a lower output voltage is reached.

Therefore, by adding the resistance element 107, the capacitor 104 and the variable resistance 110, the diac 10
The decrease in the amplitude voltage V _C between the terminals of the capacitor 103 caused by the conduction of 8 is charged through the variable resistor 110 by the both ends of the capacitor 104 during the next half cycle, so that the hysteresis is reduced. You can The resistance value of the variable resistor 110 to be added is adjusted so that φ _T becomes the minimum value φ _Tmin when the variable resistor 109 has the maximum value.

[0007]

However, the conventional phase control circuit described above has the following problems. That is, in the conventional phase control circuit, the triac
The conduction angle φ _{T of} 105 is determined by the time constant of the resistance element 106, the variable resistor 109 and the capacitor 103, and the terminal voltage of the capacitor 103 and the breakover voltage V _{BO of the} diac 108.
Is gaining by. At this time, when the variable resistor 109 is set to the minimum value, φ _T becomes the maximum value φ _Tmax , so that the resistance element
106 resistor value, variable resistor 108 maximum value, capacitor 103
Capacitance value of DIAC 108 and breakover voltage V _{BO of} DIAC 108
You have to choose.

In other words, the absolute accuracy of the maximum value φ _Tmax of φ _T requires the absolute values of the resistance value of the resistance element 106, the capacitance value of the capacitor 103 and the breakover voltage V _BO of the diac 108, and similarly, φ The absolute accuracy of the minimum value φ _Tmin of _T requires the absolute accuracy of the maximum value of the variable resistor 109, the resistance value of the resistance element 106, the capacitance value of the capacitor 103, and the breakover voltage V _BO of the diac 108. Further, even if φ _Tmax and φ _Tmin change due to temperature, the resistance value of the resistance element 106,
The capacitance value of the capacitor 103, the maximum value of the variable resistor 109, and the temperature change of the breakover voltage V _BO of the diac 108
It is directly related. Therefore, it is impossible to easily set a highly accurate phase control range.

Further, the problem depending on the frequency of the AC power source will be described with reference to FIGS. 8 (A) and 8 (B). In FIG. 8A, a waveform c shows a voltage and a phase waveform of an AC power source having a frequency of 50 Hz, and a waveform d shows a relationship between a terminal voltage of the capacitor 103 and a phase. Similarly, in FIG. 8B, a waveform e shows a voltage and a phase waveform of an AC power source having a frequency of 60 Hz, and a waveform f shows a relationship between a terminal voltage of the capacitor 103 and a phase.

The time Tφ _TC during which the triac 105 is turned off is the resistance element 106, the variable resistance 109 and the capacitor.
Since it is obtained by the voltage across the terminals of the capacitor 103 determined by the time constant of 103 and the breakover voltage V _BO of the diac 108, the time is the same regardless of the frequencies 50 Hz and 60 Hz of the AC power supply. Therefore, when the resistance value of the variable resistor 109 is fixed, the conduction angle φ _T1 when the frequency of the AC power source is 50 Hz is 10 ms−T φ _TC , and the conduction angle φ _T2 when the frequency of the AC power source is 60 Hz. It becomes 8.3 ms-Tφ _TC . In other words, if the frequency of the AC power supply is different, the variable resistance
Even if the resistance of 109 is the same, the RMS voltage applied to the load is different.

Therefore, every time the frequency of the AC power source fluctuates, it is necessary to manually adjust the variable resistor 110 according to the frequency of the AC power source, or a complicated adjusting circuit. Also, when the resistance value of the variable resistor 109 is the minimum value, the absolute value of the maximum phase angle is φ _Tmax , and when the resistance value of the variable resistor 109 is the maximum value, the absolute value of the minimum phase angle is φ _Tmin. It is very difficult to realize the absolute value of the phase angle only by adjusting the variable resistor 110 without depending on the fluctuation of the frequency of the AC power supply.

In addition, the resistance element 107, the capacitor 104,
By adding the variable resistor 110, the large hysteresis existing in the low output portion near the triac conduction start point can be reduced, but this hysteresis cannot be eliminated. Therefore, the accuracy of the absolute value φ _Tmin of the minimum phase angle is reduced. In addition, when changing the maximum value of the AC power supply, the resistance element 106, the variable resistance 109, and the capacitor 103
When the phase angle determined by the time constant of is the maximum phase angle φ _Tmax , the effective value applied to the load is different and the load may be destroyed.

The present invention has been made in order to solve the above problems in the conventional phase control circuit. The inventions of claims 1 and 2 set a maximum value φ _Tmax of the conduction angle of the switching element set arbitrarily. absolute and accuracy higher minimum phi _Tmin, possible to realize a phase control circuit capable of suppressing variation of the maximum value phi _Tmax, the minimum value phi _Tmin due to the temperature, the maximum value of the conduction angle of the switching element arbitrarily set Realize a phase control circuit in which φ _Tmax and minimum value φ _Tmin do not depend on the fluctuation of the frequency of the AC power supply, and realize a phase control circuit that eliminates the hysteresis existing in the low output part near the switching element conduction start point. effective for the purpose, further invention of claim 2, the level of the AC power source, the maximum value phi _Tmax of conduction angle, by switching the minimum phi _Tmin, for driving a load that There is an object to realize a phase control circuit which does not depend on the level of the AC power supply.

[0014]

The structure of the present invention for solving the above problems will be described with reference to the conceptual diagram shown in FIG. According to the first aspect of the present invention, the edge detection of the zero-cross waveform obtained from the AC power supply 1 by the zero-cross detection unit 3 including the edge detection unit 2 detects the saw-tooth wave generation unit 5 every half cycle of the AC power supply 1. A sawtooth wave to be integrated is generated, and the peak voltage of the sawtooth wave is detected by the peak voltage value detection circuit 6. When the ratio of the maximum phase angle of the phase angle range that drives the load 10 to the half-cycle phase angle 1πrad of the AC power supply 1 is ρ, and similarly, the ratio of the minimum phase angle is ν, the peak voltage value detection circuit The DC voltage for setting the maximum phase angle obtained by dividing the DC voltage by a resistance element so that the ratio to the DC voltage detected by 6 becomes equal to ρ, and the ratio to the DC voltage detected by the peak voltage value detection circuit 6. DC voltage generator 7 for maximum and minimum phase angle setting, which outputs a DC voltage for minimum phase angle setting, which is obtained by dividing this DC voltage by a resistance element so that is equal to ν, and a maximum and minimum phase angle setting DC voltage A variable voltage output means capable of arbitrarily outputting a variable voltage in the voltage range and a comparison means for comparing the variable voltage obtained by this means with the voltage level of the integrated waveform are provided. And a trigger pulse generator 8 for generating a trigger pulse for turning on the switching element 9 to form a phase control circuit.

According to the first aspect of the invention thus configured, the ratio of the maximum phase angle and the minimum phase angle of the phase angle range for driving the load to the phase angle of the half cycle of the AC power source 1 and the peak voltage. The DC voltage detected by the peak voltage value detection circuit 6 is divided by a resistance element so that the ratio of each divided DC voltage to the DC voltage detected by the value detection circuit 6 becomes equal, and the maximum phase angle setting The DC voltage of and the DC voltage for setting the minimum phase angle are output. Then, a variable voltage is arbitrarily selected within the range of the maximum and minimum phase angle setting DC voltage, and a trigger pulse is generated by comparing this variable voltage with the voltage level of the integrated waveform to turn on the switching element. Therefore, it is possible to suppress the fluctuations of the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle of the switching element set arbitrarily. Moreover, the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle of the switching element set arbitrarily do not depend on the fluctuation of the frequency of the AC power supply, and there is no hysteresis existing in the low output part near the conduction start point of the switching element. The phase control circuit can be realized.

According to the second aspect of the present invention, the half-cycle of the AC power supply 1 is generated in the sawtooth wave generation unit 5 by the edge detection of the zero-cross waveform obtained from the AC power supply 1 by the zero-cross detection unit 3 having the edge detection unit 2. A sawtooth wave that is integrated for each period is generated, and the peak voltage of the sawtooth wave is detected by the peak voltage value detection circuit 6. Then, the ratios of the maximum phase angles of a plurality of phase angle ranges that drive the load 10 to the half-cycle phase angle 1πrad of the AC power supply 1 are set to ρ ₁ , ρ ₂ ... ρ _n, and the ratio of the minimum phase angle is similarly set. When ν ₁ , ν ₂ ... ν _n , a plurality of DC voltages are set so that the ratio to the DC voltage detected by the peak voltage value detection circuit 6 becomes equal to ρ ₁ , ρ ₂ ... ρ _n . DC voltage Vρ ₁ , Vρ ₂ ... Vρ _n divided by a combination of resistive elements
And a DC voltage Vν ₁ obtained by dividing the DC voltage by a combination of a plurality of resistance elements so that the ratio to the DC voltage detected by the peak voltage value detection circuit 6 becomes equal to ν ₁ , ν ₂ ... ν _n. , Vν ₂ ... Vν _n , the maximum phase angle setting DC voltage and the minimum phase angle setting DC voltage corresponding to the maximum value of the AC power supply 1 detected by the AC power supply maximum value identifying unit 4 are selected. The maximum / minimum phase angle setting DC voltage generator 7 that outputs the variable voltage is arbitrarily selected within the range of the maximum and minimum phase angle setting DC voltage, and this variable voltage is compared with the voltage level of the integrated waveform. Means and the trigger pulse generator 8 for generating a trigger pulse for turning on the switching element 9 from the output of the comparison means, thereby constituting a phase control circuit.

According to the second aspect of the present invention thus configured, the same operation as that of the first aspect is obtained, and the maximum phase angle setting DC voltage and the minimum phase angle setting DC corresponding to the maximum value of the AC power supply are obtained. Select a voltage, select a variable voltage in the range of the maximum and minimum DC voltage for phase angle setting, and compare the variable voltage with the voltage level of the integrated waveform to generate a trigger pulse and switch. Since the period to turn on the element is determined, the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle are switched depending on the level of the AC power supply, and the effective value for driving the load does not depend on the level of the AC power supply. Can be realized.

[0018]

Next, an embodiment will be described. FIG. 2 is a circuit configuration diagram showing a first embodiment of the phase control circuit according to the present invention. In FIG. 2, 11 is a constant current source for integration connected to the positive power supply VDD, 12 is a capacitor for integration, 13 is a switch for generating an integrated waveform φ _f , and a zero-cross pulse φ is applied to the control terminal of the switch 13. _dis
When "H" is input and turned on, the charge of the integrating capacitor 12 is discharged via the switch 13. The switch 13 turns off when φ _dis is “L”, and at that moment, the constant current source 11 for integration and the capacitor for integration are
Integration is started by 12. 14 is a peak hold circuit (or sample hold circuit), which detects and holds the peak value of the integrated waveform φ _f , and the frequency of the AC power supply is 50
When the frequency is Hz, it is output as a DC voltage V _f50 , and when the frequency of the AC power supply is 60 Hz, it is output as a DC voltage V _f60 . DC voltage V _f50 and V _f60 is divided by resistance elements R1, R2, a voltage divider 15 consisting of R3 min, thereby obtaining a V.phi _Min50 and V.phi _MAX50, or V.phi _Min60 and _Vφ max60.

Then, Vφ _min50 and Vφ _max50 , or V
φ _min60 and Vφ _max60 are buffer circuits 16 and 17, respectively.
Via the fixed resistor terminals VOL1 and VO of the variable resistor 18
Input to L2. Variable resistance terminal VOL of variable resistor 18
To 3, V.phi _MAX50 from V.phi _Min50, or DC voltage V _VOL3 sweeping from V.phi _Min60 a range of DC voltage V.phi _Max60 is output, and is input to the inverting input terminal of the comparator 19. The integrated waveform φ _f is input to the non-inverting input terminal of the comparator 19, and the comparison result of the DC voltage V _VOL3 and the integrated waveform φ _f is output from the comparator 19. The comparison result output from the comparator 19 is input to a trigger pulse generator (not shown) to generate a trigger pulse for turning on the switching element in the phase period according to the comparison result.

Next, the operation of the phase control circuit thus configured will be described. First, the AC power supply frequency is 50H
The case of z will be described. The AC power supply frequency is 50 in Fig. 3.
The output waveform of the circuit operation at Hz is shown. AC power supply voltage V _IN
The half cycle of is 10 ms, which is 1πrad. This power supply voltage V _IN
The zero-cross pulse φ _z can be obtained by detecting the zero-cross in synchronism with. And the zero-cross pulse φ _z
Edge of the switch 13 to generate a control pulse φ _dis for the switch 13. However, the pulse width t of this control pulse φ _dis
φ _dis is tφ _dis << 10 ms.

The integrated waveform φ _f is such that when the control pulse φ _dis is “L”, the switch 13 is turned off and the constant current source 11
Is formed by being integrated by the integrating capacitor 12, and a DC voltage V _f50 represented by the following equation (1) is generated. V _f50 = 10 ms × i / c (1) where i is the current of the constant current source 11 and c is the integrating capacitor.
12 capacity values. Next, control pulse φ _dis = “H”
At the time of, since the switch 13 is turned on and the charge of the integrating capacitor 12 is discharged through the switch 13,
The DC voltage becomes 0 V from the potential of V _f50 .

The peak hold circuit (or sample hold circuit) 14 detects the peak value of the integrated waveform φ _f and outputs the held DC voltage V _f50 , and this DC voltage V _f50 is composed of resistance elements R1, R2 and R3. By dividing the voltage with the voltage divider 15, Vφ _min50 and Vφ _max50 can be obtained. Vφ _min50 and Vφ _max50 are expressed by the following equations (2) and (3), respectively. Vφ _min50 = (R ₂ + R ₃ ) × V _f50 / (R ₁ + R ₂ + R ₃ ) = (R ₂ + R ₃ ) × 10 ms × i / {c × (R ₁ + R ₂ + R ₃ )} _{·· (2) Vφ max50 = R} 3 × V f50 / (R 1 + R 2 + R 3) = R 3 × 10ms × i / {c × (R 1 + R 2 + R 3)} ·· (3) where, R ₁ , R ₂ and R ₃ are resistance elements R ₁ , R ₂ and R ₃
Shows the resistance value of.

Since the half cycle when the frequency of the AC power supply voltage V _IN is 50 Hz is 10 ms = 1πrad, the above equations (2) and (3) are expressed as the following equations (4) and (5). Vφ _min50 = (R ₂ + R ₃ ) / (R ₁ + R ₂ + R ₃ ) πrad × i / c (4) Vφ _max50 = R ₃ / (R ₁ + R ₂ + R ₃ ) πrad × i / C (5) Further, α1, β1, γ in the integrated waveform φ _f in FIG.
1 and δ1 have a relationship represented by the following equations (6) and (7). α1: β1 = (R ₁ + R ₂ ): R ₃・ ・ ・ ・ ・ ・ ・ ・ (6) γ1: δ1 = R ₁ : (R ₂ + R ₃ ) ・ ・ ・ ・ ・ ・(7)

Next, Vφ _min50 and Vφ _max50 are input to the fixed resistance terminals VOL1 and _VOL2 of the variable resistor 18 via the buffer circuits 16 and 17, respectively. Variable resistor 18
To the variable resistance terminal VOL3 of Vφ _min50 to Vφ
_The DC voltage V _VOL3 that sweeps in the range of _max50 is output and input to the inverting input terminal of the comparator 19. The integrated waveform φ _f is input to the non-inverting input terminal of the comparator 19, and the comparison result of the DC voltage V _VOL3 and the integrated waveform φ _f is output from the comparator 19. The comparison result output from the comparator 19 is input to the trigger pulse generator,
A trigger pulse T _TRG for turning on the switching element is generated within a phase angle range of φ _min50 of the pulse φ _G1 (VOL3-VOL1) to φ _max50 of the pulse φ _G2 (VOL3- _VOL2 ).

The minimum phase angle φ _min50 for turning on the switching element is given by the following equation (8) from the above equations (1), (4) and (5), and is obtained by the equation (9). _{(1πrad -φ min50) × i /} c = (R 2 + R 3) / (R 1 + R 2 + R 3) πrad × i / c ·· (8) φ min50 = R 1 / (R 1 + R 2 + R 3) _{πrad ····} (9) Similarly, the maximum phase angle φ _max50 to be turned on is given by the following equation (10) from the equations (1), (4) and (5),
It is calculated by the equation (11). _{(1πrad -φ max50) × i /} c = R 3 / (R 1 + R 2 + R 3) πrad × i / c ······ (10) φ max50 = R 2 + R 3 / (R 1 + R 2 + R ₃ ) π rad (11) That is, the minimum phase angle φ _min50 and the maximum phase angle φ _{max50 for turning} on the switching element are the resistance element of the voltage divider 15 according to the conduction angle of the switching element desired by the user. It can be obtained by selecting the resistance values R ₁ , R ₂ and R ₃ of R ₁ , R ₂ and R ₃ .

Next, the case where the frequency of the AC power supply is 60 Hz will be described. Fig. 4 shows the output waveform of the circuit operation when the AC power supply frequency is 60 Hz. Half cycle of AC power supply voltage V _IN
It is 1πrad in 8.3ms. The zero-cross pulse φ _z can be obtained by detecting the zero-cross in synchronization with the power supply voltage V _IN . Then, the edge of the zero-cross pulse φ _z is detected, and the control pulse φ _dis of the switch 13 is generated. However, the pulse width tφ of this control pulse φ _{dis
The dis} is tφ _dis << 8.3 ms.

The integrated waveform φ _f is such that when the control pulse φ _dis is “L”, the switch 13 is turned off and the constant current source 11
Is formed by being integrated by the integrating capacitor 12, and a DC voltage V _f60 represented by the following equation (12) is generated. V _f60 = 8.3 ms × i / c (12) Next, when the control pulse φ _dis = “H”, the switch 13 is turned on and the charge of the integrating capacitor 12 is passed through the switch 13. Then, the DC voltage becomes 0 V from the potential of V _f60 .

The peak hold circuit (or sample hold circuit) 14 detects the peak value of the integrated waveform φ _f and outputs the _held DC voltage V _f60 , and this DC voltage V _f60 is _composed of resistance elements R1, R2 and R3. By dividing the voltage by the voltage divider 15, Vφ _min60 and Vφ _max60 can be obtained. Vφ _min60 and Vφ _max60 are expressed by the following equations (13) and (14), respectively. Vφ _min60 = (R ₂ + R ₃ ) × V _f60 / (R ₁ + R ₂ + R ₃ ) = (R ₂ + R ₃ ) × 8.3 ms × i / {c × (R ₁ + R ₂ + R ₃ )} ... _{··· (13) Vφ max60 = R} 3 × V f60 / (R 1 + R 2 + R 3) = R 3 × 8.3 ms × i / {c × (R 1 + R 2 + R 3)} ······ ·(14)

When the frequency of the AC power supply voltage V _IN is 60 Hz, the half cycle is 8.3 ms = 1πrad, so that the above (13), (14)
The equations are expressed as the following equations (15) and (16). Vφ _min60 = (R ₂ + R ₃ ) / (R ₁ + R ₂ + R ₃ ) πrad × i / c (15) Vφ _max60 = R ₃ / (R ₁ + R ₂ + R ₃ ) πrad × i / C (16) Further, α2, β2, γ in the integrated waveform φ _f in FIG.
2 and δ2 have a relationship represented by the following equations (17) and (18). α2: β2 = (R ₁ + R ₂ ): R ₃ = α1: β1 (17) γ2: δ2 = R ₁ : (R ₂ + R ₃ ) = γ1: δ1・ (18)

Next, Vφ _min60 and Vφ _max60 are input to the fixed resistance terminals VOL1 and _VOL2 of the variable resistor 18 via the buffer circuits 16 and 17, respectively. Variable resistor 18
To the variable resistance terminal VOL3 of Vφ _min60 to Vφ
_The DC voltage V _VOL3 that sweeps in the range of _max60 is output and input to the inverting input terminal of the comparator 19. The integrated waveform φ _f is input to the non-inverting input terminal of the comparator 19, and the comparison result of the DC voltage V _VOL3 and the integrated waveform φ _f is output from the comparator 19. The comparison result output from the comparator 19 is input to the trigger pulse generator,
A trigger pulse T _TRG for turning on the switching element is _{generated in} a phase angle range of φ _min60 of the pulse φ _G1 (VOL3-VOL1) to φ _max60 of the pulse φ _G2 (VOL3- _VOL2 ).

The minimum phase angle φ _min60 for turning on the switching element is given by the following equation (19) from equations (12), (15) and (16), and is obtained by equation (20). (1π rad −φ _min60 ) × i / c = (R ₂ + R ₃ ) / (R ₁ + R ₂ + R ₃ ) π rad × i / c _··· (19) φ _min60 = R ₁ / (R ₁ + R ₂ + R ₃ ). πrad ・ ・ ・ ・ ・ ・ (20) Similarly, the maximum phase angle φ _max60 to turn on is given by the following equation (21) from the above equations (12), (15) and (16),
It is calculated by the equation (22). _{(1πrad -φ max60) × i /} c = R 3 / (R 1 + R 2 + R 3) πrad × i / c ······ (21) φ max60 = R 2 + R 3 / (R 1 + R 2 + R ₃ ) πrad (22) That is, the minimum phase angle φ _min60 and the maximum phase angle φ _{max60 for turning} on the switching element are the resistance element of the voltage divider 15 according to the conduction angle of the switching element desired by the user. It can be obtained by selecting the resistance values R ₁ , R ₂ and R ₃ of R ₁ , R ₂ and R ₃ .

Therefore, the above (9), (11), (2
From the equations (0) and (22), the user finds that the frequency of the AC power supply is 50 Hz.
The minimum phase angle φ _min50 and the maximum phase angle φ that turn on the switching element regardless of the case of 60Hz and 60Hz.
_max50 or minimum phase angle φ _min60 and maximum phase angle φ
_The same minimum phase angle and maximum phase angle can be set so that _max60 is φ _min50 = φ _min60 and φ _max50 = φ _max60 .

Further, the above (9), (11), (20), (2
From the equation (2), the minimum phase angle and the maximum phase angle for turning on the switching element can be determined by setting the resistance elements R1, R2 and R3 forming the voltage divider 15 to the same type and high specific accuracy. It is possible to realize a phase control circuit that has a high absolute accuracy of the minimum phase angle and the maximum phase angle and that can suppress the variation of the minimum phase angle and the maximum phase angle due to temperature.

Furthermore, even if the switching element is turned on and off, it does not affect all the potentials of the control system related to the phase control. Therefore, it is possible to realize a phase control circuit having no hysteresis in the low output portion near the switching element conduction start point.

Next, a second embodiment will be described. FIG. 5 is a circuit configuration diagram showing a second embodiment,
The same or corresponding members as those of the first embodiment shown in FIG. 2 are designated by the same reference numerals. In FIG. 5, 11
Is a constant current source for integration connected to the positive power supply VDD, 12 is a capacitor for integration, 13 is a switch for generating an integrated waveform φ _f , and a zero-cross pulse φ _dis = “H” is applied to the control terminal of the switch 13. Is inputted and turned on, the charge of the integrating capacitor 12 is discharged via the switch 13. The switch 13 is turned off when φ _dis is “L”, and at that moment, the integration constant current source 11 and the integration capacitor 12 start integration. A peak hold circuit (or sample hold circuit) 14 detects and holds the peak value of the integrated waveform φ _f , and when the frequency of the AC power supply is 50 Hz, the DC voltage V _f50 is obtained, and the frequency of the AC power supply is 60 Hz. At this time, it is output as a DC voltage V _f60 .

The AC power source VIN is a peak hold circuit.
Input to 21. For example, when the AC power supply is 100 V, V
When the AC power supply is ₁₀₀ or 150 V, V ₁₅₀ is output as a peak voltage value when the AC power supply is 200 V, and V ₂₀₀ is output as a peak voltage value when the AC power supply is ₂₀₀ V. DC voltage V1 is applied to the inverting input terminal of the comparator 22.
, A DC voltage is set to V1 such that V ₁₀₀ <V ₁ <V ₁₅₀ , a DC voltage V2 is connected to the inverting input terminal of the comparator circuit 23, and V ₁₅₀ <V _{150 to} V2.
_The DC voltage is set so that ₂ <V ₂₀₀ . The outputs φ _C1 and φ _C2 of the comparators 22 and 23 are input to the decoder circuit 24 and output as 3-bit data φ _S1 , φ _S2 , φ _S3 .

On the other hand, the DC voltage V _f50 or V _f60 from the peak hold circuit 14 is connected in parallel to the resistance element R1 via the resistance elements R1, R2, R3 and the switch S2a connected via the switches S1a and S1b. Via the connected resistance element R4, the resistance element R5 connected in parallel to the resistance element R3 via the switch S2b, the resistance element R6 connected in parallel to the resistance elements R1 and R3 via the switch S3a, and the switch S3b. Connected resistance elements R3 and R5
The voltage is applied to a voltage divider 25 composed of a resistance element R7 connected in parallel with.

Then, depending on the output result of the decoder circuit 24, the switch S1a, S1b or the switch S2
a, S2b or switches S3a, S3b are turned on. When the switches S1a and S1b are turned on, Vφ _min50 and V _{max50 change} the DC voltage V _f50 to Vφ.
_min60 and Vφ _max60 are obtained by _dividing the DC voltage V _f60 by the resistance elements R1, R2 and R3, respectively. Similarly, when the switches S2a and S2b are turned on, Vφ _min50 and V _{max50 change} the DC voltage V _f50 to Vφ.
_min60 and Vφ _max60 are obtained by _dividing the DC voltage V _f60 by the resistance elements R4, R2 and R5, respectively.
When the switches S3a and S3b are turned on, Vφ
_min50 and V _max50 are DC voltage V _f50 , Vφ _min60 and V
φ _max60 is the DC voltage V _f60 which is applied to the resistance elements R6 and R, respectively.
2, it is obtained by dividing the pressure by R7.

In this way, Vφ selectively obtained
_min50 and V _max50 or Vφ _min60 and Vφ _max60 are input to the fixed resistance terminals VOL1 and _VOL2 of the variable resistor 18 via the buffer circuits 16 and 17, respectively. Variable resistor
18 variable resistance terminals VOL3 are _connected to Vφ _min50 to Vφ
_MAX50, or DC voltage V _VOL3 sweeping from V.phi _Min60 a range of DC voltage V.phi _Max60 is output, and is input to the inverting input terminal of the comparator 19.
The integral waveform φ _f is input to the non-inverting input terminal of the comparator 19, and the comparison result of the DC voltage V _VOL3 and the integral waveform φ _f is
It is output from the comparator 19. The comparison result output from the comparator 19 is input to a trigger pulse generator (not shown) to generate a trigger pulse for turning on the switching element in the phase period according to the comparison result.

Next, the operation of the second embodiment configured as described above will be described when the AC power supply frequency is 50 Hz. Figure 6 shows the output waveform of the circuit operation when the AC power supply frequency is 50 Hz. The AC power supply voltage V _IN is input to the peak hold circuit 21, for example, V ₁₀₀ when the AC power supply is ₁₀₀ V, V ₁₅₀ when the AC power supply is ₁₅₀ V, and V ₂₀₀ when the AC power supply is ₂₀₀ V. It is output as a voltage value and input to the non-inverting input terminals of the comparators 22 and 23, respectively. A DC voltage V1 is connected to the inverting input terminal of the comparator 22, a DC voltage satisfying V ₁₀₀ <V ₁ <V ₁₅₀ is set to V1, and a DC voltage V2 is connected to the inverting input terminal of the comparator circuit 23. And V2 has V ₁₅₀ <V
Set the DC voltage such that ₂ <V ₂₀₀ .

At this time, V ₁₀₀ is the comparator 22 and
When input to the non-inverting input terminal of 23, the comparator 22
The outputs φ _C1 and φ _C2 of 23 and 23 both become “L”. The outputs φ _C1 and φ _C2 of the comparators 22 and 23 are input to the decoder circuit 24 and 3-bit data φ _S1 = “H”, φ _S2
= “L” and φ _S3 = “L” are output. This decoder circuit
According to the output result of 24, the switches S1a and S1b are turned on, and the switches S2a and S2b and S3a and S3b are turned on.
Turn off. When the switches S1a and S1b are turned on, Vφ _min50 and Vφ _{max50 become} the DC voltage V
It can be obtained by _{dividing f50} by the resistance elements R1, R2 and R3.

Similarly, at V ₁₅₀ , the comparator outputs φ _C1 and φ _C2 become “H” and “L”, respectively, and φ
_S1 = "L", φ _S2 = "H", φ _S3 = "L" are output,
As a result, the switches S2a and S2b are turned on, and the switches S1a and S1b and S3a and S3b are turned off. When the switches S2a and S2b are turned on, Vφ _min50 and Vφ _max50 can be obtained by _dividing the DC voltage V _f50 by the resistance elements R4, R2 and R5. Similarly, when V ₂₀₀ , φ _C1 and φ _C2
Become "H", and φ _S1 = "L", φ _S2 = "L", φ
_S3 = "H" is output, and switch S3 is output according to this result.
a and S3b turn on and switches S1a and S1b and S2a and S2b turn off. Switch S3a
And S3b are turned on, Vφ _min50 and Vφ
_max50 can be obtained by _dividing the DC voltage V _f50 by the resistance elements R6, R2 and R7.

Vφ selectively obtained in this way
_min50 and V.phi _MAX50 when the AC power supply of 200 V, respectively as V.phi _Min50a and V.phi _Max50a, buffer circuits 16 and 17
Via the fixed resistor terminals VOL1 and VO of the variable resistor 18
Input to L2. Variable resistance terminal VOL of variable resistor 18
A DC voltage V _VOL3a that sweeps in the DC voltage range of Vφ _min50a to Vφ _max50a is output to 3, and is input to the inverting input terminal of the comparator 19. This comparator 19
The integral waveform φ _f is input to the non-inverting input terminal of the comparator 19 and the comparison result of the DC voltage V _VOL3a and the integral waveform φ _f is obtained.
This comparison result is input to the trigger generator, and during the phase period from φ _G1a to φ _G2a according to the comparison result,
A trigger pulse is generated to turn on the switching element.

Here, (9) shown in the first embodiment is shown.
The following equations (23) and (24) are obtained from the equations and the equation (11). φ _min50a = R ₆ / (R ₆ + R ₂ + R ₇ ) _{πrad ···} (23) φ _max50a = R ₂ + R ₇ / (R ₆ + R ₂ + R ₇ ) _{πrad ···} (24) ) Further, α1, β1, γ1, δ1 in the integrated waveform φ _f have a relationship shown in the following equations (25) and (26). α1: β1 = (R ₆ + R ₂ ): R ₇・ ・ ・ ・ ・ ・ ・ ・ (25) γ1: δ 1 = R ₆ : (R ₂ + R ₇ ) ・ ・ ・ ・ ・ ・(26) R ₆ and R ₇ are resistance values of the resistance elements R ₆ and R ₇ .

Similarly, when an AC power source of 150 V is used, a trigger pulse for turning on the switching element is generated during the phase period of φ _G1b to φ _G2b . In this case, the following equations (27) and (28) are obtained from the above equations (23) and (24). φ _min50b = R ₄ / (R ₄ + R ₂ + R ₅ ) _{πrad ···} (27) φ _max50b = R ₂ + R ₅ / (R ₄ + R ₂ + R ₅ ) _{πrad ···} (28) ) Further, α2, β2, γ2, δ2 in the integrated waveform φ _f have the relationship shown in the following equations (29) and (30). α2: β2 = (R ₄ + R ₂ ): R ₅・ ・ ・ ・ ・ ・ ・ ・ (29) γ2: δ2 = R ₄ : (R ₂ + R ₅ ) ・ ・ ・ ・ ・(30) R ₄ and R ₅ are resistance values of the resistance elements R ₄ and R ₅ .

Similarly, when an AC power supply of 100 V is used, a trigger pulse for turning on the switching element is generated during the phase period of φ _G1c to φ _G2c . In this case, the following equations (31) and (32) are obtained from the above equations (23) and (24). φ _min50c = R ₁ / (R ₁ + R ₂ + R ₃ ) _{πrad ···} (31) φ _max50c = R ₂ + R ₃ / (R ₁ + R ₂ + R ₃ ) _{πrad ···} (32 ) Further, α3, β3, γ3, δ3 in the integrated waveform φ _f have the relationship shown in the following equations (33) and (34). α3: β3 = (R ₁ + R ₂ ): R ₃・ ・ ・ ・ ・ ・ ・ ・ (33) γ3: δ3 = R ₁ : (R ₂ + R ₃ ) ・ ・ ・ ・ ・(34)

That is, the effective value of the load drive does not depend on the level of the AC power source, and the minimum value φ _Tmin and the maximum value φ of the conduction angle are obtained.
_The resistance elements R1 to R7 are switched by the switches S1a, S1b, S2a, S2b, S3a and S3b so that _Tmax can be set. As a result, it is possible to realize the phase control circuit in which the effective values applied to the loads are the same.

Further, it is possible to set the minimum phase angle and the maximum phase angle for turning on the switching element without depending on the frequency of the AC power source, the high absolute accuracy of the minimum phase angle and the maximum phase angle for turning on the switching element, and the temperature. It goes without saying that the same effects as those of the first embodiment can be obtained in that the fluctuations of the minimum phase angle and the maximum phase angle can be suppressed and that the hysteresis in the low output portion near the switching element conduction start point can be eliminated. Yes. Even if the peak hold circuit 21 is replaced with an effective value detection circuit, the same effect can be obtained.

[0049]

As described above based on the embodiments, according to the present invention, the high absolute accuracy of the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle of a switching element such as a triac set arbitrarily can be obtained. Realized, maximum value φ depending on temperature
Variations in _Tmax and minimum value φ _Tmin can also be suppressed. Further, the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle of the switching element set arbitrarily can be made independent of the fluctuation of the frequency of the AC power supply. Furthermore, while eliminating the hysteresis existing in the low output part near the switching element conduction start point, depending on the level of the AC power supply,
To realize a phase control circuit that can be controlled so that the effective value applied to the load is the same regardless of the level of the AC power supply by configuring the maximum value φ _Tmax and the minimum value φ _Tmin of the conduction angle to be switched. You can

[Brief description of the drawings]

FIG. 1 is a conceptual diagram for explaining a phase control circuit according to the present invention.

FIG. 2 is a circuit configuration diagram showing a first embodiment of the present invention.

FIG. 3 shows the power supply frequency of the first embodiment shown in FIG.
It is a waveform diagram for explaining the operation at 50 Hz.

FIG. 4 shows the power supply frequency of the first embodiment shown in FIG.
It is a waveform diagram for explaining the operation at 60 Hz.

FIG. 5 is a circuit configuration diagram showing a second embodiment of the present invention.

FIG. 6 is a waveform diagram for explaining the operation of the second exemplary embodiment shown in FIG.

FIG. 7 is a circuit configuration diagram showing a configuration example of a conventional phase control circuit and an operation explanatory diagram thereof.

FIG. 8 is an explanatory diagram showing a problem of the conventional example shown in FIG.

[Explanation of symbols]

 1 AC power supply 2 Edge detection unit 3 Zero-cross detection unit 4 AC power supply maximum value identification unit 5 Sawtooth wave generation unit 6 Peak voltage value detection circuit 7 Maximum / minimum phase angle setting voltage generation unit 8 Trigger pulse generation unit 9 Switching element 10 Load 11 Constant current source 12 Capacitor for integration 13 Switch 14 Peak hold circuit 15 Voltage divider 16, 17 Buffer circuit 18 Variable resistor 19 Comparator 21 Peak hold circuit 22, 23 Comparator 24 Decoder circuit 25 Voltage divider

Claims (2)

[Claims] 1. A phase control circuit for driving a load using an AC power source whose phase is controlled by a switching element, and an integral waveform generating section for generating an integral waveform synchronized with the AC power source, and a peak voltage of the integrated waveform. A direct current voltage detector for detecting a value as a first direct current voltage, and a ratio of a maximum phase angle of a phase angle range for driving the load to a half cycle phase angle 1πrad of the alternating current power source is a first ratio. When the ratio of the minimum phase angle of the phase angle range for driving the load to the phase angle 1πrad of the half cycle of the power supply is the second ratio, the ratio to the first DC voltage is the first ratio.
And a second direct current voltage obtained by dividing the first direct current voltage by the elements of the first plurality of resistance components so as to be equal to the second ratio, and the ratio to the first direct current voltage is equal to the second ratio. And a third DC voltage obtained by dividing the first DC voltage by the elements of the second plurality of resistance components so that
DC voltage generators for setting the maximum phase angle and the minimum phase angle, which are respectively output, variable voltage output means capable of arbitrarily outputting a variable voltage in the voltage range of the second DC voltage and the third DC voltage, and the variable voltage. Comprising a comparing means for comparing the variable voltage obtained by the output means with the voltage level of the integrated waveform, and a trigger pulse generating section for generating a trigger pulse for turning on the switching element from the output of the comparing means. Phase control circuit characterized by. 2. A phase control circuit for driving a load by using an AC power source whose phase is controlled by a switching element, and an integral waveform generating section for generating an integral waveform synchronized with the AC power source, and a peak voltage of the integrated waveform. A DC voltage detection unit that detects a value as the first DC voltage, and ratios of maximum phase angles of a plurality of phase angle ranges that drive the load to a half-cycle phase angle 1πrad of the AC power supply are ρ ₁ , ρ _2.・
When ρ _n and the ratio of the minimum phase angle of the plurality of phase angle ranges driving the load to the half-cycle phase angle of 1 π rad of the AC power source is ν ₁ , ν ₂ ... ν _n ,
Of the first DC voltage is divided by a combination of the elements of the first plurality of resistance components so that the ratio of the DC voltage to the DC voltage is equal to ρ ₁ , ρ ₂ ... ρ _n.
The ratio of the maximum phase angle setting DC voltage corresponding to the maximum value of the AC power source among the (n + 1) th DC voltage to the first DC voltage is equal to ν ₁ , ν ₂ ... ν _n The AC power supply is selected from the (n + 2) th, (n + 3) ... (2n + 1) th DC voltages obtained by dividing the first DC voltage by a combination of a plurality of second resistance component elements. A DC voltage generator for maximum phase angle and minimum phase angle setting, which selects and outputs the minimum phase angle setting DC voltage corresponding to the maximum value of the AC power supply, and the second and second DC voltage generators. 3 ... DC voltage selected from the (n + 1) th DC voltage and the (n + 2) th and (n + 3) th DC voltages
... Variable voltage output means capable of arbitrarily outputting a variable voltage in two voltage ranges of the DC voltage selected from the (2n + 1) th DC voltage, the variable voltage obtained by the variable voltage output means, and the integration A phase control circuit comprising: a comparing means for comparing a voltage level of a waveform and a trigger pulse generating section for generating a trigger pulse for turning on the switching element from an output of the comparing means.