JPH09178781A - Device for measuring voltage application current - Google Patents
Device for measuring voltage application currentInfo
- Publication number
- JPH09178781A JPH09178781A JP7350963A JP35096395A JPH09178781A JP H09178781 A JPH09178781 A JP H09178781A JP 7350963 A JP7350963 A JP 7350963A JP 35096395 A JP35096395 A JP 35096395A JP H09178781 A JPH09178781 A JP H09178781A
- Authority
- JP
- Japan
- Prior art keywords
- current
- voltage
- peak
- bypass circuit
- current measuring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Testing Of Individual Semiconductor Devices (AREA)
- Measurement Of Current Or Voltage (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、ICテストシステ
ムの技術分野等で利用できる電圧印加電流測定装置に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage applied current measuring device that can be used in the technical field of IC test systems.
【0002】[0002]
【従来の技術】被試験用半導体の試験には被試験用半導
体が所定の動作を行うか否かをテストする機能試験と、
被試験用半導体の直流特性が規定の特性に出来あがって
いるかをテストする直流試験とがある。被試験用半導体
の機能試験を行う場合には被試験用半導体の電源用端子
に所定の電源電圧を印加して動作中に流れる電流を測定
する。直流特性試験では被試験用半導体の入出力端子に
所定の電圧を印加してそのとき流れる電流を測定する。
例えば取り扱う電流が数nAから数mAの直流試験と5
00mAから800mAが流れる機能試験がある。 (参考資料 実公平6ー11510 考案の名称 電圧
印加電流測定装置)2. Description of the Related Art A test for a semiconductor under test includes a functional test for testing whether the semiconductor under test performs a predetermined operation,
There is a DC test that tests whether the semiconductor under test has the specified DC characteristics. When performing a functional test of the semiconductor under test, a predetermined power supply voltage is applied to the power supply terminal of the semiconductor under test and the current flowing during operation is measured. In the DC characteristic test, a predetermined voltage is applied to the input / output terminals of the semiconductor under test and the current flowing at that time is measured.
For example, a DC test with a current of several nA to several mA and 5
There is a functional test that flows from 00 mA to 800 mA. (Reference material: Jikken 6-11510 Device name: Voltage applied current measuring device)
【0003】図5(A)に従来技術による電圧印加電流
測定装置を、(B)にピーク電流側路回路手段における
ダイオード電流特性を示す。被試験用半導体(以下DU
Tと称する)に所定の電圧を供給する出力電圧制御回路
10は演算増幅器11と電圧設定器12とによって構成
される。出力電圧制御回路10の出力電圧は電流検出手
段110を通じて電流測定用電流検出回路71の抵抗器
と並列に抵抗器とスイッチからなる複数の直列回路によ
るレンジ切替手段72とによって構成された電流測定用
電流検出手段70と、ダイオードを逆並列接続即ち複数
のダイオードを順方向接続にした直列のダイオードをピ
ーク電流側路回路81として、複数のダイオードを順方
向接続にした直列のダイオードをピーク電流側路回路8
2に対して逆並列接続させたピーク電流側路回路手段8
0より構成され、ピーク電流側路回路手段80により電
流測定用電流検出回路71の抵抗器に関係なくDUTの
ピーク電流をバイパスできる構成である。FIG. 5A shows a voltage applied current measuring device according to the prior art, and FIG. 5B shows a diode current characteristic in the peak current bypass circuit means. Semiconductor under test (hereinafter DU
The output voltage control circuit 10 for supplying a predetermined voltage to (T) is composed of an operational amplifier 11 and a voltage setter 12. The output voltage of the output voltage control circuit 10 is used for current measurement by the current detection means 110 and the range switching means 72 formed by a plurality of series circuits including resistors and switches in parallel with the resistors of the current measurement current detection circuit 71. The current detecting means 70 and a series diode in which diodes are connected in anti-parallel, that is, a plurality of diodes in a forward connection are used as a peak current bypass circuit 81, and a series diode in which a plurality of diodes are connected in a forward direction is used as a peak current bypass circuit. Circuit 8
2, the peak current bypass circuit means 8 connected in anti-parallel to 2
0, and the peak current bypass circuit means 80 can bypass the peak current of the DUT regardless of the resistor of the current measuring current detection circuit 71.
【0004】ピーク電流側路回路手段80からバイパス
されたピーク電流は電流制限用電流検出抵抗40によっ
て電流を電圧に変換して、その電圧は電流制限用差動増
幅器50により取り出され電流制限用制御回路60に入
力され、電流制限用制御回路60ではピーク電流が制限
電流の設定値を超えたとき、出力電圧制御回路10に電
流制限制御電流I1 を出力して試験電圧Vo が制御され
る。電圧帰還回路20によってDUTの端子の電圧を高
入力インピーダンスの増幅器21によって取出し、その
出力電圧を出力電圧制御回路10を構成する演算増幅器
11の入力端子に帰還させる。この電圧帰還回路20の
存在によって演算増幅器11は電圧設定器12から与え
られる電圧と電圧還回路20から帰還される電圧とが等
しくなるように作動し、これによってDUTの端子に電
圧設定器12から与えた電圧値に等しい電圧を与えるよ
うに作動する。The peak current bypassed from the peak current bypass circuit means 80 is converted into a voltage by the current limiting current detecting resistor 40, and the voltage is taken out by the current limiting differential amplifier 50 and controlled for current limiting. When the peak current exceeds the set value of the limiting current, the current limiting control circuit 60 outputs the current limiting control current I1 to the output voltage control circuit 10 to control the test voltage Vo. The voltage at the terminal of the DUT is taken out by the voltage feedback circuit 20 by the amplifier 21 having a high input impedance, and the output voltage is fed back to the input terminal of the operational amplifier 11 constituting the output voltage control circuit 10. Due to the presence of the voltage feedback circuit 20, the operational amplifier 11 operates so that the voltage given from the voltage setting circuit 12 and the voltage fed back from the voltage returning circuit 20 become equal, whereby the voltage setting circuit 12 is fed to the terminal of the DUT. It operates to give a voltage equal to the given voltage value.
【0005】電流測定用電流検出手段70の抵抗器の抵
抗値は電流制限用電流検出抵抗40の抵抗器の抵抗値の
1,000 倍から10,000倍である。例えば電流制限用電流検
出抵抗40が数Ωで電流測定用電流検出回路71とレン
ジ切替手段72の抵抗値は数10Ωから数100KΩで
ある。DUTの直流特性が規定の特性に出来あがってい
るかをテストする直流試験の電流は例えば数nAから数
mAが流れる。電流測定用電流検出回路71とレンジ切
替手段72によって、電流から電圧へ変換された電圧V
M1 は電流測定用差動増幅器90により取り出されAD
変換器100によってデジタル信号に変換して電流測定
値として扱われる構成である。The resistance value of the resistor of the current measuring current detecting means 70 is equal to the resistance value of the resistor of the current limiting current detecting resistor 40.
1,000 times to 10,000 times. For example, the current limiting current detection resistor 40 is several Ω, and the resistance values of the current measuring current detection circuit 71 and the range switching means 72 are several tens Ω to several hundreds KΩ. For example, a current of a direct current test for testing whether the direct current characteristic of the DUT has been completed to a specified characteristic is several nA to several mA. The voltage V converted from current to voltage by the current measuring current detection circuit 71 and the range switching means 72
M1 is taken out by the differential amplifier 90 for current measurement and AD
This is a configuration in which the converter 100 converts it into a digital signal and treats it as a current measurement value.
【0006】DUTの機能試験を行う場合にはDUTの
電源用端子に所定の電源電圧を印加して動作中に流れる
電流は例えば500mAから800mAが流れる。DT
Uに流れた動作電流はピーク電流側路回路手段80を通
って電流制限用電流検出抵抗40に流れ込み電流制限用
電流検出抵抗40によって、電流から電圧へ変換された
電圧VM2 は電流制限用差動増幅器50により取り出さ
れ電流制限用制御回路60によって出力電圧制御回路1
0の出力電圧Voを強制的に制御しDUTに流れる電流
を制限する。それは電流制限用制御回路60では過度電
流が制限電流の設定値を超えたとき出力電圧制御回路1
0に電流制限用電流I1 を出力して出力電圧Voが制御
される。When performing a functional test of the DUT, a current of 500 mA to 800 mA, for example, flows during operation by applying a predetermined power supply voltage to the power supply terminal of the DUT. DT
The operating current flowing in U flows into the current limiting current detecting resistor 40 through the peak current bypass circuit means 80, and is converted into a voltage by the current limiting current detecting resistor 40. The output voltage control circuit 1 is extracted by the amplifier 50 and is output by the current limiting control circuit 60.
The output voltage Vo of 0 is forcibly controlled to limit the current flowing through the DUT. In the current limiting control circuit 60, when the transient current exceeds the set value of the limiting current, the output voltage control circuit 1
The current I1 for current limiting is output to 0 to control the output voltage Vo.
【0007】直流試験の電流は例えば数nAから数mA
が流れるテストにおいて、この電流がピーク電流側路回
路手段80に流れることは測定精度の上から許されな
い。図5(B)はピーク電流側路回路手段におけるダイ
オード電流特性を示す。図のY軸にピーク電流側路電流
を、X軸にVM1電圧を示す。ピーク電流側路回路手段8
0におけるVM1電圧は電流測定用電流検出手段70で電
流から電圧に変換される基準のVM1電圧の4倍から5倍
になるようダイオード順方向電圧VFを使用して複数個
直列に接続する、それはn倍のVM1電圧と等しくなる。
このようにして直流試験の電流がピーク電流側路回路手
段80に流れ込むことを防止した。The current of the DC test is, for example, several nA to several mA.
In the test in which the current flows, the current is not allowed to flow in the peak current bypass circuit means 80 from the viewpoint of measurement accuracy. FIG. 5B shows the diode current characteristic in the peak current bypass circuit means. The peak current side current is shown on the Y axis and the VM1 voltage is shown on the X axis. Peak current bypass circuit means 8
The VM1 voltage at 0 is connected in series using the diode forward voltage VF so as to be 4 to 5 times the reference VM1 voltage converted from current to voltage by the current measuring current detection means 70. It becomes equal to the n-fold VM1 voltage.
In this way, the DC test current was prevented from flowing into the peak current bypass circuit means 80.
【0008】例えば電流から電圧へ変換された最大のV
M1 電圧が1.5vであれば、4倍にすると6vであり
例えばダイオードの順方向電圧0.6vの を10個直
列に接続した。ピーク電流側路回路手段80のダイオー
ド順方向接続のピーク電流側路回路81と逆方向接続の
ピーク電流側路回路82を並列接続させ、それを逆並接
続にした回路であるので合計20個も使用した。DUT
の機能試験では最大電流が800mAも流れるので電流
容量の大きい、例えば1.2A程度の電流容量を持つダ
イオードが必要となる。DUTに10vを印加する場合
ピーク電流側路回路手段80で6v必要とするため供給
電圧は16vとなる。ピーク電流側路回路手段80で6
vも使用することは避けたい。1チヤンネル当たりの出
力電圧制御回路10の電力容量は800mA ×16v=
12.8w必要とした。ピーク電流側路回路手段80に
n倍のVM1 電圧をとっているので供給電圧は(n−
1)倍のVM1 電圧分だけ高く設定する必要があった。
高い供給電圧と大きな電流容量を必要とする出力電圧制
御回路10によって電圧印加電流測定装置が大型化する
という問題があった。For example, the maximum V converted from current to voltage
If the M1 voltage is 1.5 V, it will be 6 V when quadrupled. For example, 10 diodes with a forward voltage of 0.6 V are connected in series. Since the peak current bypass circuit 81 of the diode forward connection and the peak current bypass circuit 82 of the reverse connection of the peak current bypass circuit means 80 are connected in parallel and are connected in reverse parallel, a total of 20 pieces are provided. used. DUT
In the functional test, since the maximum current flows as much as 800 mA, a diode having a large current capacity, for example, a current capacity of about 1.2 A is required. When 10v is applied to the DUT, 6v is required in the peak current bypass circuit means 80, so the supply voltage is 16v. 6 by peak current bypass circuit means 80
I also want to avoid using v. The power capacity of the output voltage control circuit 10 per channel is 800 mA × 16v =
12.8w was needed. Since the peak current bypass circuit means 80 takes n times the VM1 voltage, the supply voltage is (n-
1) It was necessary to set the voltage higher by double the VM1 voltage.
There has been a problem that the output voltage control circuit 10 requiring a high supply voltage and a large current capacity causes the voltage applied current measuring device to be upsized.
【0009】[0009]
【発明が解決しようとする課題】電流測定用電流検出手
段の電流から電圧に変換されるVM1 電圧の4倍から5
倍にピーク電流側路回路手段のダイオードの順方向電圧
を合わせる必要があった。それはダイオードを複数直列
に接続して逆並接続され、それは電圧を供給する出力電
圧制御回路はそのぶん高い電圧を供給しなくてはならな
いという問題があった。ピーク電流側路回路手段の基準
のVM1 電圧でピーク電流を正確に制御してピーク電流
側路回路でのロスを少なくして出力電圧制御回路の供給
電圧を低くして全体の電流容量を小さくしたいという課
題があった。出力電圧制御回路の電力容量を下げた電圧
印加電流測定装置の提供を目的とする。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention Four to five times the VM1 voltage converted from the current of the current detecting means for current measurement to the voltage.
It was necessary to double the forward voltage of the diode of the peak current bypass circuit means. It has a problem in that the diodes are connected in parallel by connecting a plurality of diodes in series, which means that the output voltage control circuit that supplies the voltage must supply that much higher voltage. I want to accurately control the peak current with the reference VM1 voltage of the peak current bypass circuit means to reduce the loss in the peak current bypass circuit and lower the supply voltage of the output voltage control circuit to reduce the overall current capacity. There was a problem. It is an object of the present invention to provide a voltage applied current measuring device in which the power capacity of an output voltage control circuit is reduced.
【0010】[0010]
【課題を解決するための手段】上記目的を解決するため
に、電圧印加電流測定装置においては、電流測定用電流
検出手段の電流から電圧に変換される基準のVM1 電圧
と等しいピーク電流設定電圧を正確に制御するピーク電
流側路回路手段を設けた。ここではピーク電流側路回路
手段800付近の回路に絞って説明する。図2(A)は
ピーク電流側路回路手段で、(B)はピーク電流側路回
路手段における複数のダイオード特性を示す。電流測定
用電流検出手段70に接続してピーク電流をバイパスさ
せるピーク電流側路回路手段800はピーク電流側路回
路810とピーク電流側路回路820と逆並接続で構成
されている。In order to solve the above-mentioned object, in a voltage applied current measuring device, a peak current setting voltage equal to a reference VM1 voltage converted from a current of a current measuring current detecting means to a voltage is set. A peak current bypass circuit means for precise control is provided. Here, the description will focus on circuits near the peak current bypass circuit means 800. FIG. 2A shows peak current bypass circuit means, and FIG. 2B shows a plurality of diode characteristics in the peak current bypass circuit means. The peak current bypass circuit means 800, which is connected to the current measuring current detection means 70 and bypasses the peak current, is composed of the peak current bypass circuit 810 and the peak current bypass circuit 820 in reverse parallel connection.
【0011】ピーク電流側路回路810はダイオードD
1とD2、D3、D4を直列に接続して電流測定用電流
検出手段70の両端にダイオードD1とD4を接続し
て、D2とD4の間にVDDよりバイアス電流を流すた
めの定電流源15を設けた。ピーク電流側路回路820
はダイオードD5、D6、D7とD8を直列に接続して
電流測定用電流検出手段70の両端にダイオードD5と
D8を接続して、D5とD7の間にVCCよりバイアス
電流を流すための定電流源16を設けた。ピーク電流側
路回路810及びピーク電流側路回路820内のダイオ
ードD2、D3、D4のVFの和V1及びD5、D6、
D7のVFの和V2は電流測定用電流検出手段70のV
M1 電圧と等しくした。定電流源15、16によりダイ
オードD2、D3、D4及びダイオードD5、D6、D
7を常時ONの状態とした。ピーク電流側路回路810
のダイオードD1とピーク電流側路回路820のダイオ
ードD8によってVM1 電圧に対して逆方向接続となる
のでOFFの状態となってピーク電流側路回路手段80
0の電流I2 とI3 は流れない。The peak current bypass circuit 810 is a diode D.
1 and D2, D3, and D4 are connected in series, diodes D1 and D4 are connected to both ends of the current measuring current detection means 70, and a constant current source 15 for flowing a bias current from VDD between D2 and D4. Was set up. Peak current bypass circuit 820
Is a constant current for connecting the diodes D5, D6, D7 and D8 in series, and connecting the diodes D5 and D8 to both ends of the current measuring current detection means 70 so as to cause a bias current to flow from VCC between D5 and D7. Source 16 was provided. The sum V1 and D5, D6 of VF of the diodes D2, D3, D4 in the peak current bypass circuit 810 and the peak current bypass circuit 820,
The sum V2 of VF of D7 is V of the current detecting means 70 for current measurement.
Equal to the M1 voltage. The diodes D2, D3, D4 and the diodes D5, D6, D by the constant current sources 15 and 16
7 was always on. Peak current bypass circuit 810
The diode D1 and the diode D8 of the peak current bypass circuit 820 make a reverse connection with respect to the VM1 voltage, so that they are in an OFF state and the peak current bypass circuit means 80.
The zero currents I2 and I3 do not flow.
【0012】図2(B)ピーク電流側路回路手段におけ
る複数のダイオード特性を示す。図のY軸にはピーク電
流側路回路手段の電流I2 とI3 を、X軸にはVM1 電
圧を示す。図の記号は発明回路の特性、は正側のV
M1 電圧、は負側のVM1 電圧、は正側のピーク時
のVM1 電圧、は負側のピーク時のVM1 電圧を示
す。VM1 電圧とV1 とV2 の絶対値は等しく、これは
ダイオードD2とD4の間及びD5とD7間の順方向電
圧VFの和と等しい。FIG. 2B shows a plurality of diode characteristics in the peak current bypass circuit means. The Y axis shows the currents I2 and I3 of the peak current bypass circuit means, and the X axis shows the VM1 voltage. The symbol in the figure is the characteristic of the invention circuit, is the positive side V
M1 voltage is the negative side VM1 voltage, is the positive side peak-time VM1 voltage, and is the negative side peak-time VM1 voltage. The absolute values of VM1 voltage and V1 and V2 are equal, which is equal to the sum of the forward voltage VF between diodes D2 and D4 and between D5 and D7.
【0013】基準のVM1 電圧とダイオードのD1及び
D8の順方向電圧VFの和を越えるとピーク電流側路回
路手段800のダイオードの順方向接続のピーク電流側
路回路810及びダイオードの逆方向接続のピーク電流
側路回路820のダイオードはON状態になってピーク
電流側路回路手段800から電流I2 及びI3 がバイパ
スされる。従来4倍から5倍とされていたピーク電流側
路回路手段800のVM1 電圧は1/4程度で済むの
で、出力電圧制御回路10の出力電圧を下げた電圧印加
電流測定装置の提供が可能となった。When the sum of the reference VM1 voltage and the forward voltage VF of the diodes D1 and D8 is exceeded, the peak current bypass circuit 810 of the diode forward connection of the peak current bypass circuit means 800 and the reverse connection of the diode are connected. The diodes of the peak current bypass circuit 820 are turned on and the currents I2 and I3 are bypassed from the peak current bypass circuit means 800. Since the VM1 voltage of the peak current bypass circuit means 800, which has been conventionally increased from 4 times to 5 times, can be reduced to about 1/4, it is possible to provide a voltage applied current measuring device in which the output voltage of the output voltage control circuit 10 is lowered. became.
【0014】[0014]
【発明の実施の形態】以下にこの発明の実施の形態を実
施例と共に詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described below in detail with examples.
【0015】[0015]
(実施例1)図1(A)に本発明の一実施例による電圧
印加電流測定装置のブロック図を、(B)にピーク電流
側路回路手段によるダイオードのクランプ特性の改善を
示す。本発明の図1において従来技術である図5と対応
する部分には同一符号を付して示す。本発明によって付
加する部分は電流測定用電流検出手段70の電流から電
圧に変換した部分と接続するピーク電流側路回路手段8
00である。DUTに所定の電圧を供給する出力電圧制
御回路10と、DUTの端子に出力電圧制御回路10の
電圧設定器12から与えた電圧値に等しい電圧を与える
よう作動する電圧帰還回路20と、DUTの試験の電流
を電圧に変換する電流測定用電流検出手段70と、電流
から電圧に変換された電圧を取り出す電流測定用差動増
幅器90と、取り出した電圧をAD変換器100によっ
てデジタル信号に変換して電流測定値とするAD変換器
100と、ピーク電流を電圧に変換する電流制限用電流
検出抵抗40と、その電圧を取り出す電流制限用差動増
幅器50と、ピーク電流が制限電流の設定値を越えたと
き出力電圧制御回路10に電流制限制御電流を出力する
電流制限用制御回路60を有した電圧印加電流測定装置
において、電流測定用電流検出手段70と接続してピー
ク電流をバイパスさせるピーク電流側路回路手段800
を設けた。(Embodiment 1) FIG. 1A shows a block diagram of a voltage applied current measuring apparatus according to an embodiment of the present invention, and FIG. 1B shows improvement of a diode clamp characteristic by a peak current bypass circuit means. In FIG. 1 of the present invention, the portions corresponding to those of FIG. The portion added by the present invention is a peak current bypass circuit means 8 connected to the portion of the current measuring current detecting means 70 converted from current to voltage.
00. An output voltage control circuit 10 that supplies a predetermined voltage to the DUT, a voltage feedback circuit 20 that operates to give a voltage equal to the voltage value given from the voltage setter 12 of the output voltage control circuit 10 to the terminals of the DUT, and a DUT. A current measuring current detecting means 70 for converting a test current into a voltage, a current measuring differential amplifier 90 for taking out the voltage converted from the current, and the taken-out voltage is converted into a digital signal by an AD converter 100. AD converter 100 for converting a peak current into a voltage, a current limiting current detecting resistor 40 for converting a peak current into a voltage, a current limiting differential amplifier 50 for extracting the voltage, and a peak current for setting a setting value of the limiting current. In the voltage applied current measuring device having the current limiting control circuit 60 which outputs the current limiting control current to the output voltage control circuit 10 when the voltage exceeds the current, the current measuring current detection is performed. Peak current side path circuit means for bypassing the peak current by connecting with the stage 70 800
Was provided.
【0016】本発明のピーク電流側路回路手段800は
電流測定用電流検出手段70の両端をピーク電流側路回
路810とピーク電流側路回路820とを逆並接続をし
た。ピーク電流側路回路810はダイオードD1とD
2、D3、D4を直列に接続して電流測定用電流検出手
段70の両端に接続し、D1とD2の間にVDDより定
電流バイアス電流を流すための定電流源15を設けた。
ピーク電流側路回路820はダイオードD5、D6、D
7とD8を直列に接続して電流測定用電流検出手段70
の両端に接続し、D7とD8の間にVCCより定電流バ
イアス電流を流すための定電流源16を設けた。両定電
流源15、16は同一の定電流源にする。これによりダ
イオードD2からD7間に一定のバイアス電圧が与えら
れる。これよりダイオードの使用個数は従来回路より比
較して、削減することができ、出力電圧制御回路10の
供給電圧を下げることが可能となった。In the peak current bypass circuit means 800 of the present invention, the peak current bypass circuit 810 and the peak current bypass circuit 820 are connected in parallel at both ends of the current measuring current detecting means 70. The peak current bypass circuit 810 includes diodes D1 and D
2, D3 and D4 are connected in series and connected to both ends of the current measuring current detecting means 70, and a constant current source 15 for supplying a constant current bias current from VDD is provided between D1 and D2.
The peak current bypass circuit 820 includes diodes D5, D6, D
7 and D8 are connected in series to form a current measuring current detecting means 70.
A constant current source 16 for supplying a constant current bias current from VCC is provided between D7 and D8. Both constant current sources 15 and 16 are the same constant current source. As a result, a constant bias voltage is applied between the diodes D2 to D7. As a result, the number of diodes used can be reduced as compared with the conventional circuit, and the supply voltage of the output voltage control circuit 10 can be lowered.
【0017】図1(B)にピーク電流側路回路手段によ
るダイオードのクランプ特性の改善を示す。図のY軸に
はピーク電流側路回路手段の電流I2 とI3 を、X軸に
はVM1 電圧を示す。本発明による正側、負側のVM1
電圧と従来技術による正側、負側のVM1 電圧の違いを
示す。図の記号は発明回路の特性、は正側のVM1
電圧、は負側のVM1 電圧、は正側のピーク時のV
M1 電圧、は負側のピーク時のVM1 電圧、これより
従来技術によるは従来回路の特性、は正側のピーク
時のVM1 電圧、は負側のピーク時のVM1 電圧を示
す。従来技術ではダイオードの順方向特性が無電流領域
で使用するために、多数個直列に接続していたが、本発
明ではダイオードD2からD7間にバイアス電圧を与え
たことで、小数のダイオードの直列接続で所望の特性が
得られた。この結果出力電圧制御回路10は出力電圧を
下げ供給電力も小さくすることができた。FIG. 1B shows the improvement of the clamp characteristic of the diode by the peak current bypass circuit means. The Y axis shows the currents I2 and I3 of the peak current bypass circuit means, and the X axis shows the VM1 voltage. Positive and negative side VM1 according to the present invention
The difference between the voltage and the VM1 voltage on the positive and negative sides according to the prior art is shown. The symbol in the figure is the characteristic of the invention circuit, is the positive side VM1
Voltage is the negative side VM1 voltage, is the positive side peak V
M1 voltage is the negative peak VM1 voltage, which is the characteristic of the conventional circuit according to the prior art, is the positive peak VM1 voltage, and is the negative peak VM1 voltage. In the prior art, a large number of diodes are connected in series in order to use the forward characteristic of the diode in a currentless region, but in the present invention, a bias voltage is applied between the diodes D2 to D7, so that a small number of diodes are connected in series. The connection gave the desired properties. As a result, the output voltage control circuit 10 was able to reduce the output voltage and supply power.
【0018】(実施例2)図3(A)に本発明の一実施
例による電圧印加電流測定装置のブロック図を、(B)
にピーク電流側路回路手段における両トランジスタのク
ランプ特性を示す。本発明の図3において従来技術であ
る図5と対応する部分には同一符号を付して示す。本発
明によって付加する部分は電流測定用電流検出手段70
の電流から電圧に変換した部分と接続するピーク電流側
路回路手段900である。DUTに所定の電圧を供給す
る出力電圧制御回路10と、DUTの端子に出力電圧制
御回路10の電圧設定器12から与えた電圧値に等しい
電圧を与えるよう作動する電圧帰還回路20と、DUT
の試験の電流を電圧に変換する電流測定用電流検出手段
70と、電流から電圧に変換された電圧を取り出す電流
測定用差動増幅器90と、取り出した電圧をAD変換器
100によってデジタル信号に変換して電流測定値とす
るAD変換器100と、ピーク電流を電圧に変換する電
流制限用電流検出抵抗40と、その電圧を取り出す電流
制限用差動増幅器50と、ピーク電流が制限電流の設定
値を越えたとき出力電圧制御回路10に電流制限制御電
流を出力する電流制限用制御回路60を有した電圧印加
電流測定装置において、電流測定用電流検出手段70と
接続してピーク電流をバイパスさせるピーク電流側路回
路手段900を設けた。(Embodiment 2) FIG. 3A is a block diagram of a voltage applied current measuring apparatus according to an embodiment of the present invention, and FIG.
Shows the clamp characteristics of both transistors in the peak current bypass circuit means. In FIG. 3 of the present invention, parts corresponding to those of FIG. The portion added according to the present invention is a current measuring current detecting means 70.
It is the peak current bypass circuit means 900 connected to the part where the current is converted into the voltage. An output voltage control circuit 10 which supplies a predetermined voltage to the DUT, a voltage feedback circuit 20 which operates to give a voltage equal to the voltage value given from the voltage setter 12 of the output voltage control circuit 10 to the terminal of the DUT, and the DUT
Current detection means 70 for converting the current of the test of 1 to voltage, a current measurement differential amplifier 90 for extracting the voltage converted from the current, and the extracted voltage are converted into digital signals by the AD converter 100. AD converter 100 for converting the peak current into a voltage, a current limiting current detection resistor 40 for converting the peak current into a voltage, a current limiting differential amplifier 50 for extracting the voltage, and a set value for the peak current being the limiting current. In the voltage applied current measuring device having the current limiting control circuit 60 that outputs the current limiting control current to the output voltage control circuit 10 when the voltage exceeds the peak, the peak is bypassed by connecting to the current measuring current detecting means 70. A current bypass circuit means 900 is provided.
【0019】ピーク電流側路回路手段900はpnp型
のトランジスタ30とnpn型のトランジスタ31をコ
レクタ接地として、電流測定用電流検出手段70の両端
に接続させ、各ベースに逆バイアスを与える設定電圧V
1、V2を与える。ピーク電流側路回路910は、トラン
ジスタ30のエミッタとコレクタを電流測定用電流検出
手段70の両端に接続し、エミッタをDUT側に接続
し、コレクタはその反対側に接続する。ベースとコレク
タ間には電圧VBC1 を自在に制御できる設定電圧V1 を
設ける。ピーク電流側路回路920も同様でありトラン
ジスタ31のエミッタとコレクタを電流測定用電流検出
手段70の両端に接続し、エミッタをDUT側に接続
し、コレクタはその反対側に接続する。ベースとコレク
タ間には電圧VBC2 を自在に制御できる設定電圧V2 を
設ける。In the peak current bypass circuit means 900, the pnp type transistor 30 and the npn type transistor 31 are connected to both ends of the current measuring current detecting means 70 with the collector grounded, and a set voltage V which gives a reverse bias to each base.
Give 1, V2. In the peak current bypass circuit 910, the emitter and collector of the transistor 30 are connected to both ends of the current measuring current detecting means 70, the emitter is connected to the DUT side, and the collector is connected to the opposite side. A set voltage V1 is provided between the base and collector so that the voltage VBC1 can be controlled freely. Similarly, the peak current bypass circuit 920 has the emitter and collector of the transistor 31 connected to both ends of the current measuring current detection means 70, the emitter connected to the DUT side, and the collector connected to the opposite side. A set voltage V2 is provided between the base and collector so that the voltage VBC2 can be freely controlled.
【0020】図3(B)にピーク電流側路回路手段にお
ける両トランジスタのクランプ特性を示す。図のY軸に
はピーク電流側路回路手段の電流I2 とI3 を、X軸に
はVM1 電圧を示す。コレクタ接地のトランジスタ30
とトランジスタ31はベースとコレクタ間の電圧V1 と
V2 を制御して基準のVM1 電圧と等しいトランジスタ
の飽和領域を設定する。コレクタ接地のトランジスタ3
0とトランジスタ31が飽和領域の間はピーク電流側路
回路手段900の電流I2 とI3 は流れない。ピーク電
流側路回路手段900の電流I2 とI3 が流れる能動領
域はコレクタ接地のトランジスタ30とトランジスタ3
1のベースとコレクタ間の電圧V1 とV2 と各ベースと
エミッタ間の電圧VBEの和を越えると流れクランプ状態
になる。これよりダイオードを多数必要とした従来技術
と比較して、2個のトランジスタで可能となった。FIG. 3B shows the clamp characteristics of both transistors in the peak current bypass circuit means. The Y axis shows the currents I2 and I3 of the peak current bypass circuit means, and the X axis shows the VM1 voltage. Collector-grounded transistor 30
And transistor 31 controls the base-collector voltages V1 and V2 to set the saturation region of the transistor equal to the reference VM1 voltage. Collector-grounded transistor 3
Between 0 and the saturation region of the transistor 31, the currents I2 and I3 of the peak current bypass circuit means 900 do not flow. The active regions of the peak current bypass circuit means 900 in which the currents I2 and I3 flow are collector-grounded transistors 30 and 3.
When the sum of the voltages V1 and V2 between the base and the collector and the voltage VBE between the base and the emitter of 1 is exceeded, the current is clamped. As a result, it is possible with two transistors as compared with the conventional technique that requires a large number of diodes.
【0021】(実施例3)図4に本発明の一実施例によ
る電圧印加電流測定装置のブロック図を示す。本発明の
図3において従来技術である図5と対応する部分には同
一符号を付して示す。本発明によって付加する部分は電
流測定用電流検出手段70の電流から電圧に変換した部
分と接続するピーク電流側路回路手段960である。D
UTに所定の電圧を供給する出力電圧制御回路10と、
DUTの端子に出力電圧制御回路10の電圧設定器12
から与えた電圧値に等しい電圧を与えるよう作動する電
圧帰還回路20と、DUTの試験の電流を電圧に変換す
る電流測定用電流検出手段70と、電流から電圧に変換
された電圧を取り出す電流測定用差動増幅器90と、取
り出した電圧をAD変換器によってデジタル信号に変換
して電とするAD変換器100と、ピーク電流を電圧に
変換する電流制限用電流検出抵抗40と、その電圧を取
り出す電流制限用差動増幅器50と、ピーク電流が制限
電流の設定値を越えたとき出力電圧制御回路10に電流
制限制御電流を出力する電流制限用制御回路60を有し
た電圧印加電流測定装置において、電流測定用電流検出
手段70と接続してピーク電流をバイパスさせるピーク
電流側路回路手段960を設けた。(Embodiment 3) FIG. 4 shows a block diagram of a voltage applied current measuring apparatus according to an embodiment of the present invention. In FIG. 3 of the present invention, parts corresponding to those of FIG. The portion added by the present invention is peak current bypass circuit means 960 connected to the portion of the current measuring current detecting means 70 converted from current to voltage. D
An output voltage control circuit 10 for supplying a predetermined voltage to the UT,
The voltage setter 12 of the output voltage control circuit 10 is connected to the terminal of the DUT.
Voltage feedback circuit 20 that operates so as to give a voltage equal to the voltage value given from the current measurement current measuring means 70 for converting the current of the DUT test to the voltage, and current measurement for extracting the voltage converted from the current. Differential amplifier 90, an AD converter 100 for converting the extracted voltage into a digital signal by an AD converter, and a current limiting current detection resistor 40 for converting a peak current into a voltage, and the voltage thereof. In a voltage applied current measuring device having a current limiting differential amplifier 50 and a current limiting control circuit 60 which outputs a current limiting control current to the output voltage control circuit 10 when a peak current exceeds a set value of the limiting current, A peak current bypass circuit means 960 for connecting the current measuring current detection means 70 and bypassing the peak current is provided.
【0022】電流測定用電流検出手段70の両端と接続
してピーク電流をバイパスさせるPチャンネル型のFE
T33のドレイン接地からなるピーク電流側路回路97
0とnチャンネル型のFET34のドレイン接地からな
るピーク電流側路回路980とで構成したピーク電流側
路回路手段960を設けた。Pチャンネル型のFET3
3の内部にドレインからソースに逆方向電流を阻止する
ダイオードD9のアノード極側をドレインと接続して、
ダイオードD9のカソード極側をソースと接続して設
け、ダイオードD9に流れる電流を阻止するダイオード
D11を設けた。実際にはFET自身が寄生ダイオード
D9を有しているので使用しなくて良い。ピーク電流側
路回路970は、Pチャンネル型のFET33のソース
とダイオードD11のカソード極側と接続して、ダイオ
ードD11のアノード極側を電流測定用電流検出手段7
0のDUTの近い側に接続して、ドレインはその反対側
に電流測定用電流検出手段70をはさんで接続した。ゲ
ートとドレイン間の電圧VGS1 を自在に制御できる設定
電圧V1 を設けた。A P-channel type FE which is connected to both ends of the current measuring means 70 for current measurement and bypasses the peak current.
Peak current bypass circuit 97 consisting of drain ground of T33
A peak current bypass circuit means 960 constituted by a zero current and a peak current bypass circuit 980 formed by grounding the drain of the n-channel type FET 34 is provided. P-channel type FET3
Connect the anode side of diode D9, which blocks the reverse current from the drain to the source, to the drain inside
The cathode pole side of the diode D9 is connected to the source, and the diode D11 for blocking the current flowing through the diode D9 is provided. In actuality, the FET itself has a parasitic diode D9 and therefore need not be used. The peak current bypass circuit 970 is connected to the source of the P-channel type FET 33 and the cathode side of the diode D11, and the anode side of the diode D11 is connected to the current measuring current detection means 7.
The drain was connected to the side closer to the DUT, and the drain was connected to the opposite side with the current measuring current detection means 70 sandwiched therebetween. A set voltage V1 is provided so that the voltage VGS1 between the gate and drain can be controlled freely.
【0023】nチャンネル型のFET34の内部にドレ
インからソースに逆方向電流を阻止するダイオードD1
0のカソード極側をドレインと接続して、ダイオードD
10のアノード極側をソースと接続して設け、ダイオー
ドD10に流れる電流を阻止するダイオードD12を設
けた。実際にはFET自身が寄生ダイオードD10を有
しているので使用しなくて良い。ピーク電流側路回路9
80は、nチャンネル型のFET34のソースとダイオ
ードD12のアノード極側と接続して、ダイオードD1
2のカソード極側を電流測定用電流検出手段70のDU
Tの近い側に接続して、ドレインはその反対側に電流測
定用電流検出手段70をはさんで接続した。ゲートとド
レイン間の電圧VGS2 を自在に制御できる設定電圧V2
を設けた。Inside the n-channel FET 34, a diode D1 for blocking a reverse current from the drain to the source.
Connect the cathode side of 0 to the drain to connect diode D
An anode pole side of 10 is provided to be connected to the source, and a diode D12 for blocking a current flowing through the diode D10 is provided. In actuality, the FET itself has a parasitic diode D10, so it need not be used. Peak current bypass circuit 9
80 is connected to the source of the n-channel type FET 34 and the anode pole side of the diode D12, and is connected to the diode D1.
The cathode side of 2 is the DU of the current detection means 70 for current measurement
The drain was connected to the side closer to T, and the drain was connected to the opposite side with the current measuring means for current measurement 70 sandwiched therebetween. Set voltage V2 that can freely control the voltage VGS2 between the gate and drain
Was provided.
【0024】ピーク電流側路回路手段960の能動領域
はVM1電圧とp、nチャンネルFET33、34のゲ
ート・ソース電圧と設定電圧V1、V2と及びD11、D
12のVFの和とを比較して、VM1電圧より高くなる
とピーク電流側路回路手段960の電流I2 とI3が流
れる。飽和領域はp、nチャンネルFET33、34の
ゲート・ソース電圧と設定電圧V1、V2と及びD11、
D12のVFの和とVM1電圧と比較してVM1電圧が低
いとp、nチャンネルFET33、34はカットオフの
状態となる。ダイオードを多数必要とした従来技術と比
較して、2個のFETと少数のダイオードで可能となっ
た。The active region of the peak current bypass circuit means 960 includes the VM1 voltage and p, the gate-source voltages of the n-channel FETs 33 and 34 and the set voltages V1 and V2, and D11 and D.
The sum of the VF of 12 is compared, and when it becomes higher than the VM1 voltage, the currents I2 and I3 of the peak current bypass circuit means 960 flow. The saturation region is the gate-source voltage of the p- and n-channel FETs 33 and 34 and the set voltage V1, V2, and D11,
When the VM1 voltage is lower than the sum of the VF of D12 and the VM1 voltage, the p- and n-channel FETs 33 and 34 are cut off. Compared to the conventional technology that requires a large number of diodes, it is possible with two FETs and a small number of diodes.
【0025】上記各実施例では電流制限用電流検出抵抗
40、電流制限用差動増幅器50、電流制限用制御回路
60を有した例で説明していたが、この回路のない構成
の場合でも、同様に適用できる。In each of the above-mentioned embodiments, the description has been given of the example in which the current limiting resistance 40 for detecting the current, the differential amplifier 50 for limiting the current, and the control circuit 60 for limiting the current are provided. The same applies.
【0026】[0026]
【発明の効果】本発明は、以上説明したような形態で実
施され、以下に記載されるような効果を奏する。The present invention is embodied in the form described above and has the following effects.
【0027】従来技術では基準のVM1 電圧の4倍から
5倍のクランプ電圧を必要としたが、本発明では上記の
説明の通りピーク電流側路回路手段の基準のVM1 電圧
を正確に制御することが可能となったので出力電圧制御
回路は供給出力電圧を下げ供給電力も小さくすることが
できた。一つのICテストシステムに多数チャンネルあ
る電圧印加電流測定装置を小型にする事が可能になっ
た。従って、本発明は非常に有用であり、その技術的効
果もさることながら、経済的効果も非常に大である。In the prior art, a clamp voltage of 4 to 5 times the reference VM1 voltage was required, but the present invention requires accurate control of the reference VM1 voltage of the peak current bypass circuit means as described above. Therefore, the output voltage control circuit can reduce the supply output voltage and supply power. It has become possible to reduce the size of the voltage applied current measuring device having multiple channels in one IC test system. Therefore, the present invention is very useful and has not only a technical effect but also an economic effect.
【0028】実施例1においてはダイオードにバイアス
電流を与えることにより使用個数は従来技術より大幅に
削減することができたことは出力電圧制御回路の供給電
圧を下げることが可能となり電圧印加電流測定装置を小
型にすることができた。In the first embodiment, by providing a bias current to the diode, the number of devices used can be greatly reduced as compared with the prior art. This means that the supply voltage of the output voltage control circuit can be lowered and the voltage applied current measuring device can be reduced. Could be made smaller.
【0029】実施例2においてはダイオードを多数必要
とした従来技術と比較して、2個のトランジスタで可能
となったので出力電圧制御回路の供給電圧を下げること
が可能となり電圧印加電流測定装置を小型にすることが
できた。In the second embodiment, compared with the prior art which requires a large number of diodes, it is possible to use two transistors, so that the supply voltage of the output voltage control circuit can be lowered and the voltage applied current measuring device can be used. I was able to make it smaller.
【0030】実施例3においてはダイオードを多数必要
とした従来技術と比較して、2個のFETと少数のダイ
オードで可能となったので出力電圧制御回路の供給電圧
を下げることが可能となり電圧印加電流測定装置を小型
にすることができた。In the third embodiment, compared with the prior art which requires a large number of diodes, it is possible to use two FETs and a small number of diodes, so that the supply voltage of the output voltage control circuit can be lowered and the voltage application. The current measuring device can be made compact.
【図1】図(A)に本発明の一実施例による電圧印加電
流測定装置のブロック図を、(B)にピーク電流側路回
路手段によるダイオードのクランプ特性の改善を示す。FIG. 1A is a block diagram of a voltage applied current measuring device according to an embodiment of the present invention, and FIG. 1B shows improvement of a diode clamp characteristic by a peak current bypass circuit means.
【図2】図(A)はピーク電流側路回路手段で、(B)
はピーク電流側路回路手段における複数のダイオード特
性を示す。FIG. 2A is a peak current bypass circuit means, and FIG.
Indicates a plurality of diode characteristics in the peak current bypass circuit means.
【図3】図(A)に本発明の一実施例による電圧印加電
流測定装置のブロック図を、(B)にピーク電流側路回
路手段における両トランジスタのクランプ特性を示す。FIG. 3A is a block diagram of a voltage applied current measuring device according to an embodiment of the present invention, and FIG. 3B shows clamp characteristics of both transistors in a peak current bypass circuit means.
【図4】本発明の一実施例による電圧印加電流測定装置
のブロック図を示す。FIG. 4 is a block diagram of a voltage applied current measuring device according to an embodiment of the present invention.
【図5】図(A)に従来技術による電圧印加電流測定装
置を、(B)にピーク電流側路回路手段におけるダイオ
ード電流特性を示す。5A shows a voltage applied current measuring device according to the prior art, and FIG. 5B shows a diode current characteristic in a peak current bypass circuit means.
10 出力電圧制御回路 11 演算増幅器 12 電圧設定器 15、16 定電流源 20 電圧帰還回路 21 増幅器 40 電流制限用電流検出抵抗 50 電流制限用差動増幅器 60 電流制限用制御回路 70 電流測定用電流検出手段 71 電流測定用電流検出回路 72 レンジ切替手段 80、800、900、960 ピーク電流側路回路手
段 81、810、910、970 ピーク電流側路回路 82、820、920、980 ピーク電流側路回路 90 電流測定用差動増幅回路 100 AD変換器 110 電流検出手段 D1、D2 ダイオード D3、D4 ダイオード D5、D6 ダイオード D8、D9 ダイオード D10、D11 ダイオード D12 ダイオード 30、31 トランジスタ 33、34 FET10 Output Voltage Control Circuit 11 Operational Amplifier 12 Voltage Setting Device 15 and 16 Constant Current Source 20 Voltage Feedback Circuit 21 Amplifier 40 Current Limiting Current Detecting Resistor 50 Current Limiting Differential Amplifier 60 Current Limiting Control Circuit 70 Current Measuring Current Detecting Means 71 Current measuring circuit for current measurement 72 Range switching means 80, 800, 900, 960 Peak current bypass circuit means 81, 810, 910, 970 Peak current bypass circuit 82, 820, 920, 980 Peak current bypass circuit 90 Current measurement differential amplifier circuit 100 AD converter 110 Current detection means D1, D2 Diodes D3, D4 Diodes D5, D6 Diodes D8, D9 Diodes D10, D11 Diodes D12 Diodes 30, 31 Transistors 33, 34 FET
Claims (3)
制御回路(10)と、DUT端子の電圧を出力電圧制御
回路(10)に帰還させる電圧帰還回路(20)と、D
UTの試験の電流を電圧に変換する電流測定用電流検出
手段(70)と、電流測定用電流検出手段(70)の両
端の電圧を取り出す電流測定用差動増幅器(90)と、
これをデジタル信号に変換するAD変換器(100)を
有した電圧印加電流測定装置において、 電流測定用電流検出手段(70)の両端と接続して電流
をバイパスさせるピーク電流側路回路(810)とピー
ク電流側路回路(820)とを逆並接続した構成のピー
ク電流側路回路手段(800)を設け、 ピーク電流側路回路(810)は、ダイオード(D1)
と少なくとも1個のダイオード(D2)を直列に接続し
て、電流測定用電流検出手段(70)の両端に接続し、
少なくとも1個のダイオード(D2)を順方向にバイア
スするバイアス用定電流源(15)とし、 ピーク電流側路回路(820)は、少なくとも1個のダ
イオード(D7)とダイオード(D8)を直列に接続し
て、電流測定用電流検出手段(70)の両端に接続し、
少なくとも1個のダイオード(D7)を順方向にバイア
スするバイアス用定電流源(16)とし、 以上の構成を具備することを特徴とする電圧印加電流測
定装置。1. An output voltage control circuit (10) for supplying a predetermined voltage to a DUT, a voltage feedback circuit (20) for feeding back the voltage of a DUT terminal to the output voltage control circuit (10), and D.
A current measuring current detecting means (70) for converting the current of the UT test into a voltage, a current measuring differential amplifier (90) for extracting the voltage across the current measuring current detecting means (70),
In a voltage application current measuring device having an AD converter (100) for converting this into a digital signal, a peak current bypass circuit (810) connected to both ends of the current measuring current detecting means (70) to bypass the current. And a peak current bypass circuit (820) are connected in reverse parallel to each other to provide peak current bypass circuit means (800), and the peak current bypass circuit (810) is a diode (D1).
And at least one diode (D2) are connected in series to both ends of the current measuring current detecting means (70),
A bias constant current source (15) for biasing at least one diode (D2) in the forward direction is used, and the peak current bypass circuit (820) includes at least one diode (D7) and diode (D8) in series. Connect to both ends of the current measuring means (70) for current measurement,
A voltage applied current measuring device comprising a bias constant current source (16) for biasing at least one diode (D7) in a forward direction, and having the above configuration.
制御回路(10)と、DUT端子の電圧を出力電圧制御
回路(10)に帰還させる電圧帰還回路(20)と、D
UTの試験の電流を電圧に変換する電流測定用電流検出
手段(70)と、電流測定用電流検出手段(70)の両
端の電圧を取り出す電流測定用差動増幅器(90)と、
これをデジタル信号に変換するAD変換器(100)を
有した電圧印加電流測定装置において、 電流測定用電流検出手段(70)の両端と接続して電流
をバイパスさせるピーク電流側路回路(910)とピー
ク電流側路回路(920)とを逆並接続した構成のピー
ク電流側路回路手段(900)を設け、 ピーク電流側路回路(910)は、トランジスタ(3
0)のエミッタを電流測定用電流検出手段(70)のD
UT側に接続し、コレクタを電流測定用電流検出手段
(70)の反対側に接続し、ベースとコレクタ間に自在
に制御できる設定電圧V1 を設け、 ピーク電流側路回路(920)は、トランジスタ(3
1)のエミッタを電流測定用電流検出手段(70)のD
UT側に接続し、コレクタを電流測定用電流検出手段
(70)の反対側に接続して、ベースとコレクタ間に自
在に制御できる設定電圧V2 を設け、 以上の構成を具備することを特徴とする電圧印加電流測
定装置。2. An output voltage control circuit (10) for supplying a predetermined voltage to the DUT, a voltage feedback circuit (20) for feeding back the voltage of the DUT terminal to the output voltage control circuit (10), and D.
A current measuring current detecting means (70) for converting the current of the UT test into a voltage, a current measuring differential amplifier (90) for extracting the voltage across the current measuring current detecting means (70),
In a voltage applied current measuring device having an AD converter (100) for converting this into a digital signal, a peak current bypass circuit (910) connected to both ends of the current measuring current detecting means (70) to bypass the current. And a peak current bypass circuit (920) are connected in reverse parallel to each other, and a peak current bypass circuit means (900) is provided. The peak current bypass circuit (910) includes a transistor (3
The emitter of 0) is connected to D of the current detecting means (70) for current measurement.
The peak current bypass circuit (920) is connected to the UT side, the collector is connected to the opposite side of the current measuring current detecting means (70), and a controllable setting voltage V1 is provided between the base and the collector. (3
The emitter of 1) is connected to D of the current detection means (70) for current measurement.
It is connected to the UT side, the collector is connected to the opposite side of the current measuring current detecting means (70), and a controllable set voltage V2 is provided between the base and the collector. Voltage applied current measuring device.
制御回路(10)と、DUT端子の電圧を出力電圧制御
回路(10)に帰還させる電圧帰還回路(20)と、D
UTの試験の電流を電圧に変換する電流測定用電流検出
手段(70)と、電流測定用電流検出手段(70)の両
端の電圧を取り出す電流測定用差動増幅器(90)と、
これをデジタル信号に変換するAD変換器(100)を
有した電圧印加電流測定装置において、 電流測定用電流検出手段(70)の両端と接続して電流
をバイパスさせるピーク電流側路回路(970)とピー
ク電流側路回路(980)とを逆並接続した構成のピー
ク電流側路回路手段(960)を設け、 ピーク電流側路回路(970)は、Pチャンネル型FE
T(33)のソースとダイオード(D11)のカソード
極側と接続し、ダイオード(D11)のアノード極側と
電流測定用電流検出手段(70)のDUT側に接続し、
ドレインは電流測定用電流検出手段(70)の反対側に
接続し、ゲートとドレイン間の電圧VGS1 を自在に制御
できる設定電圧V1 を設け、 ピーク電流側路回路(980)は、nチャンネル型FE
T(34)のソースとダイオード(D12)のアノード
極側と接続しダイオード(D12)のカソード極側と電
流測定用電流検出手段(70)のDUT側に接続し、ド
レインは電流測定用電流検出手段(70)の反対側に接
続し、ゲートとドレイン間の電圧VGS2を自在に制御で
きる設定電圧V2 を設け、 以上の構成を具備することを特徴とする電圧印加電流測
定装置。3. An output voltage control circuit (10) for supplying a predetermined voltage to the DUT, a voltage feedback circuit (20) for feeding back the voltage of the DUT terminal to the output voltage control circuit (10), and D.
A current measuring current detecting means (70) for converting the current of the UT test into a voltage, a current measuring differential amplifier (90) for extracting the voltage across the current measuring current detecting means (70),
In a voltage applied current measuring device having an AD converter (100) for converting this into a digital signal, a peak current bypass circuit (970) connected to both ends of the current measuring current detecting means (70) to bypass the current. And a peak current bypass circuit (980) are connected in reverse parallel to each other, and peak current bypass circuit means (960) is provided. The peak current bypass circuit (970) is a P-channel type FE.
The source of T (33) is connected to the cathode side of the diode (D11), the anode side of the diode (D11) is connected to the DUT side of the current measuring current detection means (70),
The drain is connected to the opposite side of the current measuring means for current measurement (70), and a set voltage V1 for freely controlling the voltage VGS1 between the gate and the drain is provided. The peak current bypass circuit (980) is an n-channel type FE.
The source of T (34) is connected to the anode side of the diode (D12), the cathode side of the diode (D12) is connected to the DUT side of the current measuring current detecting means (70), and the drain is current measuring current detecting. A voltage applied current measuring device having the above-mentioned configuration, which is connected to the opposite side of the means (70) and is provided with a set voltage V2 capable of freely controlling the voltage VGS2 between the gate and the drain.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7350963A JPH09178781A (en) | 1995-12-25 | 1995-12-25 | Device for measuring voltage application current |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7350963A JPH09178781A (en) | 1995-12-25 | 1995-12-25 | Device for measuring voltage application current |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09178781A true JPH09178781A (en) | 1997-07-11 |
Family
ID=18414110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7350963A Withdrawn JPH09178781A (en) | 1995-12-25 | 1995-12-25 | Device for measuring voltage application current |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09178781A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002008775A1 (en) * | 2000-07-24 | 2002-01-31 | Advantest Corporation | Test instrument |
-
1995
- 1995-12-25 JP JP7350963A patent/JPH09178781A/en not_active Withdrawn
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002008775A1 (en) * | 2000-07-24 | 2002-01-31 | Advantest Corporation | Test instrument |
JP2002040098A (en) * | 2000-07-24 | 2002-02-06 | Advantest Corp | Testing device |
US6781364B2 (en) | 2000-07-24 | 2004-08-24 | Advantest Corporation | Electron device testing apparatus having high current and low current testing features |
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