JPH09172339A - Surface acoustic wave device and manufacture of the same - Google Patents

Surface acoustic wave device and manufacture of the same

Info

Publication number
JPH09172339A
JPH09172339A JP34828095A JP34828095A JPH09172339A JP H09172339 A JPH09172339 A JP H09172339A JP 34828095 A JP34828095 A JP 34828095A JP 34828095 A JP34828095 A JP 34828095A JP H09172339 A JPH09172339 A JP H09172339A
Authority
JP
Japan
Prior art keywords
electrode
acoustic wave
surface acoustic
surrounding
idt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34828095A
Other languages
Japanese (ja)
Inventor
Naoya Yamasumi
直也 山角
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP34828095A priority Critical patent/JPH09172339A/en
Publication of JPH09172339A publication Critical patent/JPH09172339A/en
Pending legal-status Critical Current

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  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

PROBLEM TO BE SOLVED: To remove the limit of miniaturization owing to the package of a surface acoustic wave device and to reduce the cost. SOLUTION: An IDT (reed screen-like interdigital electrode) 2 and enveloping electrodes 4 surrounding a surface acoustic wave exciting part by means of IDT are simultaneously formed on a wafer-like piezoelectric substrate 1. A sacrifice layer 5 and a resin layer 7 of silicon oxide and the like are stacked and formed on the whole surface of a wafer. Window holes 8 having the same areas as the terminal electrodes 3 are provided n positions corresponding to the terminal electrodes 3 of IDT. A hollow part 9 is formed at the inner side of the enveloping electrodes 4 and the resin layer 7 by immersing them in buffered hydrofluoric acid and eluding the sacrifice layer 5 from the window holes 8.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電気通信機器に高
周波機能素子として用いられる弾性表面波装置およびそ
の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface acoustic wave device used as a high frequency functional element in telecommunications equipment and a method for manufacturing the same.

【0002】[0002]

【従来の技術】高周波帯の共振子,フィルタ等に用いら
れる弾性表面波装置(SAW共振子)は、弾性表面波が
励振される電極面近傍に中空部を設け、かつ、気密にす
るため、セラミック等のパッケージを用いて溶接により
封止している。
2. Description of the Related Art A surface acoustic wave device (SAW resonator) used for a high frequency resonator, a filter, etc. is provided with a hollow portion in the vicinity of an electrode surface where a surface acoustic wave is excited and is airtight. It is sealed by welding using a package made of ceramic or the like.

【0003】[0003]

【発明が解決しようとする課題】しかし、セラミックパ
ッケージ等は高価なため部品としてのコストの大きな割
合を占め、又、パッケージングは一枚の圧電基板ウェハ
に作り込んだ多数のSAW素子を切断分離してチップ状
になった状態で行われるため、個々のチップのパッケー
ジングに大きな工数が必要となる。又、弾性表面波素子
1チップが1パッケージに収容される構造のため、小形
化を考えた場合、パッケージの大きさによって装置とし
ての大きさが決定されている。又、ボンディングワイヤ
とキャップとが接触しないように、充分な高さのキャッ
プが必要であり、部品の薄型化にも制約がある。さら
に、弾性表面波素子をパッケージに収容しないでチップ
のまま他のIC回路等と回路基板に取り付けて同時に樹
脂封止すると、樹脂が励振する電極表面に触れる場合が
あり、所望の電気的特性を満足することはできないとい
う問題がある。
However, since the ceramic package and the like are expensive, they occupy a large proportion of the cost as parts, and the packaging is performed by cutting and separating a large number of SAW elements formed on one piezoelectric substrate wafer. Since it is carried out in a chip shape, a large number of steps are required for packaging each chip. In addition, since one surface acoustic wave element chip is housed in one package, the size of the device is determined by the size of the package when miniaturization is considered. In addition, a cap having a sufficient height is required so that the bonding wire and the cap do not come into contact with each other, and there is a limitation in reducing the thickness of parts. Further, if the surface acoustic wave element is not housed in a package and is mounted on a circuit board together with another IC circuit as a chip and is resin-sealed at the same time, the resin may touch the surface of the electrode to be excited, which may lead to a desired electrical characteristic. There is a problem that we cannot be satisfied.

【0004】本発明の目的は、上記従来技術のパッケー
ジ使用に伴う小形化,経済化の限界をとり除くととも
に、パッケージングの工数を大幅に簡略化した弾性表面
波装置及びその製造方法を提供することにある。
It is an object of the present invention to provide a surface acoustic wave device and a method for manufacturing the same, which eliminates the limitations of downsizing and economy due to the use of the package of the prior art, and greatly simplifies the packaging man-hours. It is in.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
の本発明の弾性表面波装置は、圧電基板と、該圧電基板
上に形成されたIDT電極と該IDT電極に連接された
端子電極と該IDT電極による弾性表面波励振部分を囲
む包囲電極と、前記包囲電極の電極面を周辺部としその
内側の中空部分を覆うように形成された樹脂層とを備
え、前記樹脂層の前記端子電極に対応する部分に窓穴が
設けられたことを特徴とするものである。
To achieve the above object, a surface acoustic wave device of the present invention comprises a piezoelectric substrate, an IDT electrode formed on the piezoelectric substrate, and a terminal electrode connected to the IDT electrode. The terminal electrode of the resin layer comprises: an enclosing electrode surrounding the surface acoustic wave excited portion by the IDT electrode; and a resin layer formed so as to cover the hollow portion inside the electrode surface of the enclosing electrode as a peripheral portion. It is characterized in that a window hole is provided in a portion corresponding to.

【0006】さらに、上記弾性表面波装置の製造方法
は、ウエハ状の圧電基板上に、多数のIDT電極と該I
DT電極に連接された端子電極と該IDT電極による弾
性表面波励振部分を囲む包囲電極とを形成する電極形成
工程と、前記電極が形成された圧電基板上の全面に電極
を浸食しないエッチング液で溶融することのできる材質
の犠牲層を堆積させる犠牲層形成工程と、前記犠牲層の
前記包囲電極の内側部分を残した周辺部分を取り除き該
包囲電極の電極面を露出させる第1のエッチング工程
と、前記包囲電極とその内側の犠牲層上に前記端子電極
に対応する部分に窓穴が設けられた樹脂層を形成させる
樹脂層形成工程と、次にエッチング液に浸漬して前記窓
穴から前記犠牲層を溶出させる第2のエッチング工程
と、前記包囲電極の外側を切断して多数のチップ状弾性
表面波装置を得る切断工程とを備えたことを特徴とする
ものである。
Further, according to the method of manufacturing the surface acoustic wave device described above, a large number of IDT electrodes and the I-electrodes are formed on a wafer-shaped piezoelectric substrate.
An electrode forming step of forming a terminal electrode connected to the DT electrode and a surrounding electrode surrounding the surface acoustic wave excited portion by the IDT electrode, and an etching solution that does not erode the electrode on the entire surface of the piezoelectric substrate on which the electrode is formed. A sacrificial layer forming step of depositing a sacrificial layer of a material that can be melted, and a first etching step of removing a peripheral portion of the sacrificial layer except an inner portion of the surrounding electrode to expose an electrode surface of the surrounding electrode. A resin layer forming step of forming a resin layer in which a window hole is provided in a portion corresponding to the terminal electrode on the surrounding electrode and a sacrificial layer inside thereof, and then, by immersing the resin layer in an etching solution and through the window hole The method is characterized by comprising a second etching step of eluting the sacrificial layer and a cutting step of cutting the outside of the surrounding electrode to obtain a large number of chip-shaped surface acoustic wave devices.

【0007】[0007]

【発明の実施の形態】上記のように、弾性表面波の励振
電極面に、スペーサあるいは犠牲層となる酸化シリコン
(SiO2 )膜と、ポリイミド樹脂層とを設けた後、端
子電極部分に窓穴をあけて内層の酸化シリコンを溶出す
ることにより、ポリイミド樹脂層に覆われた励振電極面
の励振部分に中空部分を有する弾性表面波装置が得られ
る。
BEST MODE FOR CARRYING OUT THE INVENTION As described above, after the silicon oxide (SiO 2 ) film serving as a spacer or a sacrificial layer and the polyimide resin layer are provided on the surface of the surface acoustic wave excitation electrode, the window is formed in the terminal electrode portion. By making holes to elute the silicon oxide in the inner layer, a surface acoustic wave device having a hollow portion in the excitation portion of the excitation electrode surface covered with the polyimide resin layer can be obtained.

【0008】[0008]

【実施例】以下、実施例を示す図によって本発明の詳細
について具体的に説明する。図1及び図2は本発明の製
造方法を説明する工程順の説明図である。図1は本発明
の製造方法の第1の工程である電極形成工程を示す平面
図(A)と中央横切断部端面図(B)である。図におい
て、1は、例えばニオブ酸リチウム(LiNbO3 )な
どの圧電基板、2はすだれ状交叉指電極(IDT)、3
はその端子電極である。4はIDT2によって励振され
る弾性表面波励振部分を囲む圧電基板上の包囲電極であ
る。IDT2,端子電極3,包囲電極4は、例えば、金
(Au)を真空蒸着により圧電基板1の全面に厚さ30
00Åに成膜した後、ポジ型フォトレジストを用い、フ
ォトリソグラフィによりパターニングを行い、イオンミ
リング等でエッチングすることにより同時に形成され
る。図1,図2は、すべて1つの弾性表面波素子につい
て示してあるが、例えば、3インチの圧電基板材料ウェ
ハ内に約700個の弾性表面波素子が同時に作り込まれ
る。従って、図1の工程及び次に述べる図2の工程はす
べて上記ウェハの状態で同時に加工処理が行われる。
EXAMPLES The details of the present invention will be specifically described below with reference to the drawings showing examples. 1 and 2 are explanatory views in the order of steps for explaining the manufacturing method of the present invention. FIG. 1 is a plan view (A) showing an electrode forming step, which is the first step of the manufacturing method of the present invention, and an end view (B) of a central transverse section. In the figure, 1 is a piezoelectric substrate made of, for example, lithium niobate (LiNbO 3 ), 2 is a interdigitated interdigital electrode (IDT), 3 is a
Is the terminal electrode. Reference numeral 4 is an enclosing electrode on the piezoelectric substrate that surrounds the surface acoustic wave excited portion excited by the IDT 2. The IDT 2, the terminal electrode 3, and the surrounding electrode 4 have a thickness of 30 over the entire surface of the piezoelectric substrate 1 by vacuum deposition of gold (Au), for example.
After forming a film of 00Å, patterning is performed by photolithography using a positive photoresist, and etching is performed by ion milling or the like to form the film at the same time. Although FIGS. 1 and 2 all show one surface acoustic wave element, for example, about 700 surface acoustic wave elements are simultaneously formed in a 3-inch piezoelectric substrate material wafer. Therefore, all the steps of FIG. 1 and the step of FIG. 2 described below are simultaneously processed in the wafer state.

【0009】図2は、図1に続く本発明の製造過程を順
次示す説明図であり、(A)〜(E)はすべて図1
(B)同様の中央横切断部端面図である。図2(A)は
犠牲層形成工程を示し、5は、例えば酸化シリコン(S
iO2 )膜などの犠牲層である。図1(B)の電極形成
工程の次に、図2(A)に示したようにウェハ全面にス
パッタリングにより厚さ3μmのSiO2 膜を堆積させ
る。次に、図2(B)は第1のエッチング工程を示す。
この工程では、ネガ型フォトレジストを用い、フォトリ
ソグラフィにより包囲電極4の上面の部分のSiO2
をバッファードふっ酸によってエッチングを行い包囲電
極4の電極面を接着面6として露出させる。バッファー
ドふっ酸はふっ化アンモニウムとふっ化水素によって作
られる緩衝液である。
FIG. 2 is an explanatory view sequentially showing the manufacturing process of the present invention subsequent to FIG. 1, and (A) to (E) are all shown in FIG.
FIG. 7B is a similar end view of the central transverse section. FIG. 2A shows a sacrifice layer forming step, and 5 is, for example, silicon oxide (S
It is a sacrificial layer such as an iO 2 ) film. After the electrode formation step of FIG. 1B, a 3 μm thick SiO 2 film is deposited by sputtering on the entire surface of the wafer as shown in FIG. 2A. Next, FIG. 2B shows a first etching step.
In this step, a negative photoresist is used, and the SiO 2 film on the upper surface of the surrounding electrode 4 is etched by buffered hydrofluoric acid by photolithography to expose the electrode surface of the surrounding electrode 4 as an adhesive surface 6. Buffered hydrofluoric acid is a buffer solution made up of ammonium fluoride and hydrogen fluoride.

【0010】次に、図2(C)は樹脂層形成工程を示
し、7は、例えば感光性ポリイミドなどの樹脂層であ
る。まず、前工程で形成された犠牲層5の上から、中空
部のカバーとして感光性ポリイミドなどの樹脂を12μ
mの厚さで回転塗布し、フォトリソグラフィにより端子
電極3に対応する位置に端子電極3(ボンディングパッ
ド)の面積とほぼ同じ面積の窓穴8を形成させる。
Next, FIG. 2C shows a resin layer forming step, and 7 is a resin layer made of, for example, photosensitive polyimide. First, from the top of the sacrificial layer 5 formed in the previous step, a resin such as a photosensitive polyimide is used as a cover for the hollow portion by 12 μm.
Spin coating is performed with a thickness of m, and a window hole 8 having an area substantially the same as the area of the terminal electrode 3 (bonding pad) is formed at a position corresponding to the terminal electrode 3 by photolithography.

【0011】次の図2(D)は第2のエッチング工程を
示し、9は中空部分である。この工程では、前工程終了
後バッファードふっ酸液中に30分間浸漬して、包囲電
極4の内側に充填されている犠牲層(SiO2 )を窓穴
8から溶出(エッチング)させることにより中空部分9
が形成される。この中空部分9は外からも観察できる。
3インチウェハ面内に作り込まれている700チップの
うち70チップを抽出してプローブによる特性検査を行
ったところ、図1の状態のときと全く同じ電気的特性が
得られ、中空部分9が確実に得られていると判断され
た。
Next, FIG. 2D shows the second etching step, and 9 is a hollow portion. In this step, after the completion of the previous step, it is immersed in a buffered hydrofluoric acid solution for 30 minutes to elute (etch) the sacrificial layer (SiO 2 ) filling the inside of the surrounding electrode 4 from the window hole 8 to make it hollow. Part 9
Is formed. This hollow portion 9 can be observed from the outside.
When 70 chips out of 700 chips formed in the surface of the 3-inch wafer were extracted and characteristic inspection was performed by the probe, the same electric characteristics as in the state of FIG. 1 were obtained, and the hollow portion 9 was It was judged to have been surely obtained.

【0012】図3は上記製造方法によって作られた本発
明の弾性表面波装置の外観を示す斜視図である。図2
(D)の第2のエッチング工程の後、洗浄,乾燥などが
行われ、包囲電極4の外側を切断して多数の弾性表面波
装置がチップ状で得られる。図3はその1つのチップの
外観を示すものであり、圧電基板1がポリイミド樹脂層
7で覆われ、窓穴8からボンディングパッドとなる端子
電極3が見える。
FIG. 3 is a perspective view showing the appearance of the surface acoustic wave device of the present invention manufactured by the above manufacturing method. FIG.
After the second etching step (D), cleaning, drying, etc. are performed, and the outside of the surrounding electrode 4 is cut to obtain a large number of surface acoustic wave devices in a chip shape. FIG. 3 shows the appearance of one of the chips, in which the piezoelectric substrate 1 is covered with the polyimide resin layer 7 and the terminal electrode 3 serving as a bonding pad can be seen through the window hole 8.

【0013】図3に示す本発明のチップ状弾性表面波装
置は、例えば、VCO(電圧制御発振器)などの回路基
板に面実装され、回路基板上の導体配線のパッド部分と
端子電極3とがアルミニウム(Al)や金線などでワイ
ヤボンディングされ、他の回路素子とともに高粘度のエ
ポキシ樹脂で気密封止されて実用に供される。
The chip-type surface acoustic wave device of the present invention shown in FIG. 3 is surface-mounted on a circuit board such as a VCO (voltage controlled oscillator), and the pad portion of the conductor wiring on the circuit board and the terminal electrode 3 are provided. It is wire-bonded with aluminum (Al) or a gold wire, and is hermetically sealed with a high-viscosity epoxy resin together with other circuit elements for practical use.

【0014】[0014]

【発明の効果】以上詳細に説明したように、本発明を実
施することにより、従来のパッケージを使用することな
く、しかも、金属パッケージと同等の電磁シールド効果
も備えたチップ状の弾性表面波装置が得られるので、小
形化がさらに促進され、このような弾性表面波装置を組
み込んで用いる機器の小形化に多大な効果を発揮するこ
とができる。さらに、パッケージング工程までウェハ単
位で処理できるので原価低減をさらに進めることができ
る。
As described above in detail, by implementing the present invention, a chip-like surface acoustic wave device without using a conventional package and having an electromagnetic shield effect equivalent to that of a metal package. As a result, the miniaturization is further promoted, and a great effect can be exerted on the miniaturization of the equipment used by incorporating such a surface acoustic wave device. Further, since the packaging process can be performed on a wafer-by-wafer basis, the cost can be further reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例を示す製造過程説明図である。FIG. 1 is a manufacturing process explanatory view showing an embodiment of the present invention.

【図2】本発明の実施例を示す製造過程説明図である。FIG. 2 is a manufacturing process explanatory view showing an embodiment of the present invention.

【図3】本発明のチップ状弾性表面波装置の斜視図であ
る。
FIG. 3 is a perspective view of a chip-shaped surface acoustic wave device of the present invention.

【符号の説明】[Explanation of symbols]

1 圧電基板 2 IDT 3 端子電極 4 包囲電極 5 犠牲層 6 接着面 7 樹脂層 8 窓穴 9 中空部分 1 Piezoelectric Substrate 2 IDT 3 Terminal Electrode 4 Surrounding Electrode 5 Sacrificial Layer 6 Adhesive Surface 7 Resin Layer 8 Window Hole 9 Hollow Part

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 圧電基板と、該圧電基板上に形成された
IDT電極と該IDT電極に連接された端子電極と該I
DT電極による弾性表面波励振部分を囲む包囲電極と、
前記包囲電極の電極面を周辺部としその内側の中空部分
を覆うように形成された樹脂層とを備え、前記樹脂層の
前記端子電極に対応する部分に窓穴が設けられたことを
特徴とする弾性表面波装置。
1. A piezoelectric substrate, an IDT electrode formed on the piezoelectric substrate, a terminal electrode connected to the IDT electrode, and the I electrode.
A surrounding electrode surrounding a surface acoustic wave excited portion by the DT electrode,
A resin layer formed so as to cover the hollow portion inside the electrode surface of the surrounding electrode as a peripheral portion, and a window hole is provided in a portion of the resin layer corresponding to the terminal electrode, Surface acoustic wave device.
【請求項2】 ウエハ状の圧電基板上に、多数のIDT
電極と該IDT電極に連接された端子電極と該IDT電
極による弾性表面波励振部分を囲む包囲電極とを形成す
る電極形成工程と、 前記電極が形成された圧電基板上の全面に電極を浸食し
ないエッチング液で溶融することのできる材質の犠牲層
を堆積させる犠牲層形成工程と、 前記犠牲層の前記包囲電極の内側部分を残した周辺部分
を取り除き該包囲電極の電極面を露出させる第1のエッ
チング工程と、 前記包囲電極とその内側の犠牲層上に前記端子電極に対
応する部分に窓穴が設けられた樹脂層を形成させる樹脂
層形成工程と、 次にエッチング液に浸漬して前記窓穴から前記犠牲層を
溶出させる第2のエッチング工程と、 前記包囲電極の外側を切断して多数のチップ状弾性表面
波装置を得る切断工程とを備えた弾性表面波装置の製造
方法。
2. A large number of IDTs are formed on a wafer-shaped piezoelectric substrate.
An electrode forming step of forming an electrode, a terminal electrode connected to the IDT electrode, and an enclosing electrode surrounding the surface acoustic wave excitation part by the IDT electrode; and not eroding the electrode on the entire surface of the piezoelectric substrate on which the electrode is formed A sacrificial layer forming step of depositing a sacrificial layer made of a material that can be melted by an etching solution; and a first part of exposing the electrode surface of the surrounding electrode by removing a peripheral portion of the sacrificial layer except an inner portion of the surrounding electrode. An etching step, a resin layer forming step of forming a resin layer in which a window hole is provided in a portion corresponding to the terminal electrode on the surrounding electrode and the sacrificial layer inside thereof, and then immersing in an etching solution to form the window A method of manufacturing a surface acoustic wave device, comprising: a second etching step of eluting the sacrificial layer from a hole; and a cutting step of cutting the outside of the surrounding electrode to obtain a large number of chip surface acoustic wave devices. .
JP34828095A 1995-12-19 1995-12-19 Surface acoustic wave device and manufacture of the same Pending JPH09172339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34828095A JPH09172339A (en) 1995-12-19 1995-12-19 Surface acoustic wave device and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34828095A JPH09172339A (en) 1995-12-19 1995-12-19 Surface acoustic wave device and manufacture of the same

Publications (1)

Publication Number Publication Date
JPH09172339A true JPH09172339A (en) 1997-06-30

Family

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Cited By (8)

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WO2003057618A3 (en) * 2002-01-11 2004-01-15 Infineon Technologies Ag Method for producing a protective covering for a component
EP1540736A2 (en) * 2002-08-28 2005-06-15 Silicon Light Machines Corporation Wafer-level seal for non-silicon-based devices
JP2005341162A (en) * 2004-05-26 2005-12-08 Kyocera Corp Device equipment and its manufacturing method
US7466022B2 (en) 2002-08-28 2008-12-16 Silicon Light Machines Corporation Wafer-level seal for non-silicon-based devices
US7750420B2 (en) 2004-03-26 2010-07-06 Cypress Semiconductor Corporation Integrated circuit having one or more conductive devices formed over a SAW and/or MEMS device
JPWO2009001650A1 (en) * 2007-06-28 2010-08-26 京セラ株式会社 Surface acoustic wave device and manufacturing method thereof
US9021669B2 (en) 2006-08-07 2015-05-05 Kyocera Corporation Method for manufacturing surface acoustic wave apparatus
JP2017028543A (en) * 2015-07-23 2017-02-02 株式会社デンソー Elastic surface wave element

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6955950B2 (en) 2002-01-11 2005-10-18 Infineon Technologies Ag Method for generating a protective cover for a device
WO2003057618A3 (en) * 2002-01-11 2004-01-15 Infineon Technologies Ag Method for producing a protective covering for a component
EP1540736A2 (en) * 2002-08-28 2005-06-15 Silicon Light Machines Corporation Wafer-level seal for non-silicon-based devices
EP1540736A4 (en) * 2002-08-28 2006-03-08 Silicon Light Machines Corp Wafer-level seal for non-silicon-based devices
US7466022B2 (en) 2002-08-28 2008-12-16 Silicon Light Machines Corporation Wafer-level seal for non-silicon-based devices
US7750420B2 (en) 2004-03-26 2010-07-06 Cypress Semiconductor Corporation Integrated circuit having one or more conductive devices formed over a SAW and/or MEMS device
JP2005341162A (en) * 2004-05-26 2005-12-08 Kyocera Corp Device equipment and its manufacturing method
JP4535778B2 (en) * 2004-05-26 2010-09-01 京セラ株式会社 Device device manufacturing method
US9021669B2 (en) 2006-08-07 2015-05-05 Kyocera Corporation Method for manufacturing surface acoustic wave apparatus
US9882540B2 (en) 2006-08-07 2018-01-30 Kyocera Corporation Method for manufacturing surface acoustic wave apparatus
JPWO2009001650A1 (en) * 2007-06-28 2010-08-26 京セラ株式会社 Surface acoustic wave device and manufacturing method thereof
JP2012182854A (en) * 2007-06-28 2012-09-20 Kyocera Corp Surface acoustic wave device and manufacturing method thereof
JP5032572B2 (en) * 2007-06-28 2012-09-26 京セラ株式会社 Surface acoustic wave device and manufacturing method thereof
US8299678B2 (en) 2007-06-28 2012-10-30 Kyocera Corporation Surface acoustic wave device and method for production of same
JP2017028543A (en) * 2015-07-23 2017-02-02 株式会社デンソー Elastic surface wave element

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