JPH09163264A - Display device for television signal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display a television signal whose scanning number of lines is nearly twice that of a standard television signal by using a same deflection system while eliminating image quality disturbance attended with display of a television signal with a few scanning line numbers. SOLUTION: A standard television signal received from an input terminal 1 is converted into a display signal whose field frequency and frame frequency are respectively nearly twice those of the standard television signal and whose displayed scanning line number is nearly twice that of the standard television signal by a signal conversion circuit 10. Furthermore, a pulse generating circuit 22 of the signal conversion circuit 10 generates a synchronizing signal with respect to the display signal based on synchronizing information of the standard television signal and the display signal is displayed on a display device 50 by allowing the display device 50 to use a deflection system 42 thereby conducting deflection scanning at a horizontal scanning frequency nearly twice that of the standard television signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device suitable for efficiently displaying a standard television signal such as an NTSC system, or both the standard television signal and a high definition television signal such as a high definition system. Regarding

[0002]

2. Description of the Related Art NT is the conventional television system.
There are standard television systems such as SC system (or ED system and EDII system), PAL (or PAL plus system), SECAM system, etc. In the case of NTSC system, the number of scanning lines per frame is N ₁ = 525 , The field frequency is f _V1 = 59.94 Hz (the frame frequency is f
_V1 / 2 = 29.97 Hz), horizontal scanning frequency is f _H1 = 1
The frequency is set to 5.73 kHz and the aspect ratio is set to 4: 3.

On the other hand, in recent years, with the improvement of the television system, the definition of the image has been improved, and the image quality is dramatically improved by providing the scanning lines which are about twice as many as those of the standard television system. High-definition television systems (HDTV) such as the high-definition system and the ATV system have been proposed, and broadcasting is about to start.

In the case of the high definition system, 1
The number of scanning lines per frame is N ₂ = 1125, the field frequency is f _V2 = 60.0 Hz (therefore, the frame frequency is f _V2 /2=30.0 Hz), and the horizontal scanning frequency is f
_H2 = 33.75 kHz, aspect ratio 16: 9.

For this reason, it is expected that future television systems will coexist with the above-mentioned high-definition television systems having completely different formats in addition to the current standard television systems as described above. It is desirable that the television signal display device and the recording / reproducing device can both selectively display and / or selectively record / reproduce television signals.

[0006] An example of an apparatus that realizes such needs, that is, an apparatus capable of recording and reproducing both types of television signals, has been disclosed by the present inventors in Japanese Patent Laid-Open Publication No.
It is proposed by Japanese Patent No. 334289.

In recent examples, a practical example is shown in a device for selectively displaying a standard television signal as described above and a high definition television signal as described above in a high-definition television receiver or the like. You can

For example, in a television device corresponding to a high-definition signal disclosed in Japanese Patent Laid-Open No. 6-225269, an NTSC signal is non-interlaced by writing twice in one field. Then, although the writing is performed twice in the next field, the scanning lines are scanned so as to alternate with the scanning lines in the previous field. As a result, both the high-definition signal and the NTSC signal can be displayed with a simple structure.

[0009]

However, in the above-mentioned conventional television signal display device for selectively displaying the standard television signal and the high-definition television signal, the signal format (in particular, the horizontal scanning frequency) is different. In order to switch and display the standard television signal as described above and the high-definition television signal as described above, it is necessary to individually operate different deflection systems in these two modes.
It was difficult to reduce the cost of the device.

On the other hand, although the cost of the apparatus is increased, even if the current standard television signal is displayed, only the image quality comparable to the conventional one can be obtained, and the size is increased, the brightness is increased, and the definition is increased (CRT). On the display, various folding interferences such as flicker interference and scanning line interference are conspicuous, and on the contrary, there is a drawback that image quality is deteriorated and cost performance is deteriorated.

Further, as in the conventional example described in Japanese Patent Laid-Open No. 6-225269, in a device for selectively displaying a standard television signal and a high definition television signal in a high-definition television receiver or the like, In spite of using the high-definition television receiver, in the case of the display by the standard television signal, only the conventional image quality is still obtained. Therefore, in a television signal display device using a high-definition television receiver, there is a demand to improve the quality of standard television signals.

An object of the present invention is to solve such a problem and efficiently display both the standard television signal and the high-definition television signal even if the number of scanning lines, the horizontal scanning frequency, the aspect ratio, etc. are different. It is also an object of the present invention to provide a low-cost television signal display device capable of removing various interferences and significantly improving the image quality when displaying a standard television signal.

[0013]

In order to achieve the above object, the present invention is configured as follows.

The field frequency is f _V1 , the number of scanning lines in one frame is N ₁ , and each frame is divided into the first and second two.
It consists of two fields, each of which has N ₁
/ 2 scan lines, and the nth line of the second field is interlaced 2: 1 between the mth line and the (m + 1) th line of the first field. It has a phase relationship and the horizontal scanning frequency is f
_In an apparatus for displaying a television signal of _H1 (= N ₁ × f _V1 / 2), a signal input means for inputting the television signal and the input television signal from the signal input means are supplied at a field frequency f. _V is almost twice the input television signal (f _V ≈2 × f _V1 ), and the number of scanning lines N is close to twice the input television signal within one frame period of the input television signal. It has a value greater than twice and includes four fields of the 1st, 2nd, 3rd and 4th within one frame period, and in each of these fields, the number of scanning lines having a value near N / 4 is set. Have, horizontal scanning frequency f
_H is converted into a display signal having a value in the vicinity of twice or more than twice the input television signal, and the signal based on the m-th line of the first field of the input television signal is converted into the display signal of the display signal. A signal based on the n-th line of the second field of the input television signal, which is associated with the h-th line of the first field and the j-th line of the third field, is transferred to the i-th line of the second field of the display signal. Signal conversion means for converting the line and the kth line of the fourth field, and the display signal from the signal conversion means for the hth line and the (h + 1) th line of the first field Between the second field i
The phase relationship is such that the 2nd line is interlaced approximately 2: 1 (1/2 line offset), and the 4th field is placed between the jth line and the (j + 1) th line of the 3rd field. Has a phase relationship (of 1/2 line offset) such that the k-th line of the frame is interlaced approximately 2: 1, and the third field is for the first field and the fourth field is for the second field. Each approximately 1/4 of the scanning line interval in the vertical direction
Vertically deflected at the field frequency f _V with a phase relationship (of 1/4 line offset) that is shifted by
Display means for displaying the display signal as an image through a deflection system that is horizontally deflected at the horizontal scanning frequency f _H.

Preferably, the display means includes means for offsetting the third and fourth fields by 1/4 line in the vertical lower direction with respect to the first and second fields of the display signal, respectively. H of the first field of the signal
The j-th line of the third field is interlaced between the i-th line of the second field and the i-th line of the second field, and the i-th line of the second field and the (h + 1) -th line of the first field And, the k-th line of the fourth field is interlaced and displayed in a phase relationship.

According to the above configuration, for example, the current NT
In the case of the SC method, the number of scanning lines is N ₁ (= 525), and interlacing is performed between fields so that the scanning line interval is 1 / N.
A television signal of ₁ (= 1/525) is almost twice as many as N scanning lines (N = 1050 or N = 1125).
(In the vicinity), the fields are interlaced, and the scanning line interval is converted into a display signal of 1 / N (= 1/1050 or 1/1125) for display, so that the scanning line structure is difficult to detect, and The scanning line interference is removed, and the image quality is improved such that the image becomes glossy and high image quality can be obtained.

Further, since the frame repetition frequency and the field repetition frequency are converted to double (f _V ≈120 Hz) and displayed, line flicker and frame period flicker interference due to movement, which are conspicuous in the past, are suppressed. The flicker interference of the field period, which was noticeable in a large area of the image, is also removed, and a visually stable image can be obtained.

Further, a kind of wobbling effect can be obtained by displaying the 1/4 line offset phase relationship as described above between the first to fourth fields.
Line crawling (a phenomenon in which a scanning line flickers while scrolling on the screen), which was conspicuous in the conventional 2: 1 interlaced scanning method between two fields, is significantly reduced visually, which is in line with the effect of reducing line flicker. I am afraid
A stable image without flicker can be obtained.

As described above, since the number of scanning lines is converted to be approximately doubled and displayed, the horizontal scanning frequency f _H is almost the same as the horizontal scanning frequency f _H2 of the above high definition television signal (N = 1125). In the case of f _H = 33.72 kHz),
A value close to that (for N = 1050, f _H = 31.47)
Since the deflection system of the television receiver can be commonly used for displaying a standard television signal and for displaying a high definition television signal, the cost of the device can be easily reduced.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings as an application to a device for selectively displaying a video signal of a standard television system and a video signal of a high definition television system.

FIG. 1 is a block diagram showing an embodiment of a display device for a television signal according to the present invention, in which 1 is an input terminal of a video signal of a standard television system and 2-4 are high definition television (HDTV). ) System video signal input terminal, 8 mode input signal M input terminal, 10 signal conversion circuit, 11 Y / C (luminance / chroma) separation circuit, 12 color decoding circuit, 13 to 15 A / D (analog / digital) conversion circuit, 16 to 18 are memories, 19 is a signal processing circuit, 21 is a sync separation circuit, 22 is a pulse generation circuit,
23 is a write control circuit, 24 is a read control circuit, and 25-27.
Is a D / A (digital / analog) conversion circuit, 20 is a signal switching circuit, 31 is a sync separation circuit, 32 is a pulse generation circuit, 41 is a deflection switching circuit, and 42 is a deflection circuit including a vertical deflection circuit and a horizontal deflection circuit. , 50 are display devices such as cathode ray tubes.

Here, the video signal of the standard television system is such that the number of scanning lines (lines) N ₁ = 525, field frequency f _V1 = 59.94 Hz, frame frequency f _V1 / 2.
= 29.97 Hz, horizontal scanning frequency f _H1 = 15.73 k
Hz, interlace ratio 2: 1, aspect ratio 4: 3 composite NTSC signal (hereinafter referred to as standard NT
SC signal), and the video signal of the high-definition television system, the number of scanning lines (lines) N ₂ = 1125,
Field frequency f _V2 = 60.0 Hz, frame frequency f _V2 /2=30.0 Hz, horizontal scanning frequency f _H2 = 33.
75 kHz, interlace ratio 2: 1, aspect ratio 1
It is a high-definition signal in the component format of 6: 9 (hereinafter referred to as HD signal).

In FIG. 1, a standard NT is input from the input terminal 1.
The SC signal is input and supplied to the signal conversion circuit 10.
Since this input standard NTSC signal is a composite format, a carrier color signal (chroma signal) C, which is obtained by quadrature modulation and multiplexing two color difference signals (RY) and (BY), is converted into a luminance signal Y. It is frequency-multiplexed.

HD signals are input in component form from the input terminals 2 to 4 and are supplied to a signal switching circuit 20 having a matrix circuit. The HD signal includes a luminance signal Y2 and two color difference signals Pb and Pr.

The signal conversion circuit 10 includes a Y / C separation circuit 11
And color decoding circuit 12, A / D conversion circuits 13 to 15, memories 16 to 18, signal processing circuit 19, sync separation circuit 2
1, a pulse generation circuit 22, a write control circuit 23, a read control circuit 24, and D / A conversion circuits 25 to 27. The supplied input standard NTSC signal is used as a luminance signal Y and two color difference signals ( B-Y, R-Y), the number of scanning lines N is converted for each component signal, and the component signals of the luminance signal Y1 and the color difference signals C1 and C2 are output to output the signal switching circuit 20. Supply to.

A mode designating signal M designating a display mode is input from the input terminal 8. This mode designation signal M
Is appropriately generated in the television receiver, for example, by a user selecting an operation button or the like provided outside the television receiver for setting a display mode, which is not shown.

Here, as the display mode, there are two modes, for example, a standard mode (M1) for displaying an image by a standard television signal and a high definition mode (M2) for displaying a high definition television signal. , The same television set can be selectively displayed in any one of these modes.

First, the operation of this embodiment when displaying an image by an HD signal will be described.

H input from each of the input terminals 2, 3 and 4
The component signals Y2, Pb, Pr of the D signal are supplied to the signal switching circuit 20, and when the high definition mode M2 is instructed by the mode designation signal M from the input terminal 8,
In the signal switching circuit 20, these component signals Y2, Pb, Pr are selectively switched and appropriately matrix-operated to generate the three primary color signals R, which are high definition television signals.
G and B are decoded.

On the other hand, the sync information included in the luminance signal Y2 of the HD signal input from the input terminal 2 is the sync separation circuit 31.
And the sync signal SY2 based on this sync information is output and supplied to the pulse generation circuit 32. The synchronizing signal SY2 includes a vertical synchronizing signal VS2 having a frequency f _V2 = 60.0 Hz and a horizontal synchronizing signal HS2 having a frequency f _H2 = 33.75 kHz. In the pulse generation circuit 32, the vertical deflection pulse VD2 is generated based on the vertical synchronization signal VS2, and the horizontal deflection pulse HD2 is generated based on the horizontal synchronization signal HS2. These deflection pulses VD
2 and HD2 are supplied to the deflection switching circuit 41, and these deflection pulses VD2 and HD2 are selectively switched by the mode designation signal M and supplied to the deflection system 42.

By the above operation, the three primary color signals R, G, B of the HD signal from the signal switching circuit 20 are supplied to the display unit 50, and the deflection pulse V of the HD signal from the deflection switching circuit 41 is supplied.
The frequency f is generated by the deflection system 42 by D2 and HD2.
Vertical deflection of _V2 = 60.0 Hz and frequency f _H2 = 33.75
Horizontal deflection of kHz is performed and a color image of the HD signal is displayed on the display device 50.

Next, the operation of this embodiment when displaying an image based on the standard NTSC signal will be described.

In the signal conversion circuit 10, the composite standard NTSC signal (input standard NTSC signal) input from the input terminal 1 is supplied to the Y / C separation circuit 11 and separated into a luminance signal Y and a carrier color signal C. To be done. Y / C
The luminance signal Y output from the separation circuit 11 is converted into a digital signal by the A / D conversion circuit 13. Further, the carrier color signal C output from the Y / C separation circuit 11 is decoded by the color decoding circuit 12 into two color difference signals (BY) and (RY), and the A / D conversion circuits 14 and 15 respectively. Is converted into a digital signal by.

The input standard NTSC signal from the input terminal 1 is also supplied to the sync separation circuit 21 to separate the sync information contained in the input standard NTSC signal from the burst information of the color subcarrier, and the sync information. Based on the burst information BS based on the burst information.
1 is generated and supplied to the pulse generation circuit 22.
The synchronizing signal SY1 includes a vertical synchronizing signal VS1 having a frequency f _V1 = 59.94 Hz and a horizontal synchronizing signal HS1 having a frequency f _H1 = 15.73 kHz, and a burst signal BS1.
Is a frequency equal to the color subcarrier frequency fsc = 3.58M
Has Hz.

The pulse generation circuit 22 is a PLL (Phase
A locked loop) circuit, and the first PLL circuit allows the frequency f _W to be generated based on the burst signal BS1.
However, for example, the write clock signal WCP of f _W = 4 × fsc = 14.32 MHz is generated. The write clock signal WCP has a frequency f _W = 910 × f _H1 (= 1
(4.32 MHz), the frequency f
_It may be generated based on the horizontal synchronizing signal HS1 of _H1 . Further, in the first PLL circuit, the color subcarrier signal SC which is continuous at the same frequency as the burst signal BS1
Is generated. The color subcarrier signal SC is supplied to the color decoding circuit 12 and used for decoding the carrier color signal C.

In the pulse generation circuit 22, the second P
With the LL circuit, based on the vertical synchronizing signal VS1, the frequency f _V is, for example, f _V ≈2 × f _V1 = 119.88 Hz double speed vertical synchronizing signal VD1 and frequency f _H = (1050 /
2) × f _V1 = 31.47 kHz double speed horizontal sync signal HD
1 and are generated.

Further, in the pulse generating circuit 22, the frequency f _R is, for example, f _R = 910 × f _H = 28.n, based on the double speed horizontal synchronizing signal HD1 by the third PLL circuit.
A read clock signal RCP of 64 MHz is generated.

The read clock signal RCP has a frequency f _R = (1050/525) × f _W (= 28.64M
Since the frequency relationship of (Hz) is established, it may be generated based on the write clock signal WCP of the frequency f _W , or the frequency f _R = (4 × 1050/5
25) × fsc (= 28.64 MHz) since the frequency relationship is established, it may be generated based on the burst signal BS1 (or the color subcarrier signal SC) of the frequency fsc. _R = (910 x 10
Since the frequency relationship of 50/525) × f _H1 (= 28.64 MHz) is established, the horizontal synchronization signal H of frequency f _H1
It may be generated based on S1 or the frequency f
_R = (1050 × 455) × f _V1 (= 28.64 MH
Since the frequency relationship of z) is established, it may be generated based on the vertical synchronization signal VS1 of the frequency f _V1 .

The double speed vertical synchronizing signal VD1 and the double speed horizontal synchronizing signal HD1 are supplied to the deflection switching circuit 41 as a vertical deflection pulse and a horizontal deflection pulse for displaying a standard NTSC signal, respectively.

The write clock WCP output from the pulse generation circuit 22 is used as an A / D conversion clock for A / D conversion.
It is supplied to the conversion circuits 13, 14 and 15 and is used to convert the analog luminance signal Y and the two color difference signals (BY) and (RY) into digital signals, respectively. The write clock WCP is also supplied to the write control circuit 23, and the memories 16 and 1 are supplied based on the write clock WCP.
Writing to 7 and 18 is controlled respectively, and the A / D conversion circuit 1
Digitized luminance signals from 3, 14, 15 and 2
The two color difference signals are sequentially written in the memories 16, 17, and 18, respectively.

Normally, the color difference signals (BY), (R-
Since the occupied frequency band of Y) is narrower than that of the luminance signal Y (for example, it has an occupied band of 1/4), the A of color difference signals (BY) and (RY) is changed according to the band ratio. The / D conversion clock and the write clock to the memories 17 and 18 may be configured to give the luminance signal Y at a frequency lower than that of the memory 16 (for example, a frequency of f _W / 4). In this embodiment, in order to simplify the description, all clocks WCP having the same frequency are used.

Writing to the memories 16, 17 and 18 is performed line by line for each field of the input standard NTSC signal. In order to control writing in units of lines for each field, the horizontal synchronizing signal HS1 is output from the pulse generating circuit 22.
And the vertical synchronizing signal VS1 are appropriately supplied to the write control circuit 23.

The read clock RCP generated by the pulse generation circuit 22 is supplied to the read control circuit 24. Based on the read clock RCP, the luminance signal Y and the color difference signals (BY) from the memories 16, 17, and 18 are supplied. The reading with (RY) is controlled respectively, and the luminance signal Y and the color difference signals (BY), (RY) written in the memories 16, 17, and 18 are controlled.
Y) is sequentially read line by line for each field. For this line-by-line read control for each field, the pulse generation circuit 22 appropriately supplies the double-speed horizontal synchronizing signal HD1 and the double-speed vertical synchronizing signal VD1 to the read control circuit 24.

Here, the frequency ratio between the write clock WCP and the read clock RCP is given by the following equation (1).

F _R / f _W = 1050/525 = 2.0 (1) Therefore, the input standard NTS is input from the memories 16, 17, and 18.
The luminance signal Y and the color difference signals (BY) and (RY) of a signal obtained by time-compressing the C signal by 1/2 on the time axis (hereinafter, referred to as a double speed NTSC signal) are output and their horizontal levels are output. The scanning frequency is the frequency f _H of the double speed horizontal synchronizing signal HD1 =
(1050/525) × f _H1 = 31.47 kHz. As a result, the ratio with the original horizontal scanning frequency f _H1 is doubled as shown in the following equation (2).

F _H / f _H1 = 1050/525 = 2.0 (2) The luminance signal Y and the color difference signal (BY) of the digital double speed NTSC signal read from the memories 16, 17, and 18.
(RY) is subjected to signal processing in the signal processing circuit 19 as needed, and then D / A conversion circuits 25, 26, 27.
Is converted into an analog signal by a double speed luminance signal Y1 and a double speed color difference signal C which are the components of the double speed NTSC signal.
1 and C2 are supplied to the signal switching circuit 20.

At this time, when the standard mode M1 is set by the mode command signal M from the input terminal 8, the signal switching circuit 20 outputs the double speed N from the signal conversion circuit 10.
The component signals Y1, C1, C2 of the TSC signal are selected, and these are appropriately matrix-calculated to decode the three primary color signals R, G, B based on the double speed NTSC signal.

On the other hand, in the deflection switching circuit 41, the vertical deflection pulse VD1 and the horizontal deflection pulse HD1 from the pulse generation circuit 22 are sent to the standard mode M1 by the mode command signal M.
Is selected and supplied to the deflection system 42.

Therefore, the signal switching circuit 20 outputs the double speed NTS.
The three primary color signals R, G, B based on the C signal are supplied to the display device 50, and the deflection system 42 causes the frequency f _V ≈11.
The vertical deflection of 9.88 Hz and the horizontal deflection of f _H = 31.47 kHz are performed, and the color image of the standard NTSC signal is displayed on the display 50 at double speed.

FIG. 2 shows the memory 1 in the standard mode M1.
6 is a diagram showing signal read timings of 6, 17, and 18, and FIG. 3 is a diagram showing a structure of scanning lines between fields of an input standard NTSC signal and a double speed NTSC signal.

Hereinafter, referring to FIGS. 2 and 3, the memory 16,
A method of reading each signal from 17, 18 will be described.

FIG. 2A shows one frame period of the input standard NTSC signal, and the frame period is shown divided into lines, and the number in each division represents a line number. Further, FIG. 3A shows the input standard NT.
It shows the line structure of the SC signal.

FIG. 2B shows one frame period of the double speed NTSC signal output from the signal conversion circuit 10 (FIG. 1), and the frame period is shown divided into lines. The numbers inside represent the line numbers. Further, FIG. 3B shows the line structure of the double speed NTSC signal.

The input standard NTSC signal has one frame period (1/30) as shown in FIGS. 2 (a) and 3 (a).
Second) consists of 2 fields and the number of lines (number of scanning lines) N
₁ = 525 lines, 1 field period (1/60 seconds)
The number of lines is 262.5. That is, standard NTSC
In the first field of the signal, the first line (line #
One. The same applies to the following) ~ The first half of line # 263 is included, and in the next second field, the second half of line # 263 ~
Line # 525 is included.

On the other hand, the double speed NTSC signal is obtained by compressing the input standard NTSC signal by 1/2 in the time axis. Therefore, as shown in FIGS. 2 (b) and 3 (b), one frame period (1/30 seconds) consists of 4 fields (1 field period is 1/120 seconds), and the number of lines in one field period is 262.5 on average. Therefore, the number of lines N in one frame period is N = 262.5 × 4 = 105
There are zero.

More specifically, as shown in FIG. 2B, in the first field period of the double speed NTSC signal, the signals in the first half of the line # 1 to line # 263 of the first field of the input standard NTSC signal are changed. The signals are read from the memories 16 to 18 at double speed and output as the first half signals of the lines # 1 to # 263, and in the subsequent second field period, the line # 263 of the second field of the input standard NTSC signal is read. The signal from the latter half to line # 525 in the 3/4 period is read at double speed, and the latter half of line # 263 to line # 263 is read.
It is output as a signal for a period of 3/4 of 525. Furthermore, in the next third field period, the input standard NTSC
Signal line # 525 remaining 1/4 period to input standard N
1 of line # 263 of the same first field of TSC signal
After the signal of the period of / 4 is read from the memories 16 to 18 at the double speed and after the remaining period of ¼ of the line # 525,
The signal is output as a signal in the period of line # 1 'to line # 263' (line # 526 to line # 788 by serial number), and in the following fourth field period, the rest of line # 263 of the input standard NTSC signal. 3/4 period ~
The signal on line # 525 is read at double speed and
Line # 264 'after remaining 3/4 of 263
~ Line # 525 '(serial number of line # 789 to line # 1050) is output as a signal.

As described above, in the double speed NTSC signal, the boundary between the first field and the second field, the second field
At the boundary between the field and the third field, and at the boundary between the third field and the fourth field, there are signals of 1/2 line period, 1/4 line period, and 3/4 line period. Since it is inside, it is not displayed on the screen, so it is not a problem. Also from this,
During these periods, the so-called blanking period may be formed by temporarily suspending the signal reading of the memories 16-18.

As described above, the above-described control of the line-by-line reading and the inter-field reading from the memories 16, 17, and 18 is performed by the double speed horizontal synchronizing signal HD1 and the double speed vertical synchronizing signal VD1 generated by the pulse generating circuit 22. Since it is performed based on the above, the desired double speed NT as shown in FIG.
The SC signal can be reliably obtained.

A concrete example of the double speed horizontal synchronizing signal HD1 is shown in FIG. 2 (c), and a concrete example of the double speed vertical synchronizing signal VD1 is shown in FIG. 2 (d). The double speed vertical synchronizing signal VD1 has a cycle corresponding to approximately 262.5 lines in the first field, approximately 262.25 lines in the second field, and approximately 26 in the third field, as shown in the figure.
2.5 lines, approximately 262.7 in the 4th field
Although the period is not constant in each field such as having a period corresponding to 5 lines, it has a constant period T _F corresponding to 1050 lines in one frame period.

From the above, between the horizontal scanning frequency f _H , the frame vertical scanning frequency f _F (= 1 / T _F ) and the field vertical scanning frequency f _V of the double speed NTSC signal in this embodiment, Generally, the following relational expression (3) is established, where N is the number of scanning lines (lines) in one frame period.

_{F H} = N × f _F f _F = f _V1 / 2 f _V ≈4 × f _F = 2 × f _V1 (3) For the above double speed NTSC signal, the display 50 (FIG. 1) In FIG. 3, when the deflection system 42 (FIG. 1) performs deflection scanning based on the above double speed horizontal synchronizing signal HD1 and double speed vertical synchronizing signal VD1, a scanning line structure as shown in FIG. 3B is obtained.

Generally, in the image of the input standard NTSC signal, as shown in FIG. 3A, the second field is inserted between the m-th line #m and the (m + 1) -th line # (m + 1) of the first field. Nth line #n of is interlaced 2: 1. That is, each line of the second field has a phase relationship in which it is vertically displaced by ½ of the line interval L with respect to each line of the first field, and this is called a ½ line offset.

On the other hand, in the case of the double speed NTSC signal, as shown in FIG. 3B, the signal based on the m-th line #m in the first field of the input standard NTSC signal is N.
The h-th line #h of the first field of the TSC double speed signal
The signal based on the nth line #n of the second field of the input standard NTSC signal is displayed as
It is displayed as a signal of the i-th line #i of the second field of the SC signal, and is displayed between the line #h and the line # (h + 1) of the first field of the double speed NTSC signal. Line #i is 2: 1
The phase relationship is interlaced with each other (that is, the phase relationship of 1/2 line offset).

Subsequently, the signal based on the line #m of the first field of the input standard NTSC signal is displayed as the signal of the line #j of the third field of the double speed NTSC signal, and the line # of the second field of the input standard NTSC signal is displayed. The signal based on n is displayed as a signal of line #k of the fourth field of the double speed NTSC signal, and lines #j and # (j + 1) of the third field of the double speed NTSC signal are displayed.
Line # of 4th field of double speed NTSC signal between
The phase relationship is such that k is interlaced at 2: 1 (that is, 1/2 line offset).

Further, the phase relationship is such that the line #h of the first field of the double speed NTSC signal and the line #i of the second field are interlaced with the line #j of the third field of the double speed NTSC signal. However, since this vertical shift is 1/4 of the line interval L, this is 1
This is called / 4 line offset. Similarly, double speed NTSC
The line #k of the fourth field of the double speed NTSC signal is interlaced (that is, 1/4 line offset) between the line #i of the second field of the signal and the line # (h + 1) of the first field. There is a phase relationship.

As described above, in this embodiment, the first field and the second field and the third field and the fourth field have a phase relationship of ½ line offset with each other, respectively. The phase relationship is such that the third and fourth fields are offset by ¼ line in the vertical direction (vertical lower direction in this embodiment) with respect to the first and second fields, respectively.

By the way, the scanning line structure of the standard NTSC signal is, as shown in FIG. 3A, offset by ½ line in the vertical direction during one field of 1/60 seconds and becomes 2
Since the interlaced scanning structure is completed in the field, the scanning line interval in the vertical direction is L / 2 = 1 /
525.

On the other hand, in the scanning line structure of the double speed NTSC signal, as shown in FIG. 3B, a 1/4 line offset is made in the vertical direction between fields of 1/60 second, and
Since the scanning structure is completed in four fields of / 120 seconds, the vertical scanning line interval is L / 4 = 1/1.
It is 050, and it can be seen that the scanning line interval is reduced to 1/2 as compared with the case of the standard NTSC signal.

The scanning line conversion in this embodiment provides a function of a kind of temporal filter which doubles the number of field repetitions and the number of frame repetitions per frame while interpolating fields and frames in the time direction. And, in addition, vertically between its frames (in this embodiment,
(Below the vertical)
This brings about the effect of a vertical filter that doubles the number of lines per frame for display.

By the action of the time filter, interference such as line flicker, which has been a problem in the conventional standard NTSC signal image display, is eliminated, and a high image quality similar to progressive scanning can be obtained.

Further, when a still image is displayed in a frame as a moving image with movement between fields, flicker in the moving portion has been a problem in the past. Since the flicker of the cycle can be completely removed, it is possible to display the flicker even in the moving part without causing any flicker. Can be held.

Further, in the conventional standard NTSC signal, line crawling and scanning line interference associated with interlacing are major factors that deteriorate image quality. In this embodiment, however, the vertical filter by the above scanning line interpolation is used. By the action and the wobbling action by the 1/4 line offset, the influence of the line crawling is significantly reduced visually, and moreover, since the number of scanning lines is displayed as an image twice, the structure of the scanning lines becomes almost inconspicuous. , You can get very smooth and glossy high image quality as a whole.

In this embodiment, the interpolation of scanning lines is performed vertically downward, but the present invention is not limited to this, and interpolation may be performed vertically upward. However, in this case, in FIG. 3B, the line # (i-1) of the second field of the double speed NTSC signal is used.
And the line #h of the first field, the line #h of the third field of the double speed NTSC signal is interlaced (1 /
4 lines offset), and the line #k of the fourth field of the double speed NTSC signal is interlaced (1/4 line) between the line #h of the first field and the line #i of the second field of the double speed NTSC signal. Offset).

The phase relationship (line offset) of the vertical scanning between the fields is such that the double speed vertical synchronizing signal V
This can be easily achieved by adjusting the phase of each field of D1, but a specific example will be described later with reference to FIG.

In this embodiment, as long as the above-mentioned effects are brought about, for example, a process for further improving the image quality by the signal processing circuit 19 in FIG. 1, for example, an enhancement (that enhances the response in the horizontal direction or the vertical direction) It is also possible to perform contour enhancement processing or noise reduction processing for removing noise. These processes are effective in further improving the image quality and are within the scope of the present invention.

Further, in this embodiment, the signal processing circuit 19 may be configured to perform the next signal processing as shown by the arrow in FIG. 3 (b).

That is, as the first signal processing, FIG.
In (b), line #h (ie,
Line #m of the first field of the input standard NTSC signal)
And the line #i of the second field (that is, the input standard NTS
The signal obtained by adding and averaging the signal of the C signal with the line #n) of the second field at an arbitrary ratio a: b is interpolated as the line #j of the third field, and then the line # of the second field i (that is, line #n of the second field of the input standard NTSC signal) and line # (h + 1) of the first field of the next frame (that is, line # (the line # of the first field of the next frame of the input standard NTSC signal) m +
1)) and the signal obtained by averaging the signals at the ratio of a: b are interpolated as the line #k of the fourth field. The ratio of this averaging may be arbitrary,
For example, a = b = 1/2, and 1/2: 1/2 may be added and averaged.

Alternatively, as the second signal processing, a signal difference between fields (for example, a signal difference between the first field and the second field, or a signal difference between the second field and the first field of the next frame). , Or the motion of the image based on the signal difference between the frames (for example, the signal difference between the first field and the first field of the next frame, or the signal difference between the second field and the second field of the next frame). For the still image portion in which the motion is detected and the motion is not detected, the line #h of the first field (that is, the line #m of the first field of the input standard NTSC signal) is set to the third line, as in this embodiment. The line #j of the field is interpolated or the line #i of the second field (that is, the line #n of the second field of the input standard NTSC signal) is used as the first line. Configured to interpolate a field of a line #k.

For the moving image part where motion is detected, the second
Line #i of the field (that is, line #n of the second field of the input standard NTSC signal) is interpolated as line #j of the third field, and line # (h + 1) of the first field of the next frame (that is, input Line # (m + 1) of the first field of the next frame of the standard NTSC signal)
Is interpolated as line #k of the fourth field.

In the above motion detection, the band is appropriately limited by a filter to prevent erroneous motion detection due to noise or the like.

Alternatively, as the third signal processing, the line #h of the first field (that is, the line #m of the first field of the input standard NTSC signal) is set to the first line #h for the still image portion in which no motion is detected. Interpolated as line #j of 3 fields, or line #i of 2nd field
(That is, the line #n of the second field of the input standard NTSC signal) is interpolated as the line #k of the fourth field.

For the moving image part in which the motion is detected, line #h in the first field (that is, input standard NT
Line #m of the first field of the SC signal and line #i of the second field (that is, the second line of the input standard NTSC signal)
The signal obtained by adding and averaging the signal with the field line #n) at the ratio a: b is interpolated as the third field line #j, or the second field line #i is used.
(That is, line #n of the second field of the input standard NTSC signal) and line # of the first field of the next frame
(H + 1) (that is, line # (m + 1) of the first field of the next frame of the input standard NTSC signal) is added and averaged at a ratio of a: b to obtain a signal of line #k of the fourth field. It is configured to interpolate as.

With the above structure, the effect of preventing the resolution of the moving image portion from being lowered can be obtained, which is effective in further improving the image quality and falls within the scope of the present invention.

FIG. 4 shows an input standard NTSC signal and a double speed NTS signal.
It is the figure which compared the difference of the image quality with C signal with the two-dimensional spectrum, and the horizontal axis represents the time frequency (λ) and the vertical axis represents the vertical spatial frequency (ν), respectively. Shows the two-dimensional spectrum of the input standard NTSC signal, and FIG. 11B shows the two-dimensional spectrum of the double speed NTSC signal.

As is apparent from FIG. 4 (a), standard NT
In the SC signal, scan line interference (disturbance in which the scan line structure is visible) is caused by the spectrum appearing at (λ, ν) = (0,525).
Occurs, and the spectrum appearing at (60,0) causes flicker interference (interference that causes flicker in a large area), and further, interference by the spectrum at (30,525 / 2) and near (30,0) occurs. It can be seen that various image quality deteriorations such as folding back (line flicker and motion flicker) occur.

On the other hand, in the double speed NTSC signal, as shown in FIG.
As is clear from (b), since the spectrum of (0,525) is extinguished, the above-mentioned scanning line interference is removed and the scanning lines become inconspicuous, and the image quality becomes glossy and the texture is enhanced. The improvement effect can be obtained.

Further, since the spectrum of (60,0) is also extinguished, the above-mentioned flicker interference is removed and flicker is eliminated, and a visually stable image can be obtained.

Furthermore, since the above-mentioned time filter action suppresses the interference due to the spectrum of (30,525 / 2) and the interference returning to the vicinity of (30,0),
Line flicker is improved and flicker interference in the frame cycle is suppressed, and frame still images can be displayed without flicker even for moving images. A high-value television receiver can be provided.

Further, as is clear from the explanation of the operation in FIG. 1, even when the standard television signal is displayed, the same deflection as when the high definition television signal is displayed on the display unit 50 is performed. The deflection system 42 can be easily shared by both, and the cost of the device can be reduced.

FIG. 5 is a block diagram showing a specific example of the PLL circuit used in the pulse generation circuit 22 of FIG.
FIG. 1A shows the first PLL circuit, and FIG. 1B.
Shows the second and third PLL circuits.

In FIG. 9A, 101 is an input terminal for the burst signal BS1, 102 is an output terminal for the write clock signal WCP, 103 is an output terminal for the color subcarrier signal SC, 111 is a phase comparator, and 112 is a phase comparator. Is 14.32 MHz
The first voltage controlled oscillator that oscillates at, 113 is a frequency divider, 1
Reference numeral 14 is a phase adjuster, and in FIG.
Is an input terminal for the vertical synchronizing signal VS1, 202 is an output terminal for the double speed vertical synchronizing signal VD1, and 203 is a double speed horizontal synchronizing signal H.
An output terminal of D1, 211 is a phase comparator, 212 is a second voltage controlled oscillator having a center frequency of 125.87 kHz, 21
3, 214 is a frequency divider, 215 is a phase adjuster, 216 is a frequency divider, 217 is a phase adjuster, 302 is a read clock signal RCP output terminal, 311 is a phase comparator, 312 is a center frequency of 28.64 MHz. A third voltage controlled oscillator, 31
3 is a frequency divider.

First, the first PLL circuit shown in FIG. 4A will be described.

The output signal of the first voltage controlled oscillator 112 is frequency-divided by the frequency divider 113, and then the phase comparator 111.
Then, the phase is compared with the burst signal BS1 from the input terminal 101, and the first voltage controlled oscillator 112 is voltage-controlled by the comparison output of the phase comparator 111. As a result, the write clock signal W which is phase-locked from the first voltage controlled oscillator 112 at the frequency f _W = 4 × f _SC to the burst signal BS1.
The CP is generated and output from the output terminal 102.

Further, a continuous signal of frequency f _SC is obtained from the frequency divider 113, and this continuous signal is phase-synchronized with the burst signal BS1 from the input terminal 101 by the phase adjuster 114, and the phase is adjusted appropriately. Then, the color subcarrier signal SC is output from the output terminal 103.

Next, the second and third PLs shown in FIG.
The L circuit will be described.

The second PLL circuit comprises a second voltage controlled oscillator 212, a frequency divider 113 and a phase comparator 211, and a third PLL circuit comprises a third voltage controlled oscillator 312 and a frequency divider 313. It is composed of a phase comparator 311.

First, in the second PLL circuit, the output signal of the second voltage controlled oscillator 212 oscillating at the center frequency of 125.87 kHz is frequency-divided by the frequency divider 213 by 1050 and further divided by 2 by the frequency divider 214. After the frequency division, the phase comparator 211 compares the phase with the vertical synchronizing signal VS1 input from the input terminal 201, and the comparison output of the phase comparator 211 controls the voltage of the second voltage controlled oscillator 212. As a result, the second voltage controlled oscillator 212 generates a signal having a frequency of 4 × f _H and being phase-synchronized with the vertical synchronizing signal VS1. Therefore, the frequency divider 213 generates a signal having a frequency of 4 × f _H /1050=119.88 Hz, and this signal is phase-synchronized with the vertical synchronizing signal VS1 from the input terminal 201 by the phase adjuster 215. , And the phase is adjusted appropriately, and the output terminal 202 is output as the double speed vertical synchronization signal VD1 at the timing shown in FIG.
Output from

This double speed vertical synchronizing signal VD1 is shown in FIG.
In order to obtain the scanning line structure (that is, the interlaced phase relationship) as shown in (b), the phases are individually adjusted in the first to fourth fields within one frame period as shown below. It is generated based on the pulse signal.

That is, in this phase adjuster 215, as shown in FIG. 2D, the pulse signal of the first phase (in the first field) of the double speed NTSC signal, for example, at the position of line # 1 is transmitted. 0.5 H (H) at the position of the line # 263 (at the boundary between the first field and the second field), which is generated by using the first phase as a reference (that phase is 0).
Is a period of one line) and a second pulse signal having a phase in the vicinity of
Line # (at the boundary between the 2nd and 3rd fields)
A third pulse signal having a phase near 0.75H at the position of 525 and a fourth pulse signal having a phase near 0.25H at the position of the line # 788 (at the boundary between the third field and the fourth field) are generated. They are respectively generated, and these are output from the output terminal 202 as the double speed vertical synchronization signal VD1.

On the other hand, the output signal of the second voltage controlled oscillator 212 is also supplied to the frequency divider 216 and divided by four. Therefore, the frequency divider 216 generates a signal of frequency f _H , that is, the double speed horizontal synchronization signal HD1, and the double speed horizontal synchronization signal HD1 is output by the phase adjuster 217 to the first phase from the phase adjuster 215. Synchronized with the pulse signal of
And the phase is adjusted appropriately and the signal is output from the output terminal 203.

Next, in the third PLL circuit, the output signal of the third voltage controlled oscillator 312 having the center frequency of 28.64 MHz is divided by the frequency divider 313 by 910 and then divided by the phase comparator 311. The output signal of the comparator 216 is phase-compared, and the comparison output of the phase comparator 311 controls the voltage of the third voltage-controlled oscillator 312. As a result, the third
From the voltage controlled oscillator 312 of frequency f _R = 910 ×
The read clock signal RCP synchronized with the double speed horizontal synchronizing signal HD1 of f _H is generated and output from the output terminal 302.

As described above, in this embodiment,
The number N of scanning lines (lines) of the double speed NTSC signal is N = 105.
However, the present invention is not limited to this. In the present invention, the scanning line number N of the double speed NTSC signal is 2 which is the scanning line number N ₁ of the input standard NTSC signal.
It may be any integer in the vicinity of double, but in particular, in FIG.
In the case of vertically downward interpolation as shown in (b), N = 4M + 2 (N = 1050 or 1126 etc.) is selected for an arbitrary integer M, or in the case of vertically upward interpolation described above, N is selected. = 4M (N = 1048 or 1124, etc.), the double-speed vertical synchronization signal V
Since the period variation width in each field of D1 can be minimized, it is possible to reduce the influence of the phase adjustment by the phase adjuster 215 and the variation of the television receiver.

Further, as another embodiment, for example, in FIG. 1, the number of scanning lines N ₁ = 525 standard TV signals is doubled, and the number of scanning lines N of high-definition television signals having a value close to twice that is _It is also possible to set the number of scanning lines N = 1125, which is the same as that of _2, and to display after converting to 1125 double-speed television signals per frame. In this case, the number of scanning lines is increased from 1050 to 1125, but the incremented 75 lines are interpolated as a blanking period (for example, a vertical blanking period) which is a signalless period, and It may be displayed. The frame vertical scanning frequency f _F obtained in this case is given as f _F = 29.97 Hz, which is the same as the above, but the horizontal scanning frequency f _H is f _H = 33.7 from the above equation (3).
It becomes as large as 2 kHz, and can be made almost the same value as the horizontal scanning frequency f _H2 = 33.75 kHz of the high-definition television signal, and the matching between both can be further enhanced.

As in this embodiment, the aspect ratio of the original television signal is 4: 3 and the number of scanning lines is the original 2.
Assuming that an image is displayed on the display unit 50 having an aspect ratio of 4: 3 by the double-speed television signal converted so as to exceed double, as shown in FIG. 6A, the screen is displayed in accordance with the increment of the scanning line. The upper and lower parts are cut off so that a non-display area appears, and the displayed figure is distorted vertically.

In order to eliminate such distortion, for example, as shown in FIG.
The deflection system 42 in FIG. 6 performs a deflection (so-called overscan) such that the displayed figure is expanded vertically from the center of the screen (so-called overscan), so that no figure distortion occurs as shown in FIG. 6B. You can reproduce a faithful image with.

Alternatively, instead of interpolating the increased 75 lines as the blanking period, in FIG. 1, the signal processing of the component signals from the memories 16 to 18 by the signal processing circuit 19 causes the vertical direction. By performing the line interpolation processing for enlarging, it is possible not only to eliminate the graphic distortion but also to prevent the vertical resolution from being lowered.

Similarly, when an image is displayed on the display 50 having an aspect ratio of 16: 9 by this double speed television signal, the upper and lower parts of the screen are missing and the non-display portion is displayed as shown in FIG. 6C. On top of appearing, the displayed figure is distorted to the left and right.

Needless to say, in order to eliminate the upper and lower non-display portions (blanking portions), the above-described vertical expanding deflection or the above-mentioned signal processing is effective. By the deflection system 42, for example, the display figure is enlarged vertically from the center of the display screen in the vertical direction, while the display figure is reduced horizontally in the horizontal direction. As shown, the upper and lower non-display portions can be eliminated, and the distortion of the figure in both the vertical and horizontal directions can be reduced. Further, in FIG.
By the signal processing in the signal processing circuit 19 of the component signals from the memories 16 to 18, line interpolation processing for expanding the display figure in the vertical direction is performed, and at the same time, the display figure is compressed in the horizontal direction. By performing such a time axis process, it is possible not only to eliminate the above graphic distortion but also to prevent the vertical resolution from decreasing.

Further, as shown in FIG. 7 (a), a so-called letterbox format, which is currently being considered in the ED system and the EDII system conforming to the standard television system with an aspect ratio of 4: 3, is used. Aspect ratio 16:
Needless to say, the present invention can be applied to the case of displaying 9 wide images.

That is, the number of lines N _{0 of the} effective portion (excluding the non-displayed portion) of the wide image of the letterbox format such as the ED system and the EDII system in which the number of scanning lines N ₁ is 525.
Is given by 525.times.3 / 4.apprxeq.390 lines, but when the present invention is applied to this, the number of lines of the effective portion can be doubled to be displayed at about 780 lines. When the vertical deflection enlargement by the above-mentioned overscan is applied to this, as shown in FIG. 7B, a wide screen having an aspect ratio of 16: 9 in which the non-display image portion does not appear on the display screen can be obtained. Alternatively, the signal processing in the signal processing circuit 19 described above is further added thereto to perform line interpolation processing for expanding in the vertical direction.
For example, by performing a process of interpolating one line for every three lines and converting into four lines as disclosed in Japanese Patent Laid-Open No. 4-334289, etc., a video image is multiplied by 4/3 in the vertical direction. Can be enlarged, and in this case, therefore, it is possible to display 780 × 4 / 3≈1040 lines.

As described above, in the embodiment shown in FIG.
In order to obtain a TSC signal, a composite format standard television signal (NTSC signal) is decoded in advance to obtain a component format television signal (luminance signal Y and two color signals BY, RY). The above-described double speed conversion processing is performed for each component signal, but the present invention is not limited to this, and for example, the above-described double speed conversion can be performed with the standard television signal (NTSC signal) in the composite format as it is. After the processing, the double-speed composite signal thus obtained may be decoded to obtain the component type television signal (the luminance signal Y1 and the two color signals C1 and C2). According to this method, the capacities of the memories 16, 17, and 18 in FIG. 1 can be reduced, which is advantageous for cost reduction.

The standard television signal to which the present invention is applied is not limited to the NTSC signal. For example, the ED system which has started broadcasting in Japan and the PAL currently broadcasting in Europe. Method (or PAL
It is needless to say that the present invention can be applied to any standard television signal based on the (plus system), the SECAM system, and the digital broadcasting system that is currently being broadcast in the United States.

Among such television systems, the PAL system or SE in which the number of scanning lines per frame is N ₁ = 625.
In the case of standard television signals such as the CAM system, although not shown, based on an embodiment of the present invention similar to FIG. 1, for example, these standard television signals are provided with the number of scanning lines per frame. It may be displayed after being converted into a double-speed television signal such that N has a value in the vicinity of twice N ₁ (for example, N = 2 × 625 = 1250), and the same effect as the present invention is obtained. be able to.

Further, when displaying a television signal based on the improved standard television system such as the ED system, the PAL plus system and the digital broadcasting system, first, these television signals are previously decoded and The decoded signal may be subjected to the above-described double speed conversion processing before being displayed. In any of these cases, the effects obtained are the same and all are included in the category of the present invention.

[0115]

As described above, according to the present invention,
Like a standard television signal of the past and a high-definition television signal of the next generation, the horizontal scanning frequency is almost doubled.
Since different types of television signals can be displayed by sharing one deflection system, the cost of the display device can be reduced and the conventional television signal with a small number of scanning lines can be displayed as if it were a high-definition television. The image quality can be greatly improved by eliminating various kinds of interference that have been a problem in the past.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a display device of a television signal according to the present invention.

FIG. 2 is a diagram showing a relationship between a standard television signal in FIG. 1 and a double-speed television signal obtained by converting the standard television signal.

FIG. 3 is a diagram showing a structure of a scanning line of a standard television signal in FIG. 1 and a double-speed television signal obtained by converting the standard television signal.

FIG. 4 is a diagram showing a two-dimensional spectrum of a standard television signal in FIG. 1 and a double-speed television signal obtained by converting the standard television signal.

5 is a PLL constituting the pulse generation circuit in FIG.
It is a block diagram which shows a specific example of a circuit.

FIG. 6 is a diagram showing an example of a display method in the embodiment shown in FIG.

FIG. 7 is a diagram showing another display method in the embodiment shown in FIG.

[Explanation of symbols]

 10 signal conversion circuit 11 YC separation circuit 12 color decoding circuit 13, 14, 15 A / D conversion circuit 16, 17, 18 memory 19 signal processing circuit 25, 26, 27 D / A conversion circuit 21, 31 sync separation circuit 22, 32 pulse generation circuit 23 writing control circuit 24 reading control circuit 20 signal switching circuit 41 deflection switching circuit 42 deflection system 50 indicator

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Sadao Kubota 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi Ltd. Information & Video Division

Claims (9)

[Claims] 1. A field frequency is f _V1 and the number of scanning lines in one frame is N ₁ , each frame is composed of two fields, a _first field and a second field, and N _{1 in each} field.
/ 2 scanning lines, and the n-th line of the second field is interlaced and displayed on the screen in a 2: 1 ratio between the m-th line and the (m + 1) -th line of the first field. In a display device for displaying an image of a television signal having a phase relationship as described above and a horizontal scanning frequency of f _H1 (= N ₁ × f _V1 / 2), a signal input for inputting the television signal Means and the input television signal from the signal input means has a field frequency f _V approximately twice that of the input television signal (f _V ≈2 × f _V1 ) and equal to 1 of the input television signal. Within the frame period, the number of scanning lines N has a value in the range from twice as large as the input television signal to twice as large as that of the input television signal, and within the one frame period, the first, second, third, fourth Contains four fields, Has a number of scanning lines of a value in the vicinity of the N / 4 by each of the field, the horizontal scanning frequency f
_H is converted into a display signal having a value in the vicinity of twice or more than twice the input television signal, and the signal based on the m-th line of the first field of the input television signal is converted into the display signal of the display signal. A signal based on the n-th line of the second field of the input television signal is associated with the h-th line of the first field and the j-th line of the third field, and the i-th line of the second field of the display signal. And a signal converting means for converting the signal so as to be associated with the kth line of the fourth field, and the display signal from the signal converting means between the hth line and the (h + 1) th line of the first field. There is a phase relationship such that the i-th line of the second field is interlaced approximately 2: 1, and (j + 1) with the j-th line of the third field. Between the eyes line k-th line of the fourth field substantially 2: with a phase relationship that is interlaced at 1, and the first
The field frequency f _V has a phase relationship of 1/4 line offset in which the third field is displaced from the field by the third field and the fourth field is displaced from the second field by approximately 1/4 of the scanning line interval in the vertical direction. And a display means for displaying the image through a deflection system which is vertically deflected by the vertical scanning and is horizontally deflected by the horizontal scanning frequency f _H. 2. The display device according to claim 1, wherein the display means outputs a third signal for each of the first and second fields of the display signal.
A means for offsetting the fourth field in the vertical lower direction by ¼ line, the h-th line and the second field of the first field of the display signal;
The j-th line of the third field is interlaced with the i-th line of the field, and the fourth line is inserted between the i-th line of the second field and the (h + 1) -th line of the first field. A display device for a television signal, characterized in that it is configured to display in a phase relationship such that the k-th line of the field is interlaced. 3. The signal converting means according to claim 1 or 2, wherein the signal based on the m-th line of the first field of the input television signal is the signal of the h-th line of the first field of the display signal. And a signal based on the n-th line of the second field of the input television signal is the signal of the i-th line of the second field of the display signal, and the m-th signal of the first field of the input television signal Signal based on the line and n of the second field
A signal obtained by adding and averaging the signal based on the th line at a predetermined ratio is used as the signal of the j th line of the third field of the display signal, and the n th line of the second field of the input television signal. And a signal based on the (m + 1) th line of the first field of the next frame are added and averaged at a predetermined ratio to be converted into a signal of the kth line of the fourth field. A display device for a television signal, characterized by comprising: 4. The detection unit according to claim 1, wherein the signal conversion unit detects a motion of an image of the input television signal from a signal difference between fields or frames of the input television signal, In response to the detection output of the detection means, in the still image portion in which no motion is detected, the signal based on the m-th line of the first field of the input television signal is changed to the h-th line of the first field of the display signal. A signal based on the j-th line of the third field, or a signal based on the n-th line of the second field of the input television signal is converted to the i-th line of the second field of the display signal and k of the fourth field. In the moving image part in which the motion is detected as the signal of the second line, it is based on the nth line of the second field of the input television signal. Signal is the signal of the i-th line of the second field and the j-th line of the third field of the display signal, or (m + of the first field of the next frame of the input television signal.
1) The signal based on the line is the kth line of the fourth field of the display signal and (h + 1) of the next frame.
3. A display device for a television signal according to claim 1, further comprising means for making a signal of the second line. 5. The detection unit according to claim 1, wherein the signal conversion unit detects a motion based on a difference between fields or frames of the input television signal; and a response to a detection output of the detection unit. Then, in the still picture part in which no motion is detected, a signal based on the m-th line of the first field of the input television signal is supplied to the h-th line of the first field and the j-th line of the third field of the display signal. Or a signal based on the n-th line of the second field of the input television signal as the signal of the i-th line of the second field and the k-th line of the fourth field of the display signal, In the moving image part in which the motion is detected, the signal based on the m-th line of the first field of the input television signal and the n-th line of the second field. The signal obtained by the signal based on the line and averaged at a predetermined ratio to the j-th line of the signal of the third field, or the said input television signal 2
A signal obtained by adding and averaging the signal based on the nth line of the field and the signal based on the (m + 1) th line of the first field of the next frame at a predetermined ratio
A display device for a television signal, comprising means for converting the signal into a signal of the k-th line of the field. 6. The signal generating means according to claim 1, 2, 3, 4 or 5, wherein the display means generates a vertical synchronizing signal related to the vertical deflection, and vertical scanning between fields of the display signal. And a phase adjusting means for adjusting the phase of the vertical synchronizing signal so as to adjust the phase of the television signal. 7. The signal conversion means according to claim 1, wherein the number N of scanning lines of the display signal is N =
A display device for a television signal, characterized in that it is provided with means for converting so as to satisfy 4M or N = 4M + 2 (where M is an integer). 8. The field frequency is f _V1 , the number of scanning lines in one frame is N ₁ , each frame is composed of two fields, a first field and a second field, and each field is N ₁
/ 2 scan lines, and the nth line of the second field is interlaced 2: 1 between the mth line and the (m + 1) th line of the first field. It has a phase relationship and the horizontal scanning frequency is f
_A first television signal of _H1 (= N ₁ × f _V1 / 2),
A second scanning line having a larger number of scanning lines than the first television signal, a field frequency of f _V2 , a scanning line number of N ₂ in one frame, and a horizontal scanning frequency of f _H2 (= N ₂ × f _V2 / 2). Signal input means for inputting at least one of the television signals and the first television signal input by the signal input means, the input first television signal has a field frequency f _V of Almost 2 of the first television signal
(F _V ≈2 × f _V1 ) and the number of scanning lines N has a value close to or greater than twice the number of the first television signal within one frame period of the first television signal. Within one frame period, the first, second, third, and fourth fields are included, each field having the number of scanning lines in the vicinity of N / 4, and the horizontal scanning frequency f _H. Converts into a display signal having a value close to or more than twice the value of the first television signal, and the m-th line of the first field of the first television signal is converted into the first signal of the display signal.
A signal based on the n-th line of the second field of the first television signal is associated with the h-th line of the field and the j-th line of the third field, and the i-th line of the second field of the display signal. And k in the fourth field
A signal converting means for converting the display signal from the signal converting means so as to be associated with the second line, and between the h-th line and the (h + 1) -th line of the first field of the second field. The phase relationship is such that the i-th line is interlaced approximately 2: 1, and the k-th line of the fourth field is almost between the j-th line of the third field and the (j + 1) -th line. It has a phase relationship such as 2: 1 interlace, and
The field frequency f _V has a phase relationship of 1/4 line offset in which the third field is displaced from the field by the third field and the fourth field is displaced from the second field by approximately 1/4 of the scanning line interval in the vertical direction. And a display means for displaying the display signal as an image through a deflection system that is vertically deflected by the device and is horizontally deflected by the horizontal scanning frequency f _H. 9. The signal conversion means according to claim 8, wherein the number of scanning lines N of the first television signal is the number of scanning lines of the second television signal within one frame period of the first television signal. A display device for a television signal, comprising means for converting into the display signal having a value near the number N ₂ (N≈N ₂ ).