JPH09156094A - Head driving device on ink jet printer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To differentiate the jet timings of ink at every ink chamber, to easily realize the formation of an IC mechanism and to easily regulate the inclination of the waveform of the voltage applied to an electrode. SOLUTION: The electrode 12 between the electrostatic capacities 11 of a piezoelectric element is connected to a +Vcc power supply through a transistor 13 to be earthed through a transistor 14 and a diode 15 is earthed in a reverse direction. The base of a transistor 16 is connected to the base of the transistor 13 and the emitter of the transistor 16 is connected to the +Vcc power supply and the collector thereof is connected to the connection point of the base of the transistor 13 and the base of the transistor 16. A transistor 17 is connected to the transistor 16 in parallel and the collector connection point of the transistors 16, 17 is earthed through a transistor 18 and a resistor 19. The base of the transistor 18 is connected to a voltage adjustable +VCTL power supply.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a head drive device for an ink jet printer in which a large number of ink chambers, each of which is provided with an electrode and is separated by a partition wall of a piezoelectric element, are arranged in a line.

[0002]

2. Description of the Related Art In a head of an ink jet printer of this type, as shown in FIG. 6, a plurality of concave grooves are formed in a piezoelectric piezoelectric member 1 at predetermined intervals, and a top plate 2 is formed on each groove. Are fixed, and the ink chamber 3 is formed in each groove. Then, the electrode 4 extends from the side wall to the bottom of each ink chamber 3.
Are arranged respectively. A nozzle (not shown) is provided on the front side of each ink chamber 3, and an ink supply port (not shown) is provided on the rear side. In this head, the piezoelectric piezoelectric member 1 is interposed between the electrodes 4, and the portion of the piezoelectric piezoelectric member 1 interposed between the electrodes 4 is in the ink chambers 3.
The piezo-piezoelectric element 5 constitutes a partition that separates the two. In the figure, the arrow indicates the polarization direction of the piezoelectric element 5. This head is a line head in which the number of ink chambers 3 corresponds to the number of dots in one line.

In order to eject the ink in the ink chamber 3 from the nozzle with such a head, for example, to eject the ink in the ink chamber B from the nozzle, as shown in FIG.
A positive voltage is applied to the electrode 4 of the ink chamber B and the electrodes 4 of the adjacent ink chambers A and C are set to the ground potential. As a result, the piezoelectric element 5 forming the partition wall of the ink chamber B is distorted outward and the ink chamber B expands. Then, as shown in FIG. 6B, when the electrode 4 of the ink chamber B is set to the ground potential,
The ink chamber B returns to the original state. At this time, the ink in the ink chamber B is ejected from the nozzle. The voltage waveform applied to the electrode 4 of the ink chamber B in this series of operations is shown in FIG. 7, the voltage applied when the ink chamber B is expanded is gradually increased, and the ink chamber B is returned to its original state. When returning it, make it to ground potential quickly.

As shown in FIG. 8, the conventional head drive device for applying such a drive voltage waveform to the electrodes has an equivalent circuit of the head, in which the electrostatic capacitances CL made up of piezoelectric elements are respectively applied to the electrodes a, b, and. The circuit is connected in series via c, d, e, .... In contrast to this circuit, PNP type transistors Qap, Qbp, Qcp, Qd are respectively connected to the + Vcc power supply terminals.
The electrodes a, b, c, d, e, ... Are connected via p, Qep, ... And the electrodes a, b, c, d, e, ... Are respectively connected to NPN transistors Qan, Qbn, Qcn ,. Qdn, Qe
It is grounded through n, ... and each diode Da
, Db, Dc, Dd, De, ... Are grounded in opposite directions.

Then, a trapezoidal voltage waveform Vcc (t) having a period T shown in FIG. 9 (a) is applied to the + Vcc power supply terminal, and the PNP transistors Qap, Qbp, Qcp, Qdp, Qep, ... Are constantly turned off, NPN type transistors Qan, Qbn, Qcn, Q
The electrodes a, b, c, and dn, Qen, ...
The potentials d, e, ... Are set to the ground potential. In this state,
For example, when ink is ejected from the ink chamber provided with the electrode c, the PNP transistor Qcp is turned on at the timing shown in FIG. 9B, and the NPN transistor Qcn is made at the timing shown in FIG. 9C. Turn off.
As a result, the trapezoidal voltage waveform shown in (d) of FIG. 9 is applied to the electrode c, and the charging current flows through the NPN transistor Qbn with respect to the electrostatic capacitance CL between the electrodes c and b. The charging current is NP with respect to the capacitance CL between c and d.
It flows through the N-type transistor Qdn.

When the PNP type transistor Qcp is turned off and the NPN type transistor Qcn is turned on,
Diode Db → Electrode b → Capacitance CL → Electrode c → NP
Closed loop of N-type transistor Qcn and diode Dd → electrode d → capacitance CL → electrode c → NPN-type transistor Q
A discharge current flows due to the closed loop of cn, whereby the piezo-piezoelectric element forming the partition wall is distorted and ejects ink from the ink chamber.

Another head drive device, as shown in FIG. 10, keeps the voltage applied to the + Vcc power supply terminal constant and sets P
NP type transistors Qap, Qbp, Qcp, Qdp, Qep, ...
To the collectors of the resistors ra, rb, rc, rd and r, respectively.
e, ... Are inserted in series so that a time constant is given to the charging current flowing through the electrostatic capacitance CL. For example, when ejecting ink from the ink chamber provided with the electrode c, the PNP transistor Qcp is turned on at the timing shown in FIG.
cn is turned off at the timing shown in FIG. 11 (b).
As a result, a voltage waveform slowly rising due to the time constant is applied to the electrode c as shown in FIG. 11 (c). In this way, the voltage waveform that rises slowly causes the piezoelectric element to slowly distort, so that the adjacent ink chambers are not affected even if the ink chambers expand.

[0008]

In the head drive device shown in FIG. 8, energization can be started only at a timing matching the cycle of the cycle T, and there is a problem that the ink ejection timing cannot be adjusted. Further, since the power supply voltage applied to the + Vcc power supply terminal is oscillated in a trapezoidal shape, there is a problem that it is difficult to integrate this device into an IC (integrated circuit). Also,
In the head drive device shown in FIG. 10, the values of the resistances ra, rb, rc, rd, re, ... Must be changed in order to adjust the slope of the voltage waveform, which is difficult to adjust after assembly. is there.

Therefore, according to the first aspect of the present invention, the ink ejection timing can be made different for each ink chamber, and the power supply voltage can be made constant, so that the IC can be easily realized. Provided is a head drive device for an inkjet printer, which can easily adjust the slope of a voltage waveform applied to an electrode.

Further, according to the second and third aspects of the present invention, the ink ejection timing can be made different for each ink chamber, and the power supply voltage can be made constant, so that IC can be easily realized. Further, there is provided a head driving device for an inkjet printer, in which the inclination of the voltage waveform applied to the electrodes can be easily adjusted and the adjustment work is simple.

[0011]

According to the first aspect of the present invention,
A large number of ink chambers, each of which is provided with an electrode, are separated from each other by a partition wall of the piezo-piezoelectric element and are arranged in a line. An inkjet head that ejects the ink from the nozzle, a plurality of first semiconductor switching elements respectively connected between the positive electrode terminal of the power source and each electrode, and limits the amount of current flowing through each of the first semiconductor switching elements. Current limiting circuit and a plurality of second terminals connected between the negative terminal of the power source and each electrode.
And a semiconductor switching element for controlling the conduction of the first semiconductor switching element connected to the electrode of the ink chamber when the ink chamber is distorted, and a second semiconductor switching element connected to the electrode of the ink chamber adjacent to the ink chamber. Of the semiconductor switching element is controlled to be conductive, and the amount of current flowing through the first semiconductor switching element is limited by a corresponding current limiting circuit to slowly increase the capacitance between the electrode of the ink chamber and the electrode of the adjacent ink chamber. After charging, the non-conductive control of the first semiconductor switching element connected to the electrode of this ink chamber and the conductive control of the second semiconductor switching element connected to the electrode of this ink chamber are performed to change the charged capacitance. The ink is rapidly discharged to distort the piezoelectric element of the partition wall and apply pressure to the ink chamber.

As a result, the amount of current flowing through the first semiconductor switching element can be limited, the charging speed of the electrostatic capacity can be slowed, and the charging current amount can be easily adjusted.

According to a second aspect of the present invention, in the head drive device of the ink jet printer according to the first aspect, the ink chamber of the ink jet head is divided into a predetermined number of block units, and each block unit has a first semiconductor switching element. A plurality of integrated circuits incorporating a current limiting circuit and a second semiconductor switching element are used, and the limiting current amount of the current limiting circuit is collectively adjusted for each integrated circuit.

According to a third aspect of the present invention, in the head driving device of the ink jet printer according to the first aspect, the ink chamber of the ink jet head is divided into a predetermined number of block units, and the first semiconductor switching element is provided for each block unit. A plurality of integrated circuits incorporating the current limiting circuit and the second semiconductor switching element are used to collectively adjust the limiting current amount of the current limiting circuits in all the integrated circuits.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) As shown in FIG. 1, electrostatic capacitances 111, 112, 113, 114, which are piezoelectric piezoelectric elements,
115, ... Are electrodes 121, 122, 123, 1 respectively
They are connected in series via 24, 125, .... Further, the PNP type transistors 131, 132, 1 which are the first semiconductor switching elements are respectively connected to the + Vcc power supply terminals.
The electrodes 121, 1 through 33, 134, 135, ...
, 22, 123, 124, 125, ... Are connected, and these electrodes 121, 122, 123, 124, 125, ... Are respectively NPN type transistors 141, 142, 143 which form a part of the second semiconductor switching element. , 14
It is grounded via 4, 145, ...
The diodes 151, 152, 153, 154, 155, ... Which constitute the remaining part of the semiconductor switching element are grounded in the opposite direction.

The PNP type transistors 131 and 132
, 133, 134, 135, ... On the bases of PNP type transistors 161, 162, 163, 164, 165,
The base of ... is connected, and this PNP transistor 161
, 162, 163, 164, 165, ... Emitters are connected to the + Vcc power supply terminal, and collectors are transistors 13.
The bases of 1, 132, 133, 134, 135, ... And the transistors 161, 162, 163, 164, 165,
... connected to the connection point with the base of the transistor 131,
132, 133, 134, 135, ... and the transistor 1
A current mirror circuit is constituted by 61, 162, 163, 164, 165, ....

The PNP type transistors 161, 162
, 163, 164, 165, ... Have PNP-type transistors 171, 172, 173, 17 as emitters and collectors.
The emitters and collectors of 4, 175, ... Are connected.
The PNP type transistors 161, 162, 1
The collectors of 63, 164, 165, ... And the collectors of PNP transistors 171, 172, 173, 174, 175 ,.
81, 182, 183, 184, 185, ... And resistor 1
, 91, 192, 193, 194, 195, ... Are grounded in series. The NPN type transistor 181,
The base of 182, 183, 184, 185, ... is + VCT
L Connected to power terminal. The voltage applied to the + VCTL power supply terminal can be adjusted. The PNP type transistors 161, 162, 163, 164, 165, ...
NPN type transistors 181, 182, 183, 184
, 185, ... And resistors 191, 192, 193, 194
, 195, ... Compose a current limiting circuit.

In such a structure, the PNP type transistors 161, 162, 163 in the current mirror circuit.
, 164, 165, ... P is equal to the current flowing in
NP type transistors 131, 132, 133, 134,
It flows to 135, .... Then, the PNP transistor 1
When 71, 172, 173, 174, 175, ... Are off, this current flows in the NPN transistors 181, 182,
Equal to the current flowing through 183, 184, 185, ...
(VCTL-VF) / r. However, VF is the voltage between the bases and emitters of the transistors 181, 182, 183, 184, 185, ... And r is the resistances 191, 192, 19
The resistance values are 3, 194, 195, ....

For example, when the ink is ejected from the ink chamber provided with the electrode 123, the PNP transistor 173 is turned off at the time t1 as shown in FIG. As shown in the figure, the NPN type transistor 143 is turned off. As a result, the PNP transistor 1
The collector current Ic of 33 flows as shown in FIG. The amount of current at this time is (VCTL-VF) / r. However, VF is the voltage between the base and emitter of the transistor 183, and r is the resistance value of the resistor 193.

At this time, the capacitance from the electrode 123 to the capacitance 113 →
Electrode 12 2 → Transistor 142 path and capacitance 11
The charging current flows through the path of 4 → electrode 12 4 → transistor 144, but the voltage waveform applied to the electrode 12 3 at this time gradually rises from 0 V as shown in FIG. 2 (d), and eventually + Vcc at time t2. And becomes constant. The time t from time t1 to t2 is t = 2CL.multidot.Vcc / Ic = 2.
It becomes r.CL.Vcc / (VCTL-VF). However, CL
Is the capacitance value of the electrostatic capacitances 113 and 114.

After an appropriate time, the PNP transistor 173 turns on, and the NPN transistor 143 turns on with a slight delay. As a result, the diode 15 2 → electrode 12 2 → electrostatic capacity 11 3 → electrode 12
3 → Closed loop of NPN transistor 143 and diode 154 → Electrode 124 → Capacitance 114 → Electrode 123 →
A discharge current flows due to the closed loop of the NPN transistor 143. By this series of operations, the piezo-piezoelectric element forming the partition wall is distorted to eject ink from the ink chamber.

In this way, the voltage applied to the + Vcc power supply terminal is made constant, and the PNP type transistors 171, 172, 1
73, 174, 175, ... OFF / ON timing and N
PN type transistors 141, 142, 143, 144,
The electrodes 121,
Since the timing of the voltage applied to 122, 123, 124, 125, ... Can be varied, the ink ejection timing can be made different for each ink chamber. And +
Since the voltage applied to the Vcc power supply terminal can be made constant, the IC can be easily realized.

Further, NPN type transistors 181 and 18
Applied to the bases of 2, 183, 184, 185, ... +
When the VCTL voltage is changed, the transistors 181 and 182 are changed.
, 183, 184, 185, ... Change the collector currents, so that the transistors 171, 172, 173, 174
, 175, ... When the PNP transistor 131 is turned off,
This means that the collector current Ic flowing through 132, 133, 134, 135, ... Can be varied. Therefore, the electrode 121
, 122, 123, 124, 125, ..., the rising slope of the voltage waveform applied to the can be easily adjusted.

Further, in order to express the gradation, when the size of the ink droplet is changed for each dot, when the printing position error is corrected, or when the head is attached obliquely to adjust the printing density, It is necessary to adjust the ink ejection timing between the nozzles. Such adjustment can be easily performed.
In this embodiment, the second semiconductor switching element is the NPN type transistors 141, 142, 143,
144, 145, ... And diodes 151, 152, 15
, 154, 155, ..., but the invention is not necessarily limited to this, and may be a bidirectional analog switch.

(Second Embodiment) As shown in FIG. 3, a piezo ink jet head 21 having 1280 nozzles per line is divided into 10 blocks, and 128 nozzles are provided for each block. That is, the ink chamber is provided. Then, ten driving ICs 221, 222, 223, ... 22 for driving the heads of the respective blocks are provided.
10 are provided. Each of the drive ICs 221 to 2210 is formed by forming the circuit shown in FIG. 1 in one chip corresponding to 128 electrodes. Resistances 231, 232, 233, ... 2310, variable resistances 241, 242, 243, ... 2410 and resistances 251, 2 between + Vcc power supply terminal and ground respectively.
, 2510 connected in series, and + VCTL power supplies are taken out from the movable terminals of the variable resistors 241, 242, 243 ,.
21 to 2210 are supplied respectively.

By the way, the electrostatic capacity of the piezoelectric element interposed between the electrodes depends on the piezoelectric device, and the variation between the nozzles in one head is small, but it is large between the heads. Further, in each of the driving ICs 221 to 2210, resistors 191, 192, 193, 194, and
The variation in the resistance value of 195, ... Is not so large, but the variation in the resistance value is large among the drive ICs 221 to 2210.

Therefore, the variable resistors 241, 242, 243, ... 2410 are operated for each of the driving ICs 221 to 2210 to adjust the + VCTL voltage to correct the variations among the driving ICs 221 to 2210. In this way, variation adjustment and + V
Since the CTL voltage can be adjusted for each drive IC 221 to 2210, the adjustment work is simple.

(Third Embodiment) As shown in FIG. 4, this is the ten drive ICs 221, 222, 223, ... 2 for driving the ink jet head 21 in block units.
The + VCTL power supply for 210 is supplied at one place. That is, a series circuit of a resistor 26, a variable resistor 27, and a resistor 28 is connected between the + Vcc power supply terminal and ground, and the + VCTL power supply is taken out from the movable terminal of the variable resistor 27 and supplied to each of the drive ICs 221 to 2210. ing. This circuit is applied when the variation between the driving ICs 221 to 2210 is sufficiently smaller than the variation between the heads. By operating the variable resistor 27, the + VCTL voltage of all the driving ICs 221 to 2210 is collectively set. Adjustment is possible, and adjustment work becomes easier. It is needless to say that the same effects as those of the above-described embodiment can be obtained in this embodiment as well. Further, when the variation between the drive ICs is small within the lot and large among the lots, it is only necessary to use the ICs of the same lot for one head.
The variation between 221 and 2210 can be made sufficiently smaller than the variation between heads, and the circuit of FIG. 4 can be applied.

(Fourth Embodiment) As shown in FIG. 5, this is a bipolar PNP transistor 131, 132, 133, 134, 135, ..., NPN shown in FIG.
Type transistors 141, 142, 143, 144, 14
5, ..., PNP type transistors 161, 162, 163
, 164, 165, ..., PNP transistor 171
, 172, 173, 174, 175, ..., NPN type transistors 181, 182, 183, 184, 185,
... is a MOS type FET (field effect transistor) 1311,
1321, ..., NPN type transistors 1411, 1421,
..., PNP type transistors 1611, 1621, ..., PNP
, NPN type transistors 1811, 1821, ...

As described above, even if the bipolar type transistor is replaced by the MOS type FET, the same operational effect as that of the above-described embodiment can be obtained. Further, the two FETs 1311, 1321, ... And FET 16 which constitute the current mirror circuit.
By changing the area ratio of 11, 1621, ..., It is possible to reduce the current flowing through the FET 1611, 1621 ,.

[0031]

As described above, according to the first aspect of the present invention, the ink ejection timing can be made different for each ink chamber, and the power supply voltage can be made constant. Therefore, IC can be easily realized. In addition, the slope of the voltage waveform applied to the electrodes can be easily adjusted.

According to the second and third aspects of the invention, the ink ejection timing can be made different for each ink chamber, and the power supply voltage can be made constant.
The IC can be easily realized, and the inclination of the voltage waveform applied to the electrodes can be easily adjusted, and the adjustment work can be easily performed.

[Brief description of the drawings]

FIG. 1 is a partial circuit configuration diagram showing a first embodiment of the present invention.

FIG. 2 is an operation timing of each unit in the embodiment,
The figure which shows a current and a voltage waveform.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

FIG. 4 is a block diagram showing a third embodiment of the present invention.

FIG. 5 is a partial circuit configuration diagram showing a fourth embodiment of the present invention.

FIG. 6 is a partial cross-sectional view showing a head configuration of an ink jet printer using a piezoelectric element.

FIG. 7 is a diagram showing a voltage waveform applied to an electrode of the head.

FIG. 8 is a partial circuit configuration diagram showing a conventional example.

FIG. 9 is a diagram showing operation timings and voltage waveforms of respective parts of the conventional example.

FIG. 10 is a partial circuit configuration diagram showing another conventional example.

FIG. 11 is a diagram showing operation timings and voltage waveforms of respective parts of the conventional example.

[Explanation of symbols]

111 to 116 ... Capacitance composed of piezo piezoelectric element 121 to 125 ... Electrode 131 to 135 ... PNP type transistor (first semiconductor switching element) 141 to 145 ... NPN type transistor (second semiconductor switching element) 151 to 155 ... Diode (second semiconductor switching element) 161 to 165 ... PNP type transistor (current limiting circuit) 181 to 185 ... NPN type transistor (current limiting circuit)

Claims (3)

[Claims] 1. A large number of ink chambers, which are separated by partition walls of a piezoelectric element and are provided with electrodes, are arranged in a line.
The piezoelectric element is distorted by a voltage applied between the electrodes to apply pressure to the ink chamber, and an ink jet head that ejects ink in the ink chamber from nozzles is provided between the positive electrode terminal of the power supply and each of the electrodes. A plurality of first semiconductor switching elements connected to each other, a current limiting circuit that limits the amount of current flowing through each first semiconductor switching element, and a plurality of current limiting circuits connected between the negative terminal of the power source and each electrode. When the ink chamber is distorted, the first semiconductor switching device connected to the electrode of the ink chamber is controlled to conduct, and the electrode of the ink chamber adjacent to the ink chamber is also provided. The connected second semiconductor switching element is controlled to be conductive so that the amount of current flowing through the first semiconductor switching element is controlled. Current is limited by the current limiting circuit to slowly charge the capacitance between the electrode of the ink chamber and the electrode of the adjacent ink chamber, and then the first semiconductor switching element connected to the electrode of the ink chamber is connected. The second semiconductor switching element connected to the electrode of the ink chamber is controlled to be non-conductive, and the charged electrostatic capacitance is rapidly discharged to distort the piezoelectric element of the partition wall and apply pressure to the ink chamber. A head drive device for an inkjet printer, which is characterized in that 2. The ink chamber of the inkjet head is divided into a predetermined number of block units, and each block unit has a first unit.
10. A plurality of integrated circuits incorporating the semiconductor switching element, the current limiting circuit and the second semiconductor switching element are used, and the limiting current amount of the current limiting circuit is collectively adjusted for each integrated circuit. Item 2. A head drive device for an inkjet printer according to Item 1. 3. The ink chamber of the ink jet head is divided into a predetermined number of block units, and each block unit has a first unit.
Characterized in that a plurality of integrated circuits incorporating the semiconductor switching element, the current limiting circuit, and the second semiconductor switching element are used, and the limiting current amounts of the current limiting circuits in all the integrated circuits are collectively adjusted. The head drive device for an inkjet printer according to claim 1.