JP2689415B2 - Piezo element drive circuit - Google Patents

Piezo element drive circuit

Info

Publication number
JP2689415B2
JP2689415B2 JP16826686A JP16826686A JP2689415B2 JP 2689415 B2 JP2689415 B2 JP 2689415B2 JP 16826686 A JP16826686 A JP 16826686A JP 16826686 A JP16826686 A JP 16826686A JP 2689415 B2 JP2689415 B2 JP 2689415B2
Authority
JP
Japan
Prior art keywords
transistor
piezoelectric element
drive circuit
discharge
charging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16826686A
Other languages
Japanese (ja)
Other versions
JPS6325049A (en
Inventor
孝和 深野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP16826686A priority Critical patent/JP2689415B2/en
Publication of JPS6325049A publication Critical patent/JPS6325049A/en
Application granted granted Critical
Publication of JP2689415B2 publication Critical patent/JP2689415B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04581Control methods or devices therefor, e.g. driver circuits, control circuits controlling heads based on piezoelectric elements
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04541Specific driving circuit

Landscapes

  • Particle Formation And Scattering Control In Inkjet Printers (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、オンデマンド型のインクジェットプリンタ
等に利用される圧電素子駆動回路に関する。 〔従来の技術〕 従来のインクジェットプリンタヘッドの圧電素子の駆
動回路は、第5図に示したように、充電抵抗61、放電抵
抗62、充電トランジスタ57、放電トランジスタ58、バイ
アス抵抗63、圧電素子60から構成される回路が用いられ
ていた。 この駆動回路の入力端子72、73に、それぞれ第7図に
示した充電信号(以降CPWと呼ぶ)79と、CPW79を反転し
た放電信号(以降DPWと呼ぶ)78とを入力して圧電素子6
0を伸縮させ、インク滴を吐出させていた。 〔発明が解決しようとする問題点〕 しかし、CPW79とDPW78によりON/OFFする充電トランジ
スタ57、放電トランジスタ58には、トランジスタ特有の
スイッチング遅れがあることから、CPW79とDPW78の信号
レベルが同時に切換わる時に両トランジスタが同時にON
となる期間が生じる。 例えば、CPW79がLOWレベルに、DPW78がHIGHレベルに
切換わった直後に充電トランジスタ57と放電トランジス
タ58が同時にONになる。 この両トランジスタがONの期間では、VH〔v〕に充電
された圧電素子60は、V0=VH×RD/(RC+RD)〔v〕を
収束値とした放電カーブで放電し、充電トランジスタ57
が完全にOFFになると、V0=0〔v〕を収束値とした放
電カーブで放電がなされる。 同様に、CPW79がHIGHレベルに、DPW78がLOWレベルに
切換わった直後も充電トランジスタ57と放電トランジス
タ58が同時にONになる。 この両トランジスタがONの期間では、0〔v〕に放電
された圧電素子60は、V0=VH×RD/(RC+RD)〔v〕を
収束値とした充電カーブで充電がなされ、その後、放電
トランジスタ58が完全にOFFになると、V0=VH〔v〕を
収束値とした充電カーブで充電される。 以上のように、CPW79の反転信号をCPW78として用いる
と、信号生成は簡単であるが、第7図に示した様に、圧
電素子60の充放電電圧カーブに段差が生じてしまう。こ
の段差により生じる高調波成分の影響で、圧電素子60が
振動し、インク滴吐出が不安定になってしまう恐れがあ
る。 これを回避するために、第6図に示したタイミングで
DPW74とCPW76を出力し、圧電素子60の駆動を行えばよい
のであるが、トランジスタのスイッチング特性に合わせ
て、DPW74とCPW76の出力遅延時間taを設定してやる必要
があり、信号生成回路が複雑化しコストがかかってしま
う。 本発明は、この様な問題に鑑みてなされたものであっ
て、その目的とするところは、インク滴を安定して吐出
可能な安価な圧電素子駆動回路を提供するものである。 〔問題点を解決するための手段〕 本発明の圧電素子駆動回路は、インクジェットヘッド
の圧電素子駆動回路において、エミッタ端子が基準電位
に接続された第1のトラジスタと、エミッタ端子が電源
に接続された第2のトランジスタと、一端が前記基準電
位に接続された圧電素子と、一端が前記第1のトランジ
スタのコレクタ端子に接続し、他端が前記第2のトラン
ジスタのコレクタ端子に直接あるいはダイオードを介し
て接続する第1の抵抗と、前記第1の抵抗の前記他端と
前記圧電素子の他端間に接続する第2の抵抗とからな
り、前記第1のトランジスタの導通により前記圧電素子
を放電し、前記第2のトランジスタの導通により前記圧
電素子を充電するよう構成したことを特徴とする圧電素
子駆動回路。 〔実施例〕 第1図は、本発明の圧電素子駆動回路である。 符号1は、エミッタが電源VHに接続したPNP型トラン
ジスタ(以降、充電トランジスタと呼ぶ)で、充電トラ
ンジスタ1のコレクタから、放電抵抗5を介して、エミ
ッタが接地されたNPN型トランジスタ2(以降、放電ト
ランジスタと呼ぶ)のコレクタが接続されている。 また、充電トランジスタ1のコレクタから、充電抵抗
4を介して、他端が接地された圧電素子6が接続されて
いる。 そして、充電トランジスタ1のベース端子には、端子
16のPW信号が、非反転バッファ9と、レベル変換用のト
ランジスタ3を介して入力しており、PW信号17がHIGHレ
ベル時の、充電トランジスタ1がONとなり、圧電素子6
を充電する。また、端子16のPW信号17は、反転バッファ
8を介して放電トランジスタ2のベース端子にも入力し
ており、PW信号がLOWレベルの時、放電トランジスタ2
がONとなり、圧電素子6を放電する。 次に、第1図の圧電素子駆動回路の動作を、第2図に
沿って説明する。 PW信号17が、HIGHレベルからLOWレベルに切換わる
と、反転バッファ8の出力レベルがHIGHとなり、放電ト
ランジスタ2がONする。しかし、上述のように充電トラ
ンジスタ1は、レベル変換用のトランジスタ3がOFFし
ても、充電トランジスタ1の蓄積時間の影響で暫くの間
はOFFせず、充電トランジスタ1と放電トランジスタ2
両方がON状態となる期間が生じる。その時の圧電素子6
の端子電圧は、圧電素子6のインピーダンスが高い為、
V0=VH〔v〕に維持され、充電トランジスタ1が完全に
OFFになるまで放電が始まらない。 そして、充電トランジスタ1が完全にOFFになってか
ら、所定の放電カーブでもって0〔v〕まで放電する。
その後、PW信号17が、LOWレベルからHIGHレベルに切換
わると、レベル変換用のトランジスタ3がONし、充電ト
ランジスタ1がONする。これと同時に、反転バッファ8
の出力レベルがLOWになるが、上述のように放電トラン
ジスタ2の蓄積時間の影響で暫くの間、放電トランジス
タ2はOFFしないが、充電トランジスタ1がONになりコ
レクタ端子がVH〔v〕になるので、圧電素子6は、V
H〔v〕に向かって充電を開始する。当然のことなが
ら、放電トランジスタ2が完全にOFFになっても、充電
トランジスタ1のコレクタ電圧は、VH〔v〕となってい
るので、充電カーブへの影響は生じない。 以上のように、同一PW信号17で充電トランジスタ1と
放電トランジスタ2の制御を行っても、圧電素子6の充
放電カーブには、段差が生じない。 次に、別の実施例の駆動回路を第3図に示す。 第3図は、2個以上の圧電素子が配設されたマルチノ
ズルヘッドインクジエツタヘッドに特に適した圧電素子
駆動回路であり、複数の圧電素子24,25,‥‥,26と、そ
れに対応する数の放電トランジスタ20,21,‥‥22と、放
電抵抗33,34,‥‥,35と、充電抵抗30,31,‥‥32と、充
電ダイオード27,28,‥‥、29と、複数の圧電素子24,25,
‥‥,26を充電するための1つの充電トランジスタ19か
ら構成され、充電制御は端子50のPW信号により制御され
る。 圧電素子の放電は、各ノズル毎に独立に制御する必要
があるため、データセレクタ46,47,‥‥,48のセレクト
端子にPW信号を入力し、端子51,52,‥‥,53に入力するD
ATA1,DATA2,‥‥,DATA Nにより制御する。 次に、第3図の圧電素子駆動回路の動作を、第4図に
沿って説明する。 PW信号がHIGHからLOWレベルに切換わると、充電トラ
ンジスタ19の蓄積時間が経過した後、充電トランジスタ
19がOFFする。LOWレベルのPW信号は、同時にデータセレ
クタ46,47,‥‥,48のセレクト端子に入力するので、デ
ータセレクタ46,47,‥‥,48は能動状態になり、端子51,
52,‥‥,53に入力するDATA1,DATA2,‥‥,DATA Nにした
がって各放電トランジスタ20,21,‥‥22の導通が制御さ
る。例えば、第4図に示すように、DATA1がHIGHレベル
になっていると、圧電素子24の放電が開始される。そし
て、PW信号がLOWからHIGHレベルに切換わると、充電ト
ランジスタ19がONとなり、データセレクタ46,47,‥‥48
が不動となるので、DATA1,DATA2,‥‥,DATA Nに関わら
ず放電トランジスタ20,21,‥‥22は固有の蓄積時間が経
過した後OFFとなり、全ての圧電素子24,25,‥‥,26が、
ほぼVH〔v〕まで充電される。 この実施例においても、前述の実施例で説明した理由
により、充電トランジスタ19と放電トランジスタ20,21,
‥‥22が同時にONとなっても、圧電素子24,25,‥‥,26
の充放電カーブには、段差が生じない。尚、充電ダイオ
ード27,28,‥‥、29は、圧電素子が、他の圧電素子の放
電トランジスタにより放電されてしまうことを防ぐため
のものである。 〔発明の効果〕 以上説明した様に、本発明の圧電素子駆動回路によれ
ば、簡単な回路構成で、インク滴を安定して吐出するこ
とができる。
The present invention relates to a piezoelectric element drive circuit used in an on-demand type ink jet printer or the like. [Prior Art] As shown in FIG. 5, a piezoelectric element driving circuit of a conventional inkjet printer head has a charging resistor 61, a discharging resistor 62, a charging transistor 57, a discharging transistor 58, a bias resistor 63, and a piezoelectric element 60. A circuit composed of was used. The charge signal (hereinafter referred to as CPW) 79 and the discharge signal (hereinafter referred to as DPW) 78 obtained by inverting the CPW 79 are input to the input terminals 72 and 73 of this drive circuit, respectively.
0 was expanded and contracted to eject ink droplets. [Problems to be solved by the invention] However, since the charging transistor 57 and the discharging transistor 58 which are turned on / off by the CPW79 and the DPW78 have a switching delay peculiar to the transistor, the signal levels of the CPW79 and the DPW78 are switched at the same time. Sometimes both transistors turn on at the same time
There will be a period of For example, the charge transistor 57 and the discharge transistor 58 are simultaneously turned on immediately after the CPW79 is switched to the low level and the DPW78 is switched to the high level. While the both transistors are ON, the piezoelectric element 60 charged to V H [v] is discharged with a discharge curve having a convergence value of V 0 = V H × R D / (R C + R D ) [v]. And charging transistor 57
When is completely turned off, discharge is performed with a discharge curve having a convergent value of V 0 = 0 [v]. Similarly, the charge transistor 57 and the discharge transistor 58 are simultaneously turned on immediately after the CPW79 is switched to the HIGH level and the DPW78 is switched to the LOW level. While the both transistors are ON, the piezoelectric element 60 discharged to 0 [v] is charged with a charging curve having a convergence value of V 0 = V H × R D / (R C + R D ) [v]. After that, when the discharging transistor 58 is completely turned off, it is charged with a charging curve having a convergent value of V 0 = V H [v]. As described above, when the inverted signal of the CPW79 is used as the CPW78, the signal generation is simple, but as shown in FIG. 7, a step occurs in the charge / discharge voltage curve of the piezoelectric element 60. The piezoelectric element 60 may vibrate due to the influence of the harmonic component generated by this step, and the ink droplet ejection may become unstable. In order to avoid this, at the timing shown in FIG.
It is only necessary to output the DPW74 and CPW76 and drive the piezoelectric element 60, but it is necessary to set the output delay time ta of the DPW74 and CPW76 according to the switching characteristics of the transistor, which complicates the signal generation circuit and reduces the cost. It will cost you. The present invention has been made in view of such problems, and an object thereof is to provide an inexpensive piezoelectric element drive circuit capable of stably ejecting ink droplets. [Means for Solving the Problems] In the piezoelectric element drive circuit of the present invention, in the piezoelectric element drive circuit of an inkjet head, a first transistor having an emitter terminal connected to a reference potential and an emitter terminal connected to a power supply are connected. A second transistor, a piezoelectric element having one end connected to the reference potential, one end connected to the collector terminal of the first transistor, and the other end directly connected to the collector terminal of the second transistor or a diode. A first resistor connected via the first resistor and a second resistor connected between the other end of the first resistor and the other end of the piezoelectric element, and the piezoelectric element is connected by conduction of the first transistor. A piezoelectric element drive circuit configured to discharge and charge the piezoelectric element by conduction of the second transistor. [Embodiment] FIG. 1 shows a piezoelectric element drive circuit of the present invention. Reference numeral 1 denotes a PNP type transistor (hereinafter, referred to as a charging transistor) whose emitter is connected to the power supply V H , and an NPN type transistor 2 (hereinafter, referred to as a charging transistor) whose emitter is grounded from the collector of the charging transistor 1 through the discharge resistor 5. , Discharge transistor) is connected to the collector. Further, a piezoelectric element 6 whose other end is grounded is connected from the collector of the charging transistor 1 via a charging resistor 4. Then, the base terminal of the charging transistor 1 has a terminal
The PW signal 16 is input through the non-inverting buffer 9 and the level conversion transistor 3, and when the PW signal 17 is HIGH, the charging transistor 1 is turned on and the piezoelectric element 6
To charge. Further, the PW signal 17 of the terminal 16 is also input to the base terminal of the discharge transistor 2 via the inverting buffer 8, and when the PW signal is at the low level, the discharge transistor 2
Is turned on, and the piezoelectric element 6 is discharged. Next, the operation of the piezoelectric element drive circuit of FIG. 1 will be described with reference to FIG. When the PW signal 17 is switched from HIGH level to LOW level, the output level of the inverting buffer 8 becomes HIGH and the discharge transistor 2 is turned ON. However, as described above, the charging transistor 1 does not turn off for a while due to the influence of the storage time of the charging transistor 1 even if the level conversion transistor 3 turns off, and the charging transistor 1 and the discharging transistor 2
A period occurs in which both are in the ON state. Piezoelectric element 6 at that time
Since the impedance of the piezoelectric element 6 is high, the terminal voltage of
V 0 = V H [v] is maintained and charging transistor 1 is completely
Discharge does not start until it turns off. Then, after the charging transistor 1 is completely turned off, it is discharged to 0 [v] with a predetermined discharge curve.
After that, when the PW signal 17 is switched from the LOW level to the HIGH level, the level conversion transistor 3 is turned on and the charging transistor 1 is turned on. At the same time, the inversion buffer 8
Output level becomes LOW, the discharge transistor 2 does not turn OFF for a while due to the influence of the storage time of the discharge transistor 2 as described above, but the charge transistor 1 turns ON and the collector terminal goes to V H [v]. Therefore, the piezoelectric element 6 is V
Charging starts toward H [v]. As a matter of course, even if the discharge transistor 2 is completely turned off, the collector voltage of the charge transistor 1 is V H [v], so that the charge curve is not affected. As described above, even if the charge transistor 1 and the discharge transistor 2 are controlled by the same PW signal 17, no step occurs in the charge / discharge curve of the piezoelectric element 6. Next, a drive circuit of another embodiment is shown in FIG. FIG. 3 shows a piezoelectric element driving circuit particularly suitable for a multi-nozzle head ink jet head in which two or more piezoelectric elements are arranged, and a plurality of piezoelectric elements 24, 25, ... Number of discharge transistors 20, 21, ... 22, discharge resistors 33, 34, ..., 35, charge resistors 30, 31, ... 32, and charging diodes 27, 28, ... 29, and a plurality of Piezoelectric element 24, 25,
.., 26, which is composed of one charge transistor 19 for charging, and the charge control is controlled by the PW signal at the terminal 50. Since it is necessary to control the discharge of the piezoelectric element independently for each nozzle, input the PW signal to the select terminals of the data selectors 46, 47, ..., 48 and input it to the terminals 51, 52, ..., 53. To D
Controlled by ATA1, DATA2, ..., DATA N. Next, the operation of the piezoelectric element drive circuit of FIG. 3 will be described with reference to FIG. When the PW signal switches from HIGH to LOW level, after the storage time of the charging transistor 19 elapses, the charging transistor
19 turns off. Since the LOW level PW signal is simultaneously input to the select terminals of the data selectors 46, 47, ..., 48, the data selectors 46, 47 ,.
The conduction of each discharge transistor 20, 21, ... 22 is controlled according to DATA 1, DATA 2, ..., DATA N input to 52, ..., 53. For example, as shown in FIG. 4, when DATA1 is at the HIGH level, the piezoelectric element 24 starts to be discharged. Then, when the PW signal is switched from LOW to HIGH level, the charging transistor 19 is turned ON, and the data selectors 46, 47, ... 48
, The discharge transistors 20, 21, ... 22 are turned off after a specific accumulation time regardless of DATA1, DATA2, ..., DATA N, and all piezoelectric elements 24, 25, ..., 26 is
It is charged to almost V H [v]. Also in this embodiment, the charge transistor 19 and the discharge transistors 20, 21, for the reasons explained in the above-mentioned embodiments.
・ ・ ・ Piezoelectric elements 24, 25, ‥, 26 even if 22 are turned on at the same time
There is no step in the charging / discharging curve. The charging diodes 27, 28, ..., 29 are for preventing the piezoelectric element from being discharged by the discharge transistor of another piezoelectric element. [Effects of the Invention] As described above, according to the piezoelectric element drive circuit of the present invention, it is possible to stably eject ink droplets with a simple circuit configuration.

【図面の簡単な説明】 第1図は、本発明の圧電素子駆動回路である。 第2図は、第1図の回路の駆動タイミングを説明する図
である。 第3図は、本発明の別の圧電素子駆動回路である。 第4図は、第3図の回路の駆動タイミングを説明する図
である。 第5図は、従来の圧電素子駆動回路である。 第6図、第7図は、従来の圧電素子駆動回路の駆動タイ
ミングを説明する図である。 11,12,14……バイアス抵抗 10,13,15……ベース抵抗 23,59……レベル変換用のトランジスタ 36,39,41,43,45……バイアス抵抗 37,38,40,42,44……ベース抵抗 49……非反転バッファ 46〜48……スリーステートバッファ 64,66,68……バイアス抵抗 65,67,69……ベース抵抗 70,71……非反転バッファ
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a piezoelectric element drive circuit of the present invention. FIG. 2 is a diagram for explaining the drive timing of the circuit of FIG. FIG. 3 shows another piezoelectric element driving circuit of the present invention. FIG. 4 is a diagram for explaining the drive timing of the circuit of FIG. FIG. 5 shows a conventional piezoelectric element drive circuit. FIG. 6 and FIG. 7 are diagrams for explaining drive timing of a conventional piezoelectric element drive circuit. 11,12,14 …… Bias resistance 10,13,15 …… Base resistance 23,59 …… Level conversion transistor 36,39,41,43,45 …… Bias resistance 37,38,40,42,44 ...... Base resistance 49 …… Non-inverting buffer 46 to 48 …… Three-state buffer 64,66,68 …… Bias resistance 65,67,69 …… Base resistance 70,71 …… Non-inverting buffer

Claims (1)

(57)【特許請求の範囲】 1.インクジェットヘッドの圧電素子駆動回路におい
て、 エミッタ端子が基準電位に接続された第1のトラジスタ
と、 エミッタ端子が電源に接続された第2のトランジスタ
と、 一端が前記基準電位に接続された圧電素子と、 一端が前記第1のトランジスタのコレクタ端子に接続
し、他端が前記第2のトランジスタのコレクタ端子に直
接あるいはダイオードを介して接続する第1の抵抗と、 前記第1の抵抗の前記他端と前記圧電素子の他端間に接
続する第2の抵抗とからなり、 前記第1のトランジスタの導通により前記圧電素子を放
電し、前記第2のトランジスタの導通により前記圧電素
子を充電するよう構成したことを特徴とする圧電素子駆
動回路。
(57) [Claims] In a piezoelectric element drive circuit of an inkjet head, a first transistor having an emitter terminal connected to a reference potential, a second transistor having an emitter terminal connected to a power source, and a piezoelectric element having one end connected to the reference potential. A first resistor having one end connected to the collector terminal of the first transistor and the other end directly or via a diode to the collector terminal of the second transistor; and the other end of the first resistor. And a second resistor connected between the other ends of the piezoelectric elements, wherein the piezoelectric element is discharged by conduction of the first transistor, and the piezoelectric element is charged by conduction of the second transistor. A piezoelectric element drive circuit characterized by the above.
JP16826686A 1986-07-17 1986-07-17 Piezo element drive circuit Expired - Lifetime JP2689415B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16826686A JP2689415B2 (en) 1986-07-17 1986-07-17 Piezo element drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16826686A JP2689415B2 (en) 1986-07-17 1986-07-17 Piezo element drive circuit

Publications (2)

Publication Number Publication Date
JPS6325049A JPS6325049A (en) 1988-02-02
JP2689415B2 true JP2689415B2 (en) 1997-12-10

Family

ID=15864826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16826686A Expired - Lifetime JP2689415B2 (en) 1986-07-17 1986-07-17 Piezo element drive circuit

Country Status (1)

Country Link
JP (1) JP2689415B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8004343B2 (en) 2003-11-11 2011-08-23 Brother Kogyo Kabushiki Kaisha Driver circuit and ink jet printer head driver circuit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2973262B2 (en) * 1993-04-26 1999-11-08 セイコーエプソン株式会社 Drive circuit for inkjet head
CN1754697A (en) * 2004-09-29 2006-04-05 精工爱普生株式会社 Liquid ejection apparatus, drive signal application method, and liquid ejection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8004343B2 (en) 2003-11-11 2011-08-23 Brother Kogyo Kabushiki Kaisha Driver circuit and ink jet printer head driver circuit

Also Published As

Publication number Publication date
JPS6325049A (en) 1988-02-02

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