JPH09139675A - A/d converter, digital signal processor and digital recorder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain an excellent S/N in the case of an output of a digital signal with a small to medium level. SOLUTION: An A/D converter (3) is provided with a multiplier (8), which adjusts an output level of a digital signal in response to a gain coefficient received from a microcomputer (9). Furthermore, the digital signal with a longer bit length than that required for assuring the precision of A/D conversion is to be converted and even when a digital signal with a small to medium level is outputted, a noise level accompanying A/D conversion is reduced, resulting in preventing deteriorated S/N.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an A / D converter,
The present invention relates to a digital signal processing device and a digital recording device, and is particularly suitable for use in a digital audio device such as a digital audio tape recorder and a mini disc player.

[0002]

2. Description of the Related Art In recent years, in digital audio equipment such as a digital audio tape recorder (DAT) and a mini disk player (MD), an A / D converter for converting an analog signal into a digital signal, for example, ΔΣ
In some cases, an oversampling A / D converter including a modulator and a digital decimation filter is used. Such an oversampling type A / D converter pushes the quantization noise to the high frequency side by performing oversampling,
It is intended to reduce noise in the audio band.

FIG. 3 shows an example of a block diagram of a conventional digital recording apparatus provided with the above-mentioned oversampling type A / D converter. The digital recording device shown in this figure has an analog volume 3
2. Oversampling type A / D converter indicated by broken line (hereinafter simply referred to as "A / D converter") 3
3, digital signal processor 34, and digital recording device 3
5.

The analog volume 32 has an input terminal 31.
The A / D converter 33 adjusts the amplitude level of an analog signal such as a musical tone signal that is input from the A / D converter 33 and the digital decimation filter 3 for example.
7 is configured to convert an analog signal input via the analog volume 32 into a digital signal having a predetermined bit length and output the digital signal.

ΔΣ which constitutes the A / D converter 33
The modulator 36 is adapted to generate and output a 1-bit pulse data train corresponding to the analog signal input via the analog volume 32. The digital decimation filter 37 is configured by, for example, an FIR low-pass filter, removes quantization noise of harmonic components included in the 1-bit pulse data train generated by the ΔΣ modulator 36, and performs thinning-out operation. hand,
It is designed to be converted into a multi-bit digital signal and output.

The digital signal processor 34 compresses the digital signal output from the A / D converter 33,
The digital recording device 35 is a recording device that performs signal processing such as correction and records the digital signal output from the digital signal processor 34 on, for example, a magnetic tape, a disk, a memory, or the like.

In such a conventional digital recording apparatus, for example, a user intentionally records music or the like on a magnetic tape or the like at a low volume or gradually increases the volume level.
In the case of reducing the so-called fade-out / in, the amplitude level of the analog signal supplied to the A / D converter 33 is adjusted by the analog volume 32.

By the way, since the ideal noise floor level of the A / D converter 33 as described above is constant, the amplitude level of the analog signal input from the input terminal 31 via the analog volume 32 is usually large. Then, as shown in FIG. 4, the noise in the ΔΣ modulator 41 becomes −
The distortion characteristics are improved, and the noise distortion rate (THD + N) with respect to the input signal level is reduced.

That is, theoretically, the noise distortion rate (THD + N) with respect to the input signal level is improved until the input level of the analog signal reaches A _{1 as} shown by the broken line, and when the input level reaches A _1. , The waveform should clip and deteriorate rapidly.

However, such a ΔΣ modulator is
Due to the property peculiar to high-order ΔΣ modulation, it has a noise distortion characteristic that distortion and noise increase when the level of the input analog signal increases and the modulation rate approaches 1, and it is actually input. When the analog signal corresponding to the maximum input level reaches the vicinity of the maximum input level A ₁ , distortion and noise increase, and the noise-distortion characteristic rapidly deteriorates as shown by the solid line in FIG.

Therefore, the maximum input level A ₁ is applied to the ΔΣ modulator.
In order to prevent the noise-distortion characteristic from deteriorating when an analog signal in the vicinity is input, for example, US Pat.
No. 41 proposes a method of setting the gain of the impulse response coefficient of the digital decimation filter to 1 or more and setting the input level to around A ₂ .

In this case, for example, when the input level of the analog signal input to the ΔΣ modulator reaches A ₂ (the input level at which the noise-distortion characteristic shown in FIG. 4 is the best), it is output from the digital decimation filter. An impulse response coefficient multiplied by a predetermined gain so that the output level of the digital signal becomes full scale is supplied to the digital decimation filter.

[0013]

By the way, the noise associated with analog / digital conversion in the A / D converter 33 as shown in FIG. 3 is the maximum input at which noise and distortion are deteriorated due to the characteristic peculiar to ΔΣ modulation. It is almost constant except near level A ₁ . Therefore, as described above, for example, when recording on a magnetic tape or the like at a low volume or when performing fade-in / out, that is, the analog volume 3
When the amplitude level of the analog signal input to the delta-sigma modulator 36 is changed to a small to medium amplitude level by changing the value of 2, the A / D converter 33 is reduced by the amplitude level of the input signal.
There is a problem that the S / N ratio in the is deteriorated.

In this case, the above-mentioned US Pat.
As disclosed in Japanese Patent No. 1841, when the gain of the impulse response coefficient of the digital decimation filter 42 is set to 1 or more, the digital decimation filter 37 also amplifies the noise associated with the analog / digital conversion. Therefore, for example, even if the S / N ratio of the digital signal output when the analog signal of the large amplitude level is input is deteriorated, the digital signal output when the analog signal of the small to medium amplitude level is input is changed. We were not able to meet requests such as prioritizing the S / N ratio.

The present invention has been made to solve the above problems, and an object thereof is to obtain a good S / N ratio even when outputting a digital signal of small to medium amplitude level. To do.

[0016]

In order to achieve the above object, a ΔΣ modulation means for generating and outputting a 1-bit pulse data train from an input analog signal and a harmonic contained in the 1-bit pulse data train. Digital decimation filter means for removing component noise and generating a multi-bit digital signal, and adjusting the output level of the multi-bit digital signal according to an input gain coefficient, and a digital signal of a predetermined bit length. And an A / D converter having a multiplication means for converting and outputting.

Further, the A / D converter is provided with a digital signal processing means to configure a digital signal processing apparatus, and further the digital recording means is provided to the digital signal processing apparatus to configure a digital recording apparatus.

According to the present invention, the A / D converter is provided with the multiplication means, the output level of the digital signal is adjusted according to the gain coefficient inputted to the multiplication means, and the accuracy of the analog / digital conversion is required. Since it is converted to a digital signal with a bit longer than the specified bit length, the noise level associated with analog / digital conversion can be reduced even when outputting a digital signal with a small to medium amplitude level. As a result, deterioration of the S / N ratio can be prevented.

[0019]

1 is a block diagram of a digital recording apparatus according to an embodiment of the present invention. The digital recording device shown in this figure includes an analog volume 2, an A / D converter 3 shown by a broken line, a microcomputer 9, a digital signal processor 4, and a digital recording device 5.
It is composed of The analog volume 2 adjusts the amplitude level of an analog signal such as a tone signal input from the input terminal 1, and the A / D converter 3 includes, for example, a ΔΣ modulator 6, a digital decimation filter 7,
The multiplier 8 is configured to convert an analog signal input via the analog volume 2 into a digital signal and output the digital signal.

The ΔΣ modulator 6 which constitutes the A / D converter 3 generates and outputs a pulse data train in which 1-bit density modulation is performed according to the analog signal input via the analog volume 2. It is done like this. The digital decimation filter 7 is composed of, for example, an FIR low-pass filter, removes the quantization noise of the harmonic component contained in the 1-bit pulse data train generated by the ΔΣ modulator 6, and performs the thinning operation. Then, the sampling frequency is converted into a sampling frequency lower than the sampling frequency of the ΔΣ modulator 6, and a multi-bit digital signal is output. The gain of the impulse response coefficient of the digital decimation filter 7 is set to 1.

The multiplier 6 multiplies the digital signal output from the digital decimation filter 7 by a gain coefficient supplied from a microcomputer (hereinafter referred to as "microcomputer") 9, and controls the output level of the digital signal. The digital signal having a bit length equal to or higher than the accuracy of analog / digital conversion performed by the ΔΣ modulator 6 and the digital decimation filter is output. The microcomputer 9 outputs a gain coefficient set according to an operation of an operation unit (not shown) or the like, and outputs a gain coefficient for performing an operation such as fade-in / fade-out.

The digital signal processor 4 subjects the digital signal output from the A / D converter 3 to signal processing such as compression and correction, and outputs the digital signal.
The digital signal output from the digital signal processor 4 is recorded on, for example, a magnetic tape, a disk, a memory or the like.

The operation of the above digital recording apparatus will be described below. The ΔΣ modulator 6 that constitutes the A / D converter 3 has a characteristic of a high-order ΔΣ modulation that increases the level of an analog signal to be input and has a modulation rate of 1
It has a characteristic that distortion and noise increase as it approaches.

Therefore, the time when the input value of the A / D converter becomes the full scale of the digital output is roughly determined, and the coefficient suitable for it is set by the microcomputer 9. As an example, a coefficient of 1.5 is set in this case.

Next, when the analog signal of the maximum level (input level A ₁ shown in FIG. 4) is supplied to the input terminal 1, the full-scale digital signal is output from the A / D converter 3, that is, the multiplier 8. The volume value of the analog volume 2 is adjusted as described above. That is, in the analog volume 2, even if the analog signal of the maximum amplitude level is input to the input terminal 1, the amplitude of the analog signal input to the A / D converter 3 is prevented so that distortion and noise do not occur in the ΔΣ modulator 6. The level will be adjusted.

The analog signal whose amplitude level has been adjusted is input to the ΔΣ modulator 6 and converted into high-speed digital stream data which is 1-bit pulse data. Then, the high-speed digital stream data is subjected to the digital decimation filter 5 to remove high-frequency components such as quantization noise, converted into a multi-bit digital signal, and output. Since the gain of the impulse response coefficient of the digital decimation filter 7 is 1, a digital signal having the same amplitude level as that of the analog signal input to the ΔΣ modulator 6 is output.

If, for example, an 18-bit digital signal is output from the digital decimation filter 7, this 18-bit digital signal is supplied to the multiplier 8 from the microcomputer 9 as a gain coefficient (1.5).
Is adjusted to adjust the amplitude level. That is,
The volume level is adjusted by the gain coefficient supplied to the multiplier 8. Therefore, for example, the bit length (1
It is adapted to be converted into a 24-bit digital signal longer than 8 bits) and output. Then, the digital signal converted into 24 bits is subjected to predetermined processing such as compression and correction by the digital signal processor 4 and output to the digital recording device 5 to be recorded on a magnetic tape, a disk, a memory or the like. Will be done.

Therefore, in the digital recording apparatus of this embodiment having such a configuration, when recording is intentionally performed at a low volume, for example, the volume level is set to 40 from the initial state.
When the value is reduced to dB (1/100 times), the microcomputer 9 supplies a gain coefficient of 0.015 to the multiplier 8 with the volume fixed.

Further, for example, when performing a fade-out operation, the microcomputer 9 outputs, for example, 1.5 to 1.3 → 1.
When the gain coefficient is gradually reduced to 0 → 0.8 → 0.5 → 0.3 → 0.1 and supplied to the multiplier 6, and conversely the fade-in operation is performed, from the microcomputer 9, For example ...
0.1 → 0.3 → 0.5 → 0.8 → 1.0 → 1.3 →
The gain coefficient is gradually increased to 1.5 and is supplied to the multiplier 6.

When the volume coefficient is adjusted to a low to medium level by the gain coefficient supplied from the microcomputer 9 as described above, S / S is compared with the case where the conventional analog volume 2 is varied to adjust the volume level. It is possible to prevent deterioration of the N ratio. That is, for example, the maximum S of the ΔΣ modulator 6
Assuming that the / N ratio is 97 dB, when the volume level is reduced by 40 dB by the analog volume 2,
S / N of digital signal output from A / D converter
While the ratio drops to 57 dB (97 dB-40 dB = 57 dB), the A / D converter 3 of the present embodiment
By adjusting the amplitude level of the digital signal with the multiplier 6 as described above, the S / N ratio can be maintained at 97 dB.

This is because the digital signal output from the multiplier 8 of the A / D converter 3 has a bit length (18 bits) required for the accuracy of analog / digital conversion.
Since the long bit length (24 bits) is used, the requantization noise is about -145 dB, and even if the volume level is reduced by 40 dB by the multiplier 8 by the microcomputer 9, the noise level is -105 dB (-145 dB + 40 dB).
B = −105 dB), and the noise of the ΔΣ modulator 4 (−)
Since the value is smaller than the 97 dB) level, deterioration of the S / N ratio can be prevented as a result.

Also, for example, when recording at a normal volume level, the user can adjust the gain of the digital signal output from the A / D converter 3 while confirming the sound quality and the like depending on the recording state. , It becomes possible to record in the most preferable condition in terms of sound quality.

That is, for example, by increasing the coefficient,
By setting the gain coefficient so that a full-scale digital signal is output at a position close to point A _2, it becomes possible to perform recording with emphasis on distortion at large amplitude, while reducing the coefficient. If the gain coefficient is set so that a full-scale digital signal is output at a position close to the point A _{1 in} FIG. 4, it becomes possible to reduce the amplification amount of the noise level, and the S / It is possible to perform recording with more emphasis on the N ratio.

Here, FIG. 2 shows an example of a block diagram of the digital circuit portion of the A / D converter 3 as described above.
The digital circuit section of the A / D converter 3 shown in this figure is
Microcomputer interface 11, up / down counter 12, coefficient ROM 13, changeover switch 14, RAM 1
5, a multiplier 16, and a data interface 17.

The microcomputer interface 11 converts the serial gain coefficient data transmitted from the microcomputer 9 into parallel gain coefficient data and outputs it. The up / down counter 12 is configured to increase or decrease the value of the counter by 1 LSB, for example, once per sample until the data of the gain coefficient transmitted from the microcomputer 9 becomes the same. It is designed to prevent the generation of click noise that accompanies sudden changes.

The coefficient ROM 13 stores the impulse response coefficient required when the thinning operation is performed by the digital decimation filter. The RAM 15 is a memory that can perform writing / reading, etc., and temporarily stores the 1-bit pulse data string input from the ΔΣ modulator 4 and outputs it to the multiplier 16, and the multiplier 16 will be described later. The digital signal subjected to the thinning operation can be stored in the memory again.

The multiplier 16 is normally connected to the coefficient ROM 13 by the switch 14, performs a thinning operation on the 1-bit pulse data string input from the RAM 15, outputs it to the RAM 15 again, and ends the thinning operation. After that, the RAM is switched at the timing when the switch 14 is switched.
The thinned digital signal is supplied from 15 and is multiplied by the gain coefficient transmitted from the microcomputer 9.

That is, the multiplier 16 time-divisionally performs the thinning operation performed by the digital decimation filter 7 and the adjustment of the amplitude level of the digital signal of the multiplier 8. The data interface 17 outputs the digital signal whose amplitude level has been adjusted by the multiplier 16.

As described above, in the digital circuit section of the A / D converter 3, the thinning operation performed by the digital decimation filter 7 by the multiplier 16 and the adjustment of the amplitude level are performed in combination, so that the digital circuit section is efficiently operated. It is often used to minimize the circuit scale.

In this embodiment, the case where the multiplier 16 which is the digital circuit section of the A / D converter 3 performs the thinning operation of the digital decimation filter 7 and the amplitude level of the digital signal is described. However, without being limited to this, for example, a multiplier may be provided in the digital signal processor 4 to adjust the amplitude level of the digital signal.

[0041]

As described above, in the A / D converter, the digital signal processing device and the digital recording device of the present invention, the output level of the digital signal is adjusted by the multiplication means and the bit length is longer than the required bit length. Since it is converted to a digital signal of bit length and output,
S / also when outputting a digital signal of small to medium amplitude level
It is possible to prevent the N ratio from deteriorating and output a good digital signal.

Further, since the user can adjust the output level of the digital signal while confirming the sound quality and the like depending on the recording condition, there is also an effect that the recording or the like can be performed in the sound quality most preferable condition.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital recording apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram of a digital circuit unit of the A / D converter according to the embodiment of the present invention.

FIG. 3 is a block diagram of a conventional digital recording device.

FIG. 4 is a diagram showing noise-distortion characteristics of a ΔΣ modulator.

[Explanation of symbols]

 1 Input Terminal 2 Analog Volume 3 A / D Converter 4 Digital Signal Processor 5 Digital Recording Device 6 ΔΣ Modulator 7 Digital Decimation Filter 8, 16 Multiplier 9 Microcomputer 11 Microcomputer Interface 12 Up / Down Counter 13 Coefficient ROM 14 Switch 15 RAM 16 Limiter circuit 17 Data interface

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Higashi Kawabe 134 Sony LSI Design Co., Ltd. 134 Kobe-cho, Hodogaya-ku, Yokohama-shi, Kanagawa

Claims (3)

[Claims] 1. A ΔΣ modulating means for generating and outputting a 1-bit pulse data train from an input analog signal, and removing noise of a harmonic component contained in the 1-bit pulse data train, and multi-bit Digital decimation filter means for generating the digital signal, and multiplying means for adjusting the output level of the multi-bit digital signal according to the input gain coefficient and converting the digital signal into a digital signal of a predetermined bit length and outputting the digital signal. And an A / D converter comprising: 2. An adjusting means for adjusting the level of an input analog signal, a ΔΣ modulating means for generating and outputting a 1-bit pulse data train from the analog signal output from the adjusting means, and the 1-bit Adjusts the output level of the multi-bit digital signal according to the digital decimation filter means that removes the harmonic component noise contained in the pulse data train and that generates the multi-bit digital signal, and the input gain coefficient. And a digital signal processing means for converting the digital signal output from the multiplying means into a digital signal having a predetermined bit length and outputting the digital signal. A characteristic digital signal processing device. 3. Adjusting means for adjusting the level of an input analog signal, ΔΣ modulating means for generating and outputting a 1-bit pulse data train from the analog signal output from the adjusting means, and the 1-bit Adjusts the output level of the multi-bit digital signal according to the digital decimation filter means that removes the harmonic component noise contained in the pulse data train and that generates the multi-bit digital signal, and the input gain coefficient. At the same time, a multiplication means for converting the digital signal of a predetermined bit length and outputting the digital signal, a digital signal processing means for performing a predetermined signal processing on the digital signal output from the multiplication means, and a digital signal processing means for outputting the digital signal. And a digital recording device for recording a digital signal according to the present invention.